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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * drivers/pci/setup-res.c
3 *
4 * Extruded from code written by
5 * Dave Rusling (david.rusling@reo.mts.dec.com)
6 * David Mosberger (davidm@cs.arizona.edu)
7 * David Miller (davem@redhat.com)
8 *
9 * Support routines for initializing a PCI subsystem.
10 */
11
12/* fixed for multiple pci buses, 1999 Andrea Arcangeli <andrea@suse.de> */
13
14/*
15 * Nov 2000, Ivan Kokshaysky <ink@jurassic.park.msu.ru>
16 * Resource sorting
17 */
18
Linus Torvalds1da177e2005-04-16 15:20:36 -070019#include <linux/kernel.h>
Paul Gortmaker363c75d2011-05-27 09:37:25 -040020#include <linux/export.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070021#include <linux/pci.h>
22#include <linux/errno.h>
23#include <linux/ioport.h>
24#include <linux/cache.h>
25#include <linux/slab.h>
26#include "pci.h"
27
28
Yu Zhao14add802008-11-22 02:38:52 +080029void pci_update_resource(struct pci_dev *dev, int resno)
Linus Torvalds1da177e2005-04-16 15:20:36 -070030{
31 struct pci_bus_region region;
Bjorn Helgaas9aac5372012-07-09 19:49:37 -060032 bool disable;
33 u16 cmd;
Linus Torvalds1da177e2005-04-16 15:20:36 -070034 u32 new, check, mask;
35 int reg;
Yu Zhao613e7ed2008-11-22 02:41:27 +080036 enum pci_bar_type type;
Yu Zhao14add802008-11-22 02:38:52 +080037 struct resource *res = dev->resource + resno;
Linus Torvalds1da177e2005-04-16 15:20:36 -070038
Ralf Baechlefb0f2b42006-12-19 13:12:08 -080039 /*
40 * Ignore resources for unimplemented BARs and unused resource slots
41 * for 64 bit BARs.
42 */
Ivan Kokshayskycf7bee52005-08-07 13:49:59 +040043 if (!res->flags)
44 return;
45
Bjorn Helgaascd8a4d32014-02-26 11:25:59 -070046 if (res->flags & IORESOURCE_UNSET)
47 return;
48
Ralf Baechlefb0f2b42006-12-19 13:12:08 -080049 /*
50 * Ignore non-moveable resources. This might be legacy resources for
51 * which no functional BAR register exists or another important
Bjorn Helgaas80ccba12008-06-13 10:52:11 -060052 * system resource we shouldn't move around.
Ralf Baechlefb0f2b42006-12-19 13:12:08 -080053 */
54 if (res->flags & IORESOURCE_PCI_FIXED)
55 return;
56
Yinghai Lufc279852013-12-09 22:54:40 -080057 pcibios_resource_to_bus(dev->bus, &region, res);
Linus Torvalds1da177e2005-04-16 15:20:36 -070058
Linus Torvalds1da177e2005-04-16 15:20:36 -070059 new = region.start | (res->flags & PCI_REGION_FLAG_MASK);
60 if (res->flags & IORESOURCE_IO)
61 mask = (u32)PCI_BASE_ADDRESS_IO_MASK;
62 else
63 mask = (u32)PCI_BASE_ADDRESS_MEM_MASK;
64
Yu Zhao613e7ed2008-11-22 02:41:27 +080065 reg = pci_resource_bar(dev, resno, &type);
66 if (!reg)
67 return;
68 if (type != pci_bar_unknown) {
Linus Torvalds755528c2005-08-26 10:49:22 -070069 if (!(res->flags & IORESOURCE_ROM_ENABLE))
70 return;
71 new |= PCI_ROM_ADDRESS_ENABLE;
Linus Torvalds1da177e2005-04-16 15:20:36 -070072 }
73
Bjorn Helgaas9aac5372012-07-09 19:49:37 -060074 /*
75 * We can't update a 64-bit BAR atomically, so when possible,
76 * disable decoding so that a half-updated BAR won't conflict
77 * with another device.
78 */
79 disable = (res->flags & IORESOURCE_MEM_64) && !dev->mmio_always_on;
80 if (disable) {
81 pci_read_config_word(dev, PCI_COMMAND, &cmd);
82 pci_write_config_word(dev, PCI_COMMAND,
83 cmd & ~PCI_COMMAND_MEMORY);
84 }
85
Linus Torvalds1da177e2005-04-16 15:20:36 -070086 pci_write_config_dword(dev, reg, new);
87 pci_read_config_dword(dev, reg, &check);
88
89 if ((new ^ check) & mask) {
Bjorn Helgaas80ccba12008-06-13 10:52:11 -060090 dev_err(&dev->dev, "BAR %d: error updating (%#08x != %#08x)\n",
91 resno, new, check);
Linus Torvalds1da177e2005-04-16 15:20:36 -070092 }
93
Bjorn Helgaas28c68212011-06-14 13:04:35 -060094 if (res->flags & IORESOURCE_MEM_64) {
Ivan Kokshayskycf7bee52005-08-07 13:49:59 +040095 new = region.start >> 16 >> 16;
Linus Torvalds1da177e2005-04-16 15:20:36 -070096 pci_write_config_dword(dev, reg + 4, new);
97 pci_read_config_dword(dev, reg + 4, &check);
98 if (check != new) {
Ryan Desfosses227f0642014-04-18 20:13:50 -040099 dev_err(&dev->dev, "BAR %d: error updating (high %#08x != %#08x)\n",
100 resno, new, check);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700101 }
102 }
Bjorn Helgaas9aac5372012-07-09 19:49:37 -0600103
104 if (disable)
105 pci_write_config_word(dev, PCI_COMMAND, cmd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700106}
107
Sam Ravnborg96bde062007-03-26 21:53:30 -0800108int pci_claim_resource(struct pci_dev *dev, int resource)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700109{
110 struct resource *res = &dev->resource[resource];
Bjorn Helgaas966f3a72010-03-11 17:01:19 -0700111 struct resource *root, *conflict;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700112
Bjorn Helgaas29003be2014-02-26 11:25:59 -0700113 if (res->flags & IORESOURCE_UNSET) {
114 dev_info(&dev->dev, "can't claim BAR %d %pR: no address assigned\n",
115 resource, res);
116 return -EINVAL;
117 }
118
Matthew Wilcoxcebd78a2009-06-17 16:33:33 -0400119 root = pci_find_parent_resource(dev, res);
Bjorn Helgaas865df572009-11-04 10:32:57 -0700120 if (!root) {
Bjorn Helgaas29003be2014-02-26 11:25:59 -0700121 dev_info(&dev->dev, "can't claim BAR %d %pR: no compatible bridge window\n",
122 resource, res);
Bjorn Helgaas865df572009-11-04 10:32:57 -0700123 return -EINVAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700124 }
125
Bjorn Helgaas966f3a72010-03-11 17:01:19 -0700126 conflict = request_resource_conflict(root, res);
127 if (conflict) {
Bjorn Helgaas29003be2014-02-26 11:25:59 -0700128 dev_info(&dev->dev, "can't claim BAR %d %pR: address conflict with %s %pR\n",
129 resource, res, conflict->name, conflict);
Bjorn Helgaas966f3a72010-03-11 17:01:19 -0700130 return -EBUSY;
131 }
Bjorn Helgaas865df572009-11-04 10:32:57 -0700132
Bjorn Helgaas966f3a72010-03-11 17:01:19 -0700133 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700134}
Jesse Barneseaa959d2009-06-30 21:45:44 -0700135EXPORT_SYMBOL(pci_claim_resource);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700136
Yuji Shimada32a9a6822009-03-16 17:13:39 +0900137void pci_disable_bridge_window(struct pci_dev *dev)
138{
Bjorn Helgaas865df572009-11-04 10:32:57 -0700139 dev_info(&dev->dev, "disabling bridge mem windows\n");
Yuji Shimada32a9a6822009-03-16 17:13:39 +0900140
141 /* MMIO Base/Limit */
142 pci_write_config_dword(dev, PCI_MEMORY_BASE, 0x0000fff0);
143
144 /* Prefetchable MMIO Base/Limit */
145 pci_write_config_dword(dev, PCI_PREF_LIMIT_UPPER32, 0);
146 pci_write_config_dword(dev, PCI_PREF_MEMORY_BASE, 0x0000fff0);
147 pci_write_config_dword(dev, PCI_PREF_BASE_UPPER32, 0xffffffff);
148}
Ram Pai2bbc6942011-07-25 13:08:39 -0700149
Myron Stowe6535943f2011-11-21 11:54:19 -0700150/*
151 * Generic function that returns a value indicating that the device's
152 * original BIOS BAR address was not saved and so is not available for
153 * reinstatement.
154 *
155 * Can be over-ridden by architecture specific code that implements
156 * reinstatement functionality rather than leaving it disabled when
157 * normal allocation attempts fail.
158 */
159resource_size_t __weak pcibios_retrieve_fw_addr(struct pci_dev *dev, int idx)
160{
161 return 0;
162}
163
Bjorn Helgaasf7625982013-11-14 11:28:18 -0700164static int pci_revert_fw_address(struct resource *res, struct pci_dev *dev,
Ram Pai2bbc6942011-07-25 13:08:39 -0700165 int resno, resource_size_t size)
166{
167 struct resource *root, *conflict;
Myron Stowe6535943f2011-11-21 11:54:19 -0700168 resource_size_t fw_addr, start, end;
Ram Pai2bbc6942011-07-25 13:08:39 -0700169 int ret = 0;
170
Myron Stowe6535943f2011-11-21 11:54:19 -0700171 fw_addr = pcibios_retrieve_fw_addr(dev, resno);
172 if (!fw_addr)
173 return 1;
174
Ram Pai2bbc6942011-07-25 13:08:39 -0700175 start = res->start;
176 end = res->end;
Myron Stowe6535943f2011-11-21 11:54:19 -0700177 res->start = fw_addr;
Ram Pai2bbc6942011-07-25 13:08:39 -0700178 res->end = res->start + size - 1;
Myron Stowe351fc6d2011-11-21 11:54:07 -0700179
180 root = pci_find_parent_resource(dev, res);
181 if (!root) {
182 if (res->flags & IORESOURCE_IO)
183 root = &ioport_resource;
184 else
185 root = &iomem_resource;
186 }
187
Ram Pai2bbc6942011-07-25 13:08:39 -0700188 dev_info(&dev->dev, "BAR %d: trying firmware assignment %pR\n",
189 resno, res);
190 conflict = request_resource_conflict(root, res);
191 if (conflict) {
192 dev_info(&dev->dev,
193 "BAR %d: %pR conflicts with %s %pR\n", resno,
194 res, conflict->name, conflict);
195 res->start = start;
196 res->end = end;
197 ret = 1;
198 }
199 return ret;
200}
201
Bjorn Helgaasfe6dacd2012-07-11 17:05:43 -0600202static int __pci_assign_resource(struct pci_bus *bus, struct pci_dev *dev,
203 int resno, resource_size_t size, resource_size_t align)
204{
205 struct resource *res = dev->resource + resno;
206 resource_size_t min;
207 int ret;
208
209 min = (res->flags & IORESOURCE_IO) ? PCIBIOS_MIN_IO : PCIBIOS_MIN_MEM;
210
Bjorn Helgaas67d29b52014-05-19 18:32:18 -0600211 /*
212 * First, try exact prefetching match. Even if a 64-bit
213 * prefetchable bridge window is below 4GB, we can't put a 32-bit
214 * prefetchable resource in it because pbus_size_mem() assumes a
215 * 64-bit window will contain no 32-bit resources. If we assign
216 * things differently than they were sized, not everything will fit.
217 */
Bjorn Helgaasfe6dacd2012-07-11 17:05:43 -0600218 ret = pci_bus_alloc_resource(bus, res, size, align, min,
Yinghai Lu5b285412014-05-19 17:01:55 -0600219 IORESOURCE_PREFETCH | IORESOURCE_MEM_64,
Bjorn Helgaasfe6dacd2012-07-11 17:05:43 -0600220 pcibios_align_resource, dev);
Bjorn Helgaasd3689df2014-05-19 18:39:07 -0600221 if (ret == 0)
222 return 0;
Bjorn Helgaasfe6dacd2012-07-11 17:05:43 -0600223
Bjorn Helgaas67d29b52014-05-19 18:32:18 -0600224 /*
225 * If the prefetchable window is only 32 bits wide, we can put
226 * 64-bit prefetchable resources in it.
227 */
Bjorn Helgaasd3689df2014-05-19 18:39:07 -0600228 if ((res->flags & (IORESOURCE_PREFETCH | IORESOURCE_MEM_64)) ==
Yinghai Lu5b285412014-05-19 17:01:55 -0600229 (IORESOURCE_PREFETCH | IORESOURCE_MEM_64)) {
Yinghai Lu5b285412014-05-19 17:01:55 -0600230 ret = pci_bus_alloc_resource(bus, res, size, align, min,
231 IORESOURCE_PREFETCH,
232 pcibios_align_resource, dev);
Bjorn Helgaasd3689df2014-05-19 18:39:07 -0600233 if (ret == 0)
234 return 0;
Yinghai Lu5b285412014-05-19 17:01:55 -0600235 }
236
Bjorn Helgaas67d29b52014-05-19 18:32:18 -0600237 /*
238 * If we didn't find a better match, we can put any memory resource
239 * in a non-prefetchable window. If this resource is 32 bits and
240 * non-prefetchable, the first call already tried the only possibility
241 * so we don't need to try again.
242 */
243 if (res->flags & (IORESOURCE_PREFETCH | IORESOURCE_MEM_64))
Bjorn Helgaasfe6dacd2012-07-11 17:05:43 -0600244 ret = pci_bus_alloc_resource(bus, res, size, align, min, 0,
245 pcibios_align_resource, dev);
Bjorn Helgaas67d29b52014-05-19 18:32:18 -0600246
Bjorn Helgaasfe6dacd2012-07-11 17:05:43 -0600247 return ret;
248}
249
Nikhil P Raod6776e62012-06-20 12:56:00 -0700250static int _pci_assign_resource(struct pci_dev *dev, int resno,
251 resource_size_t size, resource_size_t min_align)
Yinghai Lud09ee9682009-04-23 20:49:25 -0700252{
253 struct resource *res = dev->resource + resno;
Yinghai Lud09ee9682009-04-23 20:49:25 -0700254 struct pci_bus *bus;
255 int ret;
Bjorn Helgaas865df572009-11-04 10:32:57 -0700256 char *type;
Yinghai Lud09ee9682009-04-23 20:49:25 -0700257
Yinghai Lud09ee9682009-04-23 20:49:25 -0700258 bus = dev->bus;
Ram Pai2bbc6942011-07-25 13:08:39 -0700259 while ((ret = __pci_assign_resource(bus, dev, resno, size, min_align))) {
260 if (!bus->parent || !bus->self->transparent)
261 break;
262 bus = bus->parent;
Yinghai Lud09ee9682009-04-23 20:49:25 -0700263 }
264
Bjorn Helgaas865df572009-11-04 10:32:57 -0700265 if (ret) {
266 if (res->flags & IORESOURCE_MEM)
267 if (res->flags & IORESOURCE_PREFETCH)
268 type = "mem pref";
269 else
270 type = "mem";
271 else if (res->flags & IORESOURCE_IO)
272 type = "io";
273 else
274 type = "unknown";
275 dev_info(&dev->dev,
276 "BAR %d: can't assign %s (size %#llx)\n",
277 resno, type, (unsigned long long) resource_size(res));
278 }
Yinghai Lud09ee9682009-04-23 20:49:25 -0700279
280 return ret;
281}
282
Ram Pai2bbc6942011-07-25 13:08:39 -0700283int pci_assign_resource(struct pci_dev *dev, int resno)
284{
285 struct resource *res = dev->resource + resno;
286 resource_size_t align, size;
Ram Pai2bbc6942011-07-25 13:08:39 -0700287 int ret;
288
Bjorn Helgaasbd064f02014-02-26 11:25:58 -0700289 res->flags |= IORESOURCE_UNSET;
Ram Pai2bbc6942011-07-25 13:08:39 -0700290 align = pci_resource_alignment(dev, res);
291 if (!align) {
Ryan Desfosses227f0642014-04-18 20:13:50 -0400292 dev_info(&dev->dev, "BAR %d: can't assign %pR (bogus alignment)\n",
293 resno, res);
Ram Pai2bbc6942011-07-25 13:08:39 -0700294 return -EINVAL;
295 }
296
Ram Pai2bbc6942011-07-25 13:08:39 -0700297 size = resource_size(res);
298 ret = _pci_assign_resource(dev, resno, size, align);
299
300 /*
301 * If we failed to assign anything, let's try the address
302 * where firmware left it. That at least has a chance of
303 * working, which is better than just leaving it disabled.
304 */
Myron Stowe6535943f2011-11-21 11:54:19 -0700305 if (ret < 0)
Ram Pai2bbc6942011-07-25 13:08:39 -0700306 ret = pci_revert_fw_address(res, dev, resno, size);
307
308 if (!ret) {
Bjorn Helgaasbd064f02014-02-26 11:25:58 -0700309 res->flags &= ~IORESOURCE_UNSET;
Ram Pai2bbc6942011-07-25 13:08:39 -0700310 res->flags &= ~IORESOURCE_STARTALIGN;
311 dev_info(&dev->dev, "BAR %d: assigned %pR\n", resno, res);
312 if (resno < PCI_BRIDGE_RESOURCES)
313 pci_update_resource(dev, resno);
314 }
315 return ret;
316}
Ryan Desfossesb7fe9432014-04-25 14:32:25 -0600317EXPORT_SYMBOL(pci_assign_resource);
Ram Pai2bbc6942011-07-25 13:08:39 -0700318
Bjorn Helgaasfe6dacd2012-07-11 17:05:43 -0600319int pci_reassign_resource(struct pci_dev *dev, int resno, resource_size_t addsize,
320 resource_size_t min_align)
321{
322 struct resource *res = dev->resource + resno;
323 resource_size_t new_size;
324 int ret;
325
Bjorn Helgaasbd064f02014-02-26 11:25:58 -0700326 res->flags |= IORESOURCE_UNSET;
Bjorn Helgaasfe6dacd2012-07-11 17:05:43 -0600327 if (!res->parent) {
Ryan Desfosses227f0642014-04-18 20:13:50 -0400328 dev_info(&dev->dev, "BAR %d: can't reassign an unassigned resource %pR\n",
329 resno, res);
Bjorn Helgaasfe6dacd2012-07-11 17:05:43 -0600330 return -EINVAL;
331 }
332
333 /* already aligned with min_align */
334 new_size = resource_size(res) + addsize;
335 ret = _pci_assign_resource(dev, resno, new_size, min_align);
336 if (!ret) {
Bjorn Helgaasbd064f02014-02-26 11:25:58 -0700337 res->flags &= ~IORESOURCE_UNSET;
Bjorn Helgaasfe6dacd2012-07-11 17:05:43 -0600338 res->flags &= ~IORESOURCE_STARTALIGN;
339 dev_info(&dev->dev, "BAR %d: reassigned %pR\n", resno, res);
340 if (resno < PCI_BRIDGE_RESOURCES)
341 pci_update_resource(dev, resno);
342 }
343 return ret;
344}
345
Bjorn Helgaas842de402008-03-04 11:56:47 -0700346int pci_enable_resources(struct pci_dev *dev, int mask)
347{
348 u16 cmd, old_cmd;
349 int i;
350 struct resource *r;
351
352 pci_read_config_word(dev, PCI_COMMAND, &cmd);
353 old_cmd = cmd;
354
355 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
356 if (!(mask & (1 << i)))
357 continue;
358
359 r = &dev->resource[i];
360
361 if (!(r->flags & (IORESOURCE_IO | IORESOURCE_MEM)))
362 continue;
363 if ((i == PCI_ROM_RESOURCE) &&
364 (!(r->flags & IORESOURCE_ROM_ENABLE)))
365 continue;
366
Bjorn Helgaas3cedcc32014-02-26 11:26:00 -0700367 if (r->flags & IORESOURCE_UNSET) {
368 dev_err(&dev->dev, "can't enable device: BAR %d %pR not assigned\n",
369 i, r);
370 return -EINVAL;
371 }
372
Bjorn Helgaas842de402008-03-04 11:56:47 -0700373 if (!r->parent) {
Bjorn Helgaas3cedcc32014-02-26 11:26:00 -0700374 dev_err(&dev->dev, "can't enable device: BAR %d %pR not claimed\n",
375 i, r);
Bjorn Helgaas842de402008-03-04 11:56:47 -0700376 return -EINVAL;
377 }
378
379 if (r->flags & IORESOURCE_IO)
380 cmd |= PCI_COMMAND_IO;
381 if (r->flags & IORESOURCE_MEM)
382 cmd |= PCI_COMMAND_MEMORY;
383 }
384
385 if (cmd != old_cmd) {
386 dev_info(&dev->dev, "enabling device (%04x -> %04x)\n",
387 old_cmd, cmd);
388 pci_write_config_word(dev, PCI_COMMAND, cmd);
389 }
390 return 0;
391}