Michal Simek | 5d1b79d | 2015-03-09 09:41:04 +0100 | [diff] [blame] | 1 | /* |
| 2 | * dts file for Xilinx ZynqMP ep108 development board |
| 3 | * |
| 4 | * (C) Copyright 2014 - 2015, Xilinx, Inc. |
| 5 | * |
| 6 | * Michal Simek <michal.simek@xilinx.com> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | */ |
| 13 | |
| 14 | /dts-v1/; |
| 15 | |
| 16 | /include/ "zynqmp.dtsi" |
| 17 | |
| 18 | / { |
| 19 | model = "ZynqMP EP108"; |
| 20 | |
| 21 | aliases { |
| 22 | serial0 = &uart0; |
| 23 | }; |
| 24 | |
| 25 | chosen { |
| 26 | stdout-path = "serial0:115200n8"; |
| 27 | }; |
| 28 | |
| 29 | memory { |
| 30 | device_type = "memory"; |
| 31 | reg = <0x0 0x0 0x40000000>; |
| 32 | }; |
| 33 | }; |
| 34 | |
Michal Simek | 3a8691f | 2015-07-27 11:15:38 +0200 | [diff] [blame] | 35 | &can0 { |
| 36 | status = "okay"; |
| 37 | }; |
| 38 | |
Michal Simek | 5d1b79d | 2015-03-09 09:41:04 +0100 | [diff] [blame] | 39 | &gem0 { |
| 40 | status = "okay"; |
| 41 | phy-handle = <&phy0>; |
| 42 | phy-mode = "rgmii-id"; |
| 43 | phy0: phy@0{ |
| 44 | reg = <0>; |
| 45 | max-speed = <100>; |
| 46 | }; |
| 47 | }; |
| 48 | |
Michal Simek | b72b44b | 2015-07-27 11:09:30 +0200 | [diff] [blame] | 49 | &gpio { |
| 50 | status = "okay"; |
| 51 | }; |
| 52 | |
Michal Simek | c5909746 | 2015-07-27 11:38:46 +0200 | [diff] [blame] | 53 | &i2c0 { |
| 54 | status = "okay"; |
| 55 | clock-frequency = <400000>; |
| 56 | eeprom@54 { |
| 57 | compatible = "at,24c64"; |
| 58 | reg = <0x54>; |
| 59 | }; |
| 60 | }; |
| 61 | |
| 62 | &i2c1 { |
| 63 | status = "okay"; |
| 64 | clock-frequency = <400000>; |
| 65 | eeprom@55 { |
| 66 | compatible = "at,24c64"; |
| 67 | reg = <0x55>; |
| 68 | }; |
| 69 | }; |
| 70 | |
Suneel Garapati | 8fae442 | 2015-06-10 15:46:56 +0530 | [diff] [blame] | 71 | &sata { |
| 72 | status = "okay"; |
| 73 | ceva,broken-gen2; |
| 74 | }; |
| 75 | |
Michal Simek | 34ad39b | 2015-07-27 11:24:55 +0200 | [diff] [blame] | 76 | &sdhci0 { |
| 77 | status = "okay"; |
| 78 | }; |
| 79 | |
| 80 | &sdhci1 { |
| 81 | status = "okay"; |
| 82 | }; |
| 83 | |
Michal Simek | 0fcb064 | 2015-07-27 11:42:12 +0200 | [diff] [blame^] | 84 | &spi0 { |
| 85 | status = "okay"; |
| 86 | num-cs = <1>; |
| 87 | spi0_flash0: spi0_flash0@0 { |
| 88 | compatible = "m25p80"; |
| 89 | #address-cells = <1>; |
| 90 | #size-cells = <1>; |
| 91 | spi-max-frequency = <50000000>; |
| 92 | reg = <0>; |
| 93 | |
| 94 | spi0_flash0@00000000 { |
| 95 | label = "spi0_flash0"; |
| 96 | reg = <0x0 0x100000>; |
| 97 | }; |
| 98 | }; |
| 99 | }; |
| 100 | |
| 101 | &spi1 { |
| 102 | status = "okay"; |
| 103 | num-cs = <1>; |
| 104 | spi1_flash0: spi1_flash0@0 { |
| 105 | compatible = "m25p80"; |
| 106 | #address-cells = <1>; |
| 107 | #size-cells = <1>; |
| 108 | spi-max-frequency = <50000000>; |
| 109 | reg = <0>; |
| 110 | |
| 111 | spi1_flash0@00000000 { |
| 112 | label = "spi1_flash0"; |
| 113 | reg = <0x0 0x100000>; |
| 114 | }; |
| 115 | }; |
| 116 | }; |
| 117 | |
Michal Simek | 5d1b79d | 2015-03-09 09:41:04 +0100 | [diff] [blame] | 118 | &uart0 { |
| 119 | status = "okay"; |
| 120 | }; |
Michal Simek | 22eda14 | 2015-07-27 11:21:20 +0200 | [diff] [blame] | 121 | |
| 122 | &usb0 { |
| 123 | status = "okay"; |
| 124 | dr_mode = "peripheral"; |
| 125 | maximum-speed = "high-speed"; |
| 126 | }; |
| 127 | |
| 128 | &usb1 { |
| 129 | status = "okay"; |
| 130 | dr_mode = "host"; |
| 131 | maximum-speed = "high-speed"; |
| 132 | }; |
Michal Simek | c7c09d1 | 2015-07-27 11:23:43 +0200 | [diff] [blame] | 133 | |
| 134 | &watchdog0 { |
| 135 | status = "okay"; |
| 136 | }; |