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Adrian Bunkb00dc832008-05-19 16:52:27 -07001/*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002 * VISsave.S: Code for saving FPU register state for
3 * VIS routines. One should not call this directly,
4 * but use macros provided in <asm/visasm.h>.
5 *
6 * Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz)
7 */
8
Sam Ravnborg73958c62015-08-07 20:34:12 +02009#include <linux/linkage.h>
10
Linus Torvalds1da177e2005-04-16 15:20:36 -070011#include <asm/asi.h>
12#include <asm/page.h>
13#include <asm/ptrace.h>
14#include <asm/visasm.h>
15#include <asm/thread_info.h>
Al Virod3867f042016-01-16 21:39:30 -050016#include <asm/export.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070017
Linus Torvalds1da177e2005-04-16 15:20:36 -070018 /* On entry: %o5=current FPRS value, %g7 is callers address */
19 /* May clobber %o5, %g1, %g2, %g3, %g7, %icc, %xcc */
20
21 /* Nothing special need be done here to handle pre-emption, this
22 * FPU save/restore mechanism is already preemption safe.
23 */
Sam Ravnborg73958c62015-08-07 20:34:12 +020024 .text
Linus Torvalds1da177e2005-04-16 15:20:36 -070025 .align 32
Sam Ravnborg73958c62015-08-07 20:34:12 +020026ENTRY(VISenter)
Linus Torvalds1da177e2005-04-16 15:20:36 -070027 ldub [%g6 + TI_FPDEPTH], %g1
28 brnz,a,pn %g1, 1f
29 cmp %g1, 1
30 stb %g0, [%g6 + TI_FPSAVED]
31 stx %fsr, [%g6 + TI_XFSR]
329: jmpl %g7 + %g0, %g0
33 nop
341: bne,pn %icc, 2f
35
36 srl %g1, 1, %g1
37vis1: ldub [%g6 + TI_FPSAVED], %g3
38 stx %fsr, [%g6 + TI_XFSR]
39 or %g3, %o5, %g3
40 stb %g3, [%g6 + TI_FPSAVED]
41 rd %gsr, %g3
42 clr %g1
43 ba,pt %xcc, 3f
44
45 stx %g3, [%g6 + TI_GSR]
462: add %g6, %g1, %g3
David S. Miller44922152015-08-06 19:13:25 -070047 mov FPRS_DU | FPRS_DL | FPRS_FEF, %o5
48 sll %g1, 3, %g1
Linus Torvalds1da177e2005-04-16 15:20:36 -070049 stb %o5, [%g3 + TI_FPSAVED]
50 rd %gsr, %g2
51 add %g6, %g1, %g3
52 stx %g2, [%g3 + TI_GSR]
53
54 add %g6, %g1, %g2
55 stx %fsr, [%g2 + TI_XFSR]
56 sll %g1, 5, %g1
573: andcc %o5, FPRS_DL|FPRS_DU, %g0
58 be,pn %icc, 9b
59 add %g6, TI_FPREGS, %g2
60 andcc %o5, FPRS_DL, %g0
Linus Torvalds1da177e2005-04-16 15:20:36 -070061
62 be,pn %icc, 4f
63 add %g6, TI_FPREGS+0x40, %g3
David S. Millerba6399332005-10-07 13:30:49 -070064 membar #Sync
Linus Torvalds1da177e2005-04-16 15:20:36 -070065 stda %f0, [%g2 + %g1] ASI_BLK_P
66 stda %f16, [%g3 + %g1] ASI_BLK_P
David S. Millerba6399332005-10-07 13:30:49 -070067 membar #Sync
Linus Torvalds1da177e2005-04-16 15:20:36 -070068 andcc %o5, FPRS_DU, %g0
69 be,pn %icc, 5f
704: add %g1, 128, %g1
David S. Millerba6399332005-10-07 13:30:49 -070071 membar #Sync
Linus Torvalds1da177e2005-04-16 15:20:36 -070072 stda %f32, [%g2 + %g1] ASI_BLK_P
73
74 stda %f48, [%g3 + %g1] ASI_BLK_P
755: membar #Sync
David S. Millerb445e262005-06-27 15:42:04 -070076 ba,pt %xcc, 80f
77 nop
78
79 .align 32
8080: jmpl %g7 + %g0, %g0
Linus Torvalds1da177e2005-04-16 15:20:36 -070081 nop
Sam Ravnborg73958c62015-08-07 20:34:12 +020082ENDPROC(VISenter)
Al Virod3867f042016-01-16 21:39:30 -050083EXPORT_SYMBOL(VISenter)