blob: 8e8b35a899012961aa6967cb5e8dd7115cf0afb4 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002 * Copyright (C) 2000 Andre Hedrick <andre@linux-ide.org>
Linus Torvalds1da177e2005-04-16 15:20:36 -07003 * Copyright (C) 2000 Mark Lord <mlord@pobox.com>
Bartlomiej Zolnierkiewicz5fd216b2007-05-16 00:51:43 +02004 * Copyright (C) 2007 Bartlomiej Zolnierkiewicz
5 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07006 * May be copied or modified under the terms of the GNU General Public License
7 *
8 * Development of this chipset driver was funded
9 * by the nice folks at National Semiconductor.
10 *
11 * Documentation:
12 * CS5530 documentation available from National Semiconductor.
13 */
14
Linus Torvalds1da177e2005-04-16 15:20:36 -070015#include <linux/module.h>
16#include <linux/types.h>
17#include <linux/kernel.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070018#include <linux/pci.h>
19#include <linux/init.h>
20#include <linux/ide.h>
Bartlomiej Zolnierkiewicz78829dd2008-02-02 19:56:33 +010021
Linus Torvalds1da177e2005-04-16 15:20:36 -070022#include <asm/io.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070023
Bartlomiej Zolnierkiewiczced3ec82008-07-24 22:53:32 +020024#define DRV_NAME "cs5530"
25
Linus Torvalds1da177e2005-04-16 15:20:36 -070026/*
27 * Here are the standard PIO mode 0-4 timings for each "format".
28 * Format-0 uses fast data reg timings, with slower command reg timings.
29 * Format-1 uses fast timings for all registers, but won't work with all drives.
30 */
31static unsigned int cs5530_pio_timings[2][5] = {
32 {0x00009172, 0x00012171, 0x00020080, 0x00032010, 0x00040010},
33 {0xd1329172, 0x71212171, 0x30200080, 0x20102010, 0x00100010}
34};
35
36/*
37 * After chip reset, the PIO timings are set to 0x0000e132, which is not valid.
38 */
39#define CS5530_BAD_PIO(timings) (((timings)&~0x80000000)==0x0000e132)
40#define CS5530_BASEREG(hwif) (((hwif)->dma_base & ~0xf) + ((hwif)->channel ? 0x30 : 0x20))
41
42/**
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +020043 * cs5530_set_pio_mode - set host controller for PIO mode
Bartlomiej Zolnierkiewicz26bcb872007-10-11 23:54:00 +020044 * @drive: drive
45 * @pio: PIO mode number
Linus Torvalds1da177e2005-04-16 15:20:36 -070046 *
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +020047 * Handles setting of PIO mode for the chipset.
Linus Torvalds1da177e2005-04-16 15:20:36 -070048 *
Bartlomiej Zolnierkiewicz26bcb872007-10-11 23:54:00 +020049 * The init_hwif_cs5530() routine guarantees that all drives
Linus Torvalds1da177e2005-04-16 15:20:36 -070050 * will have valid default PIO timings set up before we get here.
51 */
52
Bartlomiej Zolnierkiewicz26bcb872007-10-11 23:54:00 +020053static void cs5530_set_pio_mode(ide_drive_t *drive, const u8 pio)
Linus Torvalds1da177e2005-04-16 15:20:36 -070054{
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +020055 unsigned long basereg = CS5530_BASEREG(drive->hwif);
56 unsigned int format = (inl(basereg + 4) >> 31) & 1;
57
58 outl(cs5530_pio_timings[format][pio], basereg + ((drive->dn & 1)<<3));
Linus Torvalds1da177e2005-04-16 15:20:36 -070059}
60
61/**
Bartlomiej Zolnierkiewicz5fd216b2007-05-16 00:51:43 +020062 * cs5530_udma_filter - UDMA filter
63 * @drive: drive
64 *
65 * cs5530_udma_filter() does UDMA mask filtering for the given drive
66 * taking into the consideration capabilities of the mate device.
67 *
68 * The CS5530 specifies that two drives sharing a cable cannot mix
69 * UDMA/MDMA. It has to be one or the other, for the pair, though
70 * different timings can still be chosen for each drive. We could
71 * set the appropriate timing bits on the fly, but that might be
72 * a bit confusing. So, for now we statically handle this requirement
73 * by looking at our mate drive to see what it is capable of, before
74 * choosing a mode for our own drive.
75 *
76 * Note: This relies on the fact we never fail from UDMA to MWDMA2
77 * but instead drop to PIO.
78 */
79
80static u8 cs5530_udma_filter(ide_drive_t *drive)
81{
82 ide_hwif_t *hwif = drive->hwif;
Bartlomiej Zolnierkiewicz7e59ea22008-10-10 22:39:26 +020083 ide_drive_t *mate = ide_get_pair_dev(drive);
Julia Lawall9ecab6e2008-12-22 23:05:06 +010084 u16 *mateid;
Bartlomiej Zolnierkiewicz5fd216b2007-05-16 00:51:43 +020085 u8 mask = hwif->ultra_mask;
86
Bartlomiej Zolnierkiewicz7e59ea22008-10-10 22:39:26 +020087 if (mate == NULL)
Bartlomiej Zolnierkiewicz5fd216b2007-05-16 00:51:43 +020088 goto out;
Julia Lawall9ecab6e2008-12-22 23:05:06 +010089 mateid = mate->id;
Bartlomiej Zolnierkiewicz5fd216b2007-05-16 00:51:43 +020090
Bartlomiej Zolnierkiewicz48fb2682008-10-10 22:39:19 +020091 if (ata_id_has_dma(mateid) && __ide_dma_bad_drive(mate) == 0) {
Bartlomiej Zolnierkiewicz4dde4492008-10-10 22:39:19 +020092 if ((mateid[ATA_ID_FIELD_VALID] & 4) &&
93 (mateid[ATA_ID_UDMA_MODES] & 7))
Bartlomiej Zolnierkiewicz5fd216b2007-05-16 00:51:43 +020094 goto out;
Bartlomiej Zolnierkiewicz4dde4492008-10-10 22:39:19 +020095 if ((mateid[ATA_ID_FIELD_VALID] & 2) &&
96 (mateid[ATA_ID_MWDMA_MODES] & 7))
Bartlomiej Zolnierkiewicz5fd216b2007-05-16 00:51:43 +020097 mask = 0;
98 }
99out:
100 return mask;
101}
102
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200103static void cs5530_set_dma_mode(ide_drive_t *drive, const u8 mode)
Bartlomiej Zolnierkiewicz3c3f5d22007-05-16 00:51:44 +0200104{
105 unsigned long basereg;
106 unsigned int reg, timings = 0;
107
Linus Torvalds1da177e2005-04-16 15:20:36 -0700108 switch (mode) {
109 case XFER_UDMA_0: timings = 0x00921250; break;
110 case XFER_UDMA_1: timings = 0x00911140; break;
111 case XFER_UDMA_2: timings = 0x00911030; break;
112 case XFER_MW_DMA_0: timings = 0x00077771; break;
113 case XFER_MW_DMA_1: timings = 0x00012121; break;
114 case XFER_MW_DMA_2: timings = 0x00002020; break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700115 }
Bartlomiej Zolnierkiewicz3c3f5d22007-05-16 00:51:44 +0200116 basereg = CS5530_BASEREG(drive->hwif);
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100117 reg = inl(basereg + 4); /* get drive0 config register */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700118 timings |= reg & 0x80000000; /* preserve PIO format bit */
Bartlomiej Zolnierkiewicz3c3f5d22007-05-16 00:51:44 +0200119 if ((drive-> dn & 1) == 0) { /* are we configuring drive0? */
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100120 outl(timings, basereg + 4); /* write drive0 config register */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700121 } else {
122 if (timings & 0x00100000)
123 reg |= 0x00100000; /* enable UDMA timings for both drives */
124 else
125 reg &= ~0x00100000; /* disable UDMA timings for both drives */
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100126 outl(reg, basereg + 4); /* write drive0 config register */
127 outl(timings, basereg + 12); /* write drive1 config register */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700128 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700129}
130
131/**
132 * init_chipset_5530 - set up 5530 bridge
133 * @dev: PCI device
Linus Torvalds1da177e2005-04-16 15:20:36 -0700134 *
135 * Initialize the cs5530 bridge for reliable IDE DMA operation.
136 */
137
Bartlomiej Zolnierkiewicz2ed0ef52009-03-24 23:22:53 +0100138static int init_chipset_cs5530(struct pci_dev *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700139{
140 struct pci_dev *master_0 = NULL, *cs5530_0 = NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700141
Bartlomiej Zolnierkiewiczf7b0d2d2007-08-20 22:42:56 +0200142 if (pci_resource_start(dev, 4) == 0)
143 return -EFAULT;
144
Linus Torvalds1da177e2005-04-16 15:20:36 -0700145 dev = NULL;
Alan Cox652aa162006-10-03 01:14:35 -0700146 while ((dev = pci_get_device(PCI_VENDOR_ID_CYRIX, PCI_ANY_ID, dev)) != NULL) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700147 switch (dev->device) {
148 case PCI_DEVICE_ID_CYRIX_PCI_MASTER:
Alan Cox652aa162006-10-03 01:14:35 -0700149 master_0 = pci_dev_get(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700150 break;
151 case PCI_DEVICE_ID_CYRIX_5530_LEGACY:
Alan Cox652aa162006-10-03 01:14:35 -0700152 cs5530_0 = pci_dev_get(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700153 break;
154 }
155 }
156 if (!master_0) {
Bartlomiej Zolnierkiewicza326b022008-07-24 22:53:33 +0200157 printk(KERN_ERR DRV_NAME ": unable to locate PCI MASTER function\n");
Alan Cox652aa162006-10-03 01:14:35 -0700158 goto out;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700159 }
160 if (!cs5530_0) {
Bartlomiej Zolnierkiewicza326b022008-07-24 22:53:33 +0200161 printk(KERN_ERR DRV_NAME ": unable to locate CS5530 LEGACY function\n");
Alan Cox652aa162006-10-03 01:14:35 -0700162 goto out;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700163 }
164
Linus Torvalds1da177e2005-04-16 15:20:36 -0700165 /*
166 * Enable BusMaster and MemoryWriteAndInvalidate for the cs5530:
167 * --> OR 0x14 into 16-bit PCI COMMAND reg of function 0 of the cs5530
168 */
169
170 pci_set_master(cs5530_0);
Randy Dunlap694625c2007-07-09 11:55:54 -0700171 pci_try_set_mwi(cs5530_0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700172
173 /*
174 * Set PCI CacheLineSize to 16-bytes:
175 * --> Write 0x04 into 8-bit PCI CACHELINESIZE reg of function 0 of the cs5530
176 */
177
178 pci_write_config_byte(cs5530_0, PCI_CACHE_LINE_SIZE, 0x04);
179
180 /*
181 * Disable trapping of UDMA register accesses (Win98 hack):
182 * --> Write 0x5006 into 16-bit reg at offset 0xd0 of function 0 of the cs5530
183 */
184
185 pci_write_config_word(cs5530_0, 0xd0, 0x5006);
186
187 /*
188 * Bit-1 at 0x40 enables MemoryWriteAndInvalidate on internal X-bus:
189 * The other settings are what is necessary to get the register
190 * into a sane state for IDE DMA operation.
191 */
192
193 pci_write_config_byte(master_0, 0x40, 0x1e);
194
195 /*
196 * Set max PCI burst size (16-bytes seems to work best):
197 * 16bytes: set bit-1 at 0x41 (reg value of 0x16)
198 * all others: clear bit-1 at 0x41, and do:
199 * 128bytes: OR 0x00 at 0x41
200 * 256bytes: OR 0x04 at 0x41
201 * 512bytes: OR 0x08 at 0x41
202 * 1024bytes: OR 0x0c at 0x41
203 */
204
205 pci_write_config_byte(master_0, 0x41, 0x14);
206
207 /*
208 * These settings are necessary to get the chip
209 * into a sane state for IDE DMA operation.
210 */
211
212 pci_write_config_byte(master_0, 0x42, 0x00);
213 pci_write_config_byte(master_0, 0x43, 0xc1);
214
Alan Cox652aa162006-10-03 01:14:35 -0700215out:
216 pci_dev_put(master_0);
217 pci_dev_put(cs5530_0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700218 return 0;
219}
220
221/**
222 * init_hwif_cs5530 - initialise an IDE channel
223 * @hwif: IDE to initialize
224 *
225 * This gets invoked by the IDE driver once for each channel. It
226 * performs channel-specific pre-initialization before drive probing.
227 */
228
Herbert Xu88de8e92005-07-03 16:23:08 +0200229static void __devinit init_hwif_cs5530 (ide_hwif_t *hwif)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700230{
231 unsigned long basereg;
232 u32 d0_timings;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700233
Linus Torvalds1da177e2005-04-16 15:20:36 -0700234 basereg = CS5530_BASEREG(hwif);
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100235 d0_timings = inl(basereg + 0);
Bartlomiej Zolnierkiewicz93104652007-10-16 22:29:53 +0200236 if (CS5530_BAD_PIO(d0_timings))
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100237 outl(cs5530_pio_timings[(d0_timings >> 31) & 1][0], basereg + 0);
Bartlomiej Zolnierkiewicz93104652007-10-16 22:29:53 +0200238 if (CS5530_BAD_PIO(inl(basereg + 8)))
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100239 outl(cs5530_pio_timings[(d0_timings >> 31) & 1][0], basereg + 8);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700240}
241
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +0200242static const struct ide_port_ops cs5530_port_ops = {
243 .set_pio_mode = cs5530_set_pio_mode,
244 .set_dma_mode = cs5530_set_dma_mode,
245 .udma_filter = cs5530_udma_filter,
246};
247
Bartlomiej Zolnierkiewicz85620432007-10-20 00:32:34 +0200248static const struct ide_port_info cs5530_chipset __devinitdata = {
Bartlomiej Zolnierkiewiczced3ec82008-07-24 22:53:32 +0200249 .name = DRV_NAME,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700250 .init_chipset = init_chipset_cs5530,
251 .init_hwif = init_hwif_cs5530,
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +0200252 .port_ops = &cs5530_port_ops,
Bartlomiej Zolnierkiewicz1c513612007-10-19 00:30:10 +0200253 .host_flags = IDE_HFLAG_SERIALIZE |
Bartlomiej Zolnierkiewicz5e71d9c2008-04-26 17:36:35 +0200254 IDE_HFLAG_POST_SET_MODE,
Bartlomiej Zolnierkiewicz4099d142007-07-20 01:11:59 +0200255 .pio_mask = ATA_PIO4,
Bartlomiej Zolnierkiewicz5f8b6c32007-10-19 00:30:07 +0200256 .mwdma_mask = ATA_MWDMA2,
257 .udma_mask = ATA_UDMA2,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700258};
259
260static int __devinit cs5530_init_one(struct pci_dev *dev, const struct pci_device_id *id)
261{
Bartlomiej Zolnierkiewicz6cdf6eb2008-07-24 22:53:14 +0200262 return ide_pci_init_one(dev, &cs5530_chipset, NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700263}
264
Bartlomiej Zolnierkiewicz9cbcc5e2007-10-16 22:29:56 +0200265static const struct pci_device_id cs5530_pci_tbl[] = {
266 { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5530_IDE), 0 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700267 { 0, },
268};
269MODULE_DEVICE_TABLE(pci, cs5530_pci_tbl);
270
Bartlomiej Zolnierkiewicza9ab09e22008-10-13 21:39:41 +0200271static struct pci_driver cs5530_pci_driver = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700272 .name = "CS5530 IDE",
273 .id_table = cs5530_pci_tbl,
274 .probe = cs5530_init_one,
Bartlomiej Zolnierkiewiczd16492a2008-07-24 22:53:20 +0200275 .remove = ide_pci_remove,
Bartlomiej Zolnierkiewiczfeb22b72008-10-10 22:39:32 +0200276 .suspend = ide_pci_suspend,
277 .resume = ide_pci_resume,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700278};
279
Bartlomiej Zolnierkiewicz82ab1ee2007-01-27 13:46:56 +0100280static int __init cs5530_ide_init(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700281{
Bartlomiej Zolnierkiewicza9ab09e22008-10-13 21:39:41 +0200282 return ide_pci_register_driver(&cs5530_pci_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700283}
284
Bartlomiej Zolnierkiewiczd16492a2008-07-24 22:53:20 +0200285static void __exit cs5530_ide_exit(void)
286{
Bartlomiej Zolnierkiewicza9ab09e22008-10-13 21:39:41 +0200287 pci_unregister_driver(&cs5530_pci_driver);
Bartlomiej Zolnierkiewiczd16492a2008-07-24 22:53:20 +0200288}
289
Linus Torvalds1da177e2005-04-16 15:20:36 -0700290module_init(cs5530_ide_init);
Bartlomiej Zolnierkiewiczd16492a2008-07-24 22:53:20 +0200291module_exit(cs5530_ide_exit);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700292
293MODULE_AUTHOR("Mark Lord");
294MODULE_DESCRIPTION("PCI driver module for Cyrix/NS 5530 IDE");
295MODULE_LICENSE("GPL");