Alexandre TORGUE | ec2f9b1 | 2016-11-15 12:01:57 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com> |
| 3 | * |
| 4 | * This file is dual-licensed: you can use it either under the terms |
| 5 | * of the GPL or the X11 license, at your option. Note that this dual |
| 6 | * licensing only applies to this file, and not this project as a |
| 7 | * whole. |
| 8 | * |
| 9 | * a) This file is free software; you can redistribute it and/or |
| 10 | * modify it under the terms of the GNU General Public License as |
| 11 | * published by the Free Software Foundation; either version 2 of the |
| 12 | * License, or (at your option) any later version. |
| 13 | * |
| 14 | * This file is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * Or, alternatively, |
| 20 | * |
| 21 | * b) Permission is hereby granted, free of charge, to any person |
| 22 | * obtaining a copy of this software and associated documentation |
| 23 | * files (the "Software"), to deal in the Software without |
| 24 | * restriction, including without limitation the rights to use, |
| 25 | * copy, modify, merge, publish, distribute, sublicense, and/or |
| 26 | * sell copies of the Software, and to permit persons to whom the |
| 27 | * Software is furnished to do so, subject to the following |
| 28 | * conditions: |
| 29 | * |
| 30 | * The above copyright notice and this permission notice shall be |
| 31 | * included in all copies or substantial portions of the Software. |
| 32 | * |
| 33 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 34 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES |
| 35 | * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| 36 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT |
| 37 | * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, |
| 38 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 39 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 40 | * OTHER DEALINGS IN THE SOFTWARE. |
| 41 | */ |
| 42 | |
| 43 | #include "skeleton.dtsi" |
| 44 | #include "armv7-m.dtsi" |
| 45 | #include <dt-bindings/pinctrl/stm32f746-pinfunc.h> |
| 46 | |
| 47 | / { |
| 48 | clocks { |
| 49 | clk_hse: clk-hse { |
| 50 | #clock-cells = <0>; |
| 51 | compatible = "fixed-clock"; |
| 52 | clock-frequency = <0>; |
| 53 | }; |
| 54 | }; |
| 55 | |
| 56 | soc { |
| 57 | timer2: timer@40000000 { |
| 58 | compatible = "st,stm32-timer"; |
| 59 | reg = <0x40000000 0x400>; |
| 60 | interrupts = <28>; |
| 61 | clocks = <&rcc 0 128>; |
| 62 | status = "disabled"; |
| 63 | }; |
| 64 | |
| 65 | timer3: timer@40000400 { |
| 66 | compatible = "st,stm32-timer"; |
| 67 | reg = <0x40000400 0x400>; |
| 68 | interrupts = <29>; |
| 69 | clocks = <&rcc 0 129>; |
| 70 | status = "disabled"; |
| 71 | }; |
| 72 | |
| 73 | timer4: timer@40000800 { |
| 74 | compatible = "st,stm32-timer"; |
| 75 | reg = <0x40000800 0x400>; |
| 76 | interrupts = <30>; |
| 77 | clocks = <&rcc 0 130>; |
| 78 | status = "disabled"; |
| 79 | }; |
| 80 | |
| 81 | timer5: timer@40000c00 { |
| 82 | compatible = "st,stm32-timer"; |
| 83 | reg = <0x40000c00 0x400>; |
| 84 | interrupts = <50>; |
| 85 | clocks = <&rcc 0 131>; |
| 86 | }; |
| 87 | |
| 88 | timer6: timer@40001000 { |
| 89 | compatible = "st,stm32-timer"; |
| 90 | reg = <0x40001000 0x400>; |
| 91 | interrupts = <54>; |
| 92 | clocks = <&rcc 0 132>; |
| 93 | status = "disabled"; |
| 94 | }; |
| 95 | |
| 96 | timer7: timer@40001400 { |
| 97 | compatible = "st,stm32-timer"; |
| 98 | reg = <0x40001400 0x400>; |
| 99 | interrupts = <55>; |
| 100 | clocks = <&rcc 0 133>; |
| 101 | status = "disabled"; |
| 102 | }; |
| 103 | |
| 104 | usart2: serial@40004400 { |
| 105 | compatible = "st,stm32f7-usart", "st,stm32f7-uart"; |
| 106 | reg = <0x40004400 0x400>; |
| 107 | interrupts = <38>; |
| 108 | clocks = <&rcc 0 145>; |
| 109 | status = "disabled"; |
| 110 | }; |
| 111 | |
| 112 | usart3: serial@40004800 { |
| 113 | compatible = "st,stm32f7-usart", "st,stm32f7-uart"; |
| 114 | reg = <0x40004800 0x400>; |
| 115 | interrupts = <39>; |
| 116 | clocks = <&rcc 0 146>; |
| 117 | status = "disabled"; |
| 118 | }; |
| 119 | |
| 120 | usart4: serial@40004c00 { |
| 121 | compatible = "st,stm32f7-uart"; |
| 122 | reg = <0x40004c00 0x400>; |
| 123 | interrupts = <52>; |
| 124 | clocks = <&rcc 0 147>; |
| 125 | status = "disabled"; |
| 126 | }; |
| 127 | |
| 128 | usart5: serial@40005000 { |
| 129 | compatible = "st,stm32f7-uart"; |
| 130 | reg = <0x40005000 0x400>; |
| 131 | interrupts = <53>; |
| 132 | clocks = <&rcc 0 148>; |
| 133 | status = "disabled"; |
| 134 | }; |
| 135 | |
| 136 | usart7: serial@40007800 { |
| 137 | compatible = "st,stm32f7-usart", "st,stm32f7-uart"; |
| 138 | reg = <0x40007800 0x400>; |
| 139 | interrupts = <82>; |
| 140 | clocks = <&rcc 0 158>; |
| 141 | status = "disabled"; |
| 142 | }; |
| 143 | |
| 144 | usart8: serial@40007c00 { |
| 145 | compatible = "st,stm32f7-usart", "st,stm32f7-uart"; |
| 146 | reg = <0x40007c00 0x400>; |
| 147 | interrupts = <83>; |
| 148 | clocks = <&rcc 0 159>; |
| 149 | status = "disabled"; |
| 150 | }; |
| 151 | |
| 152 | usart1: serial@40011000 { |
| 153 | compatible = "st,stm32f7-usart", "st,stm32f7-uart"; |
| 154 | reg = <0x40011000 0x400>; |
| 155 | interrupts = <37>; |
| 156 | clocks = <&rcc 0 164>; |
| 157 | status = "disabled"; |
| 158 | }; |
| 159 | |
| 160 | usart6: serial@40011400 { |
| 161 | compatible = "st,stm32f7-usart", "st,stm32f7-uart"; |
| 162 | reg = <0x40011400 0x400>; |
| 163 | interrupts = <71>; |
| 164 | clocks = <&rcc 0 165>; |
| 165 | status = "disabled"; |
| 166 | }; |
| 167 | |
| 168 | syscfg: system-config@40013800 { |
| 169 | compatible = "syscon"; |
| 170 | reg = <0x40013800 0x400>; |
| 171 | }; |
| 172 | |
| 173 | exti: interrupt-controller@40013c00 { |
| 174 | compatible = "st,stm32-exti"; |
| 175 | interrupt-controller; |
| 176 | #interrupt-cells = <2>; |
| 177 | reg = <0x40013C00 0x400>; |
| 178 | interrupts = <1>, <2>, <3>, <6>, <7>, <8>, <9>, <10>, <23>, <40>, <41>, <42>, <62>, <76>; |
| 179 | }; |
| 180 | |
| 181 | pin-controller { |
| 182 | #address-cells = <1>; |
| 183 | #size-cells = <1>; |
| 184 | compatible = "st,stm32f746-pinctrl"; |
| 185 | ranges = <0 0x40020000 0x3000>; |
| 186 | interrupt-parent = <&exti>; |
| 187 | st,syscfg = <&syscfg 0x8>; |
| 188 | pins-are-numbered; |
| 189 | |
| 190 | gpioa: gpio@40020000 { |
| 191 | gpio-controller; |
| 192 | #gpio-cells = <2>; |
| 193 | reg = <0x0 0x400>; |
| 194 | clocks = <&rcc 0 256>; |
| 195 | st,bank-name = "GPIOA"; |
| 196 | }; |
| 197 | |
| 198 | gpiob: gpio@40020400 { |
| 199 | gpio-controller; |
| 200 | #gpio-cells = <2>; |
| 201 | reg = <0x400 0x400>; |
| 202 | clocks = <&rcc 0 257>; |
| 203 | st,bank-name = "GPIOB"; |
| 204 | }; |
| 205 | |
| 206 | gpioc: gpio@40020800 { |
| 207 | gpio-controller; |
| 208 | #gpio-cells = <2>; |
| 209 | reg = <0x800 0x400>; |
| 210 | clocks = <&rcc 0 258>; |
| 211 | st,bank-name = "GPIOC"; |
| 212 | }; |
| 213 | |
| 214 | gpiod: gpio@40020c00 { |
| 215 | gpio-controller; |
| 216 | #gpio-cells = <2>; |
| 217 | reg = <0xc00 0x400>; |
| 218 | clocks = <&rcc 0 259>; |
| 219 | st,bank-name = "GPIOD"; |
| 220 | }; |
| 221 | |
| 222 | gpioe: gpio@40021000 { |
| 223 | gpio-controller; |
| 224 | #gpio-cells = <2>; |
| 225 | reg = <0x1000 0x400>; |
| 226 | clocks = <&rcc 0 260>; |
| 227 | st,bank-name = "GPIOE"; |
| 228 | }; |
| 229 | |
| 230 | gpiof: gpio@40021400 { |
| 231 | gpio-controller; |
| 232 | #gpio-cells = <2>; |
| 233 | reg = <0x1400 0x400>; |
| 234 | clocks = <&rcc 0 261>; |
| 235 | st,bank-name = "GPIOF"; |
| 236 | }; |
| 237 | |
| 238 | gpiog: gpio@40021800 { |
| 239 | gpio-controller; |
| 240 | #gpio-cells = <2>; |
| 241 | reg = <0x1800 0x400>; |
| 242 | clocks = <&rcc 0 262>; |
| 243 | st,bank-name = "GPIOG"; |
| 244 | }; |
| 245 | |
| 246 | gpioh: gpio@40021c00 { |
| 247 | gpio-controller; |
| 248 | #gpio-cells = <2>; |
| 249 | reg = <0x1c00 0x400>; |
| 250 | clocks = <&rcc 0 263>; |
| 251 | st,bank-name = "GPIOH"; |
| 252 | }; |
| 253 | |
| 254 | gpioi: gpio@40022000 { |
| 255 | gpio-controller; |
| 256 | #gpio-cells = <2>; |
| 257 | reg = <0x2000 0x400>; |
| 258 | clocks = <&rcc 0 264>; |
| 259 | st,bank-name = "GPIOI"; |
| 260 | }; |
| 261 | |
| 262 | gpioj: gpio@40022400 { |
| 263 | gpio-controller; |
| 264 | #gpio-cells = <2>; |
| 265 | reg = <0x2400 0x400>; |
| 266 | clocks = <&rcc 0 265>; |
| 267 | st,bank-name = "GPIOJ"; |
| 268 | }; |
| 269 | |
| 270 | gpiok: gpio@40022800 { |
| 271 | gpio-controller; |
| 272 | #gpio-cells = <2>; |
| 273 | reg = <0x2800 0x400>; |
| 274 | clocks = <&rcc 0 266>; |
| 275 | st,bank-name = "GPIOK"; |
| 276 | }; |
| 277 | |
| 278 | usart1_pins_a: usart1@0 { |
| 279 | pins1 { |
| 280 | pinmux = <STM32F746_PA9_FUNC_USART1_TX>; |
| 281 | bias-disable; |
| 282 | drive-push-pull; |
| 283 | slew-rate = <0>; |
| 284 | }; |
| 285 | pins2 { |
| 286 | pinmux = <STM32F746_PA10_FUNC_USART1_RX>; |
| 287 | bias-disable; |
| 288 | }; |
| 289 | }; |
| 290 | }; |
| 291 | |
Fabien DESSENNE | 115d691 | 2017-03-21 16:13:29 +0100 | [diff] [blame^] | 292 | crc: crc@40023000 { |
| 293 | compatible = "st,stm32f7-crc"; |
| 294 | reg = <0x40023000 0x400>; |
| 295 | clocks = <&rcc 0 12>; |
| 296 | status = "disabled"; |
| 297 | }; |
| 298 | |
Alexandre TORGUE | ec2f9b1 | 2016-11-15 12:01:57 +0100 | [diff] [blame] | 299 | rcc: rcc@40023800 { |
| 300 | #clock-cells = <2>; |
| 301 | compatible = "st,stm32f42xx-rcc", "st,stm32-rcc"; |
| 302 | reg = <0x40023800 0x400>; |
| 303 | clocks = <&clk_hse>; |
| 304 | }; |
| 305 | }; |
| 306 | }; |
| 307 | |
| 308 | &systick { |
| 309 | clocks = <&rcc 1 0>; |
| 310 | status = "okay"; |
| 311 | }; |