blob: 05d45994480eaf8b2dae60ae59aeb439b2ebb05b [file] [log] [blame]
Martin Strubel471b9a62008-01-27 19:54:20 +08001/*
Robin Getz96f10502009-09-24 14:11:24 +00002 * Copyright 2004-2009 Analog Devices Inc.
3 * 2008-2009 Cambridge Signal Processing
4 * 2005 National ICT Australia (NICTA)
5 * Aidan Williams <aidan@nicta.com.au>
6 *
7 * Licensed under the GPL-2 or later.
Martin Strubel471b9a62008-01-27 19:54:20 +08008 */
9
10#include <linux/device.h>
11#include <linux/platform_device.h>
12#include <linux/mtd/mtd.h>
13#include <linux/mtd/partitions.h>
14#include <linux/spi/spi.h>
15#include <linux/spi/flash.h>
16#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
Peter Korsgaardf950f602008-04-24 03:34:13 +080017#include <linux/usb/isp1362.h>
Martin Strubel471b9a62008-01-27 19:54:20 +080018#endif
Jeff Garzik0a87e3e2008-02-01 18:02:30 -050019#include <linux/ata_platform.h>
Martin Strubel471b9a62008-01-27 19:54:20 +080020#include <linux/irq.h>
21#include <linux/interrupt.h>
Peter Korsgaardf950f602008-04-24 03:34:13 +080022#include <linux/usb/sl811.h>
Martin Strubel471b9a62008-01-27 19:54:20 +080023#include <asm/dma.h>
24#include <asm/bfin5xx_spi.h>
25#include <asm/reboot.h>
Mike Frysinger11cabcb2010-04-15 16:31:43 +000026#include <asm/portmux.h>
Martin Strubel471b9a62008-01-27 19:54:20 +080027#include <linux/spi/ad7877.h>
28
29/*
30 * Name the Board for the /proc/cpuinfo
31 */
Mike Frysinger11cabcb2010-04-15 16:31:43 +000032const char bfin_board_name[] = "CamSig Minotaur BF537";
Martin Strubel471b9a62008-01-27 19:54:20 +080033
34#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
35static struct resource bfin_pcmcia_cf_resources[] = {
36 {
37 .start = 0x20310000, /* IO PORT */
38 .end = 0x20312000,
39 .flags = IORESOURCE_MEM,
40 }, {
41 .start = 0x20311000, /* Attribute Memory */
42 .end = 0x20311FFF,
43 .flags = IORESOURCE_MEM,
44 }, {
45 .start = IRQ_PF4,
46 .end = IRQ_PF4,
47 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
48 }, {
49 .start = IRQ_PF6, /* Card Detect PF6 */
50 .end = IRQ_PF6,
51 .flags = IORESOURCE_IRQ,
52 },
53};
54
55static struct platform_device bfin_pcmcia_cf_device = {
56 .name = "bfin_cf_pcmcia",
57 .id = -1,
58 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
59 .resource = bfin_pcmcia_cf_resources,
60};
61#endif
62
63#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
64static struct platform_device rtc_device = {
65 .name = "rtc-bfin",
66 .id = -1,
67};
68#endif
69
70#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
Graf Yang65319622009-02-04 16:49:45 +080071static struct platform_device bfin_mii_bus = {
72 .name = "bfin_mii_bus",
73};
74
Martin Strubel471b9a62008-01-27 19:54:20 +080075static struct platform_device bfin_mac_device = {
76 .name = "bfin_mac",
Graf Yang65319622009-02-04 16:49:45 +080077 .dev.platform_data = &bfin_mii_bus,
Martin Strubel471b9a62008-01-27 19:54:20 +080078};
79#endif
80
81#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
82static struct resource net2272_bfin_resources[] = {
83 {
84 .start = 0x20300000,
85 .end = 0x20300000 + 0x100,
86 .flags = IORESOURCE_MEM,
87 }, {
88 .start = IRQ_PF7,
89 .end = IRQ_PF7,
90 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
91 },
92};
93
94static struct platform_device net2272_bfin_device = {
95 .name = "net2272",
96 .id = -1,
97 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
98 .resource = net2272_bfin_resources,
99};
100#endif
101
102#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
103/* all SPI peripherals info goes here */
104
105#if defined(CONFIG_MTD_M25P80) \
106 || defined(CONFIG_MTD_M25P80_MODULE)
107
108/* Partition sizes */
109#define FLASH_SIZE 0x00400000
110#define PSIZE_UBOOT 0x00030000
111#define PSIZE_INITRAMFS 0x00240000
112
113static struct mtd_partition bfin_spi_flash_partitions[] = {
114 {
Robin Getzaa582972008-08-05 17:47:29 +0800115 .name = "bootloader(spi)",
Martin Strubel471b9a62008-01-27 19:54:20 +0800116 .size = PSIZE_UBOOT,
117 .offset = 0x000000,
118 .mask_flags = MTD_CAP_ROM
119 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800120 .name = "initramfs(spi)",
Martin Strubel471b9a62008-01-27 19:54:20 +0800121 .size = PSIZE_INITRAMFS,
122 .offset = PSIZE_UBOOT
123 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800124 .name = "opt(spi)",
Martin Strubel471b9a62008-01-27 19:54:20 +0800125 .size = FLASH_SIZE - (PSIZE_UBOOT + PSIZE_INITRAMFS),
126 .offset = PSIZE_UBOOT + PSIZE_INITRAMFS,
127 }
128};
129
130static struct flash_platform_data bfin_spi_flash_data = {
131 .name = "m25p80",
132 .parts = bfin_spi_flash_partitions,
133 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
134 .type = "m25p64",
135};
136
137/* SPI flash chip (m25p64) */
138static struct bfin5xx_spi_chip spi_flash_chip_info = {
139 .enable_dma = 0, /* use dma transfer with this chip*/
140 .bits_per_word = 8,
141};
142#endif
143
Michael Hennerichf3f704d2009-03-06 00:27:57 +0800144#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
145static struct bfin5xx_spi_chip mmc_spi_chip_info = {
146 .enable_dma = 0,
Martin Strubel471b9a62008-01-27 19:54:20 +0800147 .bits_per_word = 8,
148};
149#endif
150
151static struct spi_board_info bfin_spi_board_info[] __initdata = {
152#if defined(CONFIG_MTD_M25P80) \
153 || defined(CONFIG_MTD_M25P80_MODULE)
154 {
155 /* the modalias must be the same as spi device driver name */
156 .modalias = "m25p80", /* Name of spi_driver for this device */
157 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
158 .bus_num = 0, /* Framework bus number */
159 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
160 .platform_data = &bfin_spi_flash_data,
161 .controller_data = &spi_flash_chip_info,
162 .mode = SPI_MODE_3,
163 },
164#endif
165
Michael Hennerichf3f704d2009-03-06 00:27:57 +0800166#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
Martin Strubel471b9a62008-01-27 19:54:20 +0800167 {
Michael Hennerichf3f704d2009-03-06 00:27:57 +0800168 .modalias = "mmc_spi",
Martin Strubel471b9a62008-01-27 19:54:20 +0800169 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
170 .bus_num = 0,
Michael Hennerichf3f704d2009-03-06 00:27:57 +0800171 .chip_select = 5,
172 .controller_data = &mmc_spi_chip_info,
Martin Strubel471b9a62008-01-27 19:54:20 +0800173 .mode = SPI_MODE_3,
174 },
175#endif
176};
177
178/* SPI controller data */
179static struct bfin5xx_spi_master bfin_spi0_info = {
180 .num_chipselect = 8,
181 .enable_dma = 1, /* master has the ability to do dma transfer */
182};
183
184/* SPI (0) */
185static struct resource bfin_spi0_resource[] = {
186 [0] = {
187 .start = SPI0_REGBASE,
188 .end = SPI0_REGBASE + 0xFF,
189 .flags = IORESOURCE_MEM,
190 },
191 [1] = {
192 .start = CH_SPI,
193 .end = CH_SPI,
Yi Li53122692009-06-05 12:11:11 +0000194 .flags = IORESOURCE_DMA,
195 },
196 [2] = {
197 .start = IRQ_SPI,
198 .end = IRQ_SPI,
Martin Strubel471b9a62008-01-27 19:54:20 +0800199 .flags = IORESOURCE_IRQ,
200 },
201};
202
203static struct platform_device bfin_spi0_device = {
204 .name = "bfin-spi",
205 .id = 0, /* Bus number */
206 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
207 .resource = bfin_spi0_resource,
208 .dev = {
209 .platform_data = &bfin_spi0_info, /* Passed to driver */
210 },
211};
212#endif /* spi master and devices */
213
214#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000215#ifdef CONFIG_SERIAL_BFIN_UART0
216static struct resource bfin_uart0_resources[] = {
Martin Strubel471b9a62008-01-27 19:54:20 +0800217 {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000218 .start = UART0_THR,
219 .end = UART0_GCTL+2,
Martin Strubel471b9a62008-01-27 19:54:20 +0800220 .flags = IORESOURCE_MEM,
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000221 },
222 {
223 .start = IRQ_UART0_RX,
224 .end = IRQ_UART0_RX+1,
225 .flags = IORESOURCE_IRQ,
226 },
227 {
228 .start = IRQ_UART0_ERROR,
229 .end = IRQ_UART0_ERROR,
230 .flags = IORESOURCE_IRQ,
231 },
232 {
233 .start = CH_UART0_TX,
234 .end = CH_UART0_TX,
235 .flags = IORESOURCE_DMA,
236 },
237 {
238 .start = CH_UART0_RX,
239 .end = CH_UART0_RX,
240 .flags = IORESOURCE_DMA,
Martin Strubel471b9a62008-01-27 19:54:20 +0800241 },
242};
243
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000244unsigned short bfin_uart0_peripherals[] = {
245 P_UART0_TX, P_UART0_RX, 0
246};
247
248static struct platform_device bfin_uart0_device = {
249 .name = "bfin-uart",
250 .id = 0,
251 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
252 .resource = bfin_uart0_resources,
253 .dev = {
254 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
255 },
256};
257#endif
258#ifdef CONFIG_SERIAL_BFIN_UART1
259static struct resource bfin_uart1_resources[] = {
260 {
261 .start = UART1_THR,
262 .end = UART1_GCTL+2,
263 .flags = IORESOURCE_MEM,
264 },
265 {
266 .start = IRQ_UART1_RX,
267 .end = IRQ_UART1_RX+1,
268 .flags = IORESOURCE_IRQ,
269 },
270 {
271 .start = IRQ_UART1_ERROR,
272 .end = IRQ_UART1_ERROR,
273 .flags = IORESOURCE_IRQ,
274 },
275 {
276 .start = CH_UART1_TX,
277 .end = CH_UART1_TX,
278 .flags = IORESOURCE_DMA,
279 },
280 {
281 .start = CH_UART1_RX,
282 .end = CH_UART1_RX,
283 .flags = IORESOURCE_DMA,
284 },
285};
286
287unsigned short bfin_uart1_peripherals[] = {
288 P_UART1_TX, P_UART1_RX, 0
289};
290
291static struct platform_device bfin_uart1_device = {
Martin Strubel471b9a62008-01-27 19:54:20 +0800292 .name = "bfin-uart",
293 .id = 1,
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000294 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
295 .resource = bfin_uart1_resources,
296 .dev = {
297 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
298 },
Martin Strubel471b9a62008-01-27 19:54:20 +0800299};
300#endif
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000301#endif
Martin Strubel471b9a62008-01-27 19:54:20 +0800302
Graf Yang5be36d22008-04-25 03:09:15 +0800303#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
Graf Yang5be36d22008-04-25 03:09:15 +0800304#ifdef CONFIG_BFIN_SIR0
Graf Yang42bd8bc2009-01-07 23:14:39 +0800305static struct resource bfin_sir0_resources[] = {
Graf Yang5be36d22008-04-25 03:09:15 +0800306 {
307 .start = 0xFFC00400,
308 .end = 0xFFC004FF,
309 .flags = IORESOURCE_MEM,
310 },
Graf Yang42bd8bc2009-01-07 23:14:39 +0800311 {
312 .start = IRQ_UART0_RX,
313 .end = IRQ_UART0_RX+1,
314 .flags = IORESOURCE_IRQ,
315 },
316 {
317 .start = CH_UART0_RX,
318 .end = CH_UART0_RX+1,
319 .flags = IORESOURCE_DMA,
320 },
321};
322
323static struct platform_device bfin_sir0_device = {
324 .name = "bfin_sir",
325 .id = 0,
326 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
327 .resource = bfin_sir0_resources,
328};
Graf Yang5be36d22008-04-25 03:09:15 +0800329#endif
330#ifdef CONFIG_BFIN_SIR1
Graf Yang42bd8bc2009-01-07 23:14:39 +0800331static struct resource bfin_sir1_resources[] = {
Graf Yang5be36d22008-04-25 03:09:15 +0800332 {
333 .start = 0xFFC02000,
334 .end = 0xFFC020FF,
335 .flags = IORESOURCE_MEM,
336 },
Graf Yang42bd8bc2009-01-07 23:14:39 +0800337 {
338 .start = IRQ_UART1_RX,
339 .end = IRQ_UART1_RX+1,
340 .flags = IORESOURCE_IRQ,
341 },
342 {
343 .start = CH_UART1_RX,
344 .end = CH_UART1_RX+1,
345 .flags = IORESOURCE_DMA,
346 },
Graf Yang5be36d22008-04-25 03:09:15 +0800347};
348
Graf Yang42bd8bc2009-01-07 23:14:39 +0800349static struct platform_device bfin_sir1_device = {
Graf Yang5be36d22008-04-25 03:09:15 +0800350 .name = "bfin_sir",
Graf Yang42bd8bc2009-01-07 23:14:39 +0800351 .id = 1,
352 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
353 .resource = bfin_sir1_resources,
Graf Yang5be36d22008-04-25 03:09:15 +0800354};
355#endif
Graf Yang42bd8bc2009-01-07 23:14:39 +0800356#endif
Graf Yang5be36d22008-04-25 03:09:15 +0800357
Martin Strubel471b9a62008-01-27 19:54:20 +0800358#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
359static struct resource bfin_twi0_resource[] = {
360 [0] = {
361 .start = TWI0_REGBASE,
362 .end = TWI0_REGBASE + 0xFF,
363 .flags = IORESOURCE_MEM,
364 },
365 [1] = {
366 .start = IRQ_TWI,
367 .end = IRQ_TWI,
368 .flags = IORESOURCE_IRQ,
369 },
370};
371
372static struct platform_device i2c_bfin_twi_device = {
373 .name = "i2c-bfin-twi",
374 .id = 0,
375 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
376 .resource = bfin_twi0_resource,
377};
378#endif
379
380#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
Sonic Zhangdf5de262009-09-23 05:01:56 +0000381#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
382static struct resource bfin_sport0_uart_resources[] = {
383 {
384 .start = SPORT0_TCR1,
385 .end = SPORT0_MRCS3+4,
386 .flags = IORESOURCE_MEM,
387 },
388 {
389 .start = IRQ_SPORT0_RX,
390 .end = IRQ_SPORT0_RX+1,
391 .flags = IORESOURCE_IRQ,
392 },
393 {
394 .start = IRQ_SPORT0_ERROR,
395 .end = IRQ_SPORT0_ERROR,
396 .flags = IORESOURCE_IRQ,
397 },
398};
399
400unsigned short bfin_sport0_peripherals[] = {
401 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
402 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
403};
404
Martin Strubel471b9a62008-01-27 19:54:20 +0800405static struct platform_device bfin_sport0_uart_device = {
406 .name = "bfin-sport-uart",
407 .id = 0,
Sonic Zhangdf5de262009-09-23 05:01:56 +0000408 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
409 .resource = bfin_sport0_uart_resources,
410 .dev = {
411 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
412 },
413};
414#endif
415#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
416static struct resource bfin_sport1_uart_resources[] = {
417 {
418 .start = SPORT1_TCR1,
419 .end = SPORT1_MRCS3+4,
420 .flags = IORESOURCE_MEM,
421 },
422 {
423 .start = IRQ_SPORT1_RX,
424 .end = IRQ_SPORT1_RX+1,
425 .flags = IORESOURCE_IRQ,
426 },
427 {
428 .start = IRQ_SPORT1_ERROR,
429 .end = IRQ_SPORT1_ERROR,
430 .flags = IORESOURCE_IRQ,
431 },
432};
433
434unsigned short bfin_sport1_peripherals[] = {
435 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
436 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
Martin Strubel471b9a62008-01-27 19:54:20 +0800437};
438
439static struct platform_device bfin_sport1_uart_device = {
440 .name = "bfin-sport-uart",
441 .id = 1,
Sonic Zhangdf5de262009-09-23 05:01:56 +0000442 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
443 .resource = bfin_sport1_uart_resources,
444 .dev = {
445 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
446 },
Martin Strubel471b9a62008-01-27 19:54:20 +0800447};
448#endif
Sonic Zhangdf5de262009-09-23 05:01:56 +0000449#endif
Martin Strubel471b9a62008-01-27 19:54:20 +0800450
451static struct platform_device *minotaur_devices[] __initdata = {
452#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
453 &bfin_pcmcia_cf_device,
454#endif
455
456#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
457 &rtc_device,
458#endif
459
460#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
Graf Yang65319622009-02-04 16:49:45 +0800461 &bfin_mii_bus,
Martin Strubel471b9a62008-01-27 19:54:20 +0800462 &bfin_mac_device,
463#endif
464
465#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
466 &net2272_bfin_device,
467#endif
468
469#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
470 &bfin_spi0_device,
471#endif
472
473#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000474#ifdef CONFIG_SERIAL_BFIN_UART0
475 &bfin_uart0_device,
476#endif
477#ifdef CONFIG_SERIAL_BFIN_UART1
478 &bfin_uart1_device,
479#endif
Martin Strubel471b9a62008-01-27 19:54:20 +0800480#endif
481
Graf Yang5be36d22008-04-25 03:09:15 +0800482#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
Graf Yang42bd8bc2009-01-07 23:14:39 +0800483#ifdef CONFIG_BFIN_SIR0
484 &bfin_sir0_device,
485#endif
486#ifdef CONFIG_BFIN_SIR1
487 &bfin_sir1_device,
488#endif
Graf Yang5be36d22008-04-25 03:09:15 +0800489#endif
490
Martin Strubel471b9a62008-01-27 19:54:20 +0800491#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
492 &i2c_bfin_twi_device,
493#endif
494
495#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
Sonic Zhangdf5de262009-09-23 05:01:56 +0000496#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
Martin Strubel471b9a62008-01-27 19:54:20 +0800497 &bfin_sport0_uart_device,
Sonic Zhangdf5de262009-09-23 05:01:56 +0000498#endif
499#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
Martin Strubel471b9a62008-01-27 19:54:20 +0800500 &bfin_sport1_uart_device,
501#endif
Sonic Zhangdf5de262009-09-23 05:01:56 +0000502#endif
Martin Strubel471b9a62008-01-27 19:54:20 +0800503
504};
505
506static int __init minotaur_init(void)
507{
Harvey Harrisonb85d8582008-04-23 09:39:01 +0800508 printk(KERN_INFO "%s(): registering device resources\n", __func__);
Martin Strubel471b9a62008-01-27 19:54:20 +0800509 platform_add_devices(minotaur_devices, ARRAY_SIZE(minotaur_devices));
510#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
511 spi_register_board_info(bfin_spi_board_info,
512 ARRAY_SIZE(bfin_spi_board_info));
513#endif
514
515 return 0;
516}
517
518arch_initcall(minotaur_init);
519
Sonic Zhangc13ce9f2009-09-23 09:37:46 +0000520static struct platform_device *minotaur_early_devices[] __initdata = {
521#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
522#ifdef CONFIG_SERIAL_BFIN_UART0
523 &bfin_uart0_device,
524#endif
525#ifdef CONFIG_SERIAL_BFIN_UART1
526 &bfin_uart1_device,
527#endif
528#endif
529
530#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
531#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
532 &bfin_sport0_uart_device,
533#endif
534#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
535 &bfin_sport1_uart_device,
536#endif
537#endif
538};
539
540void __init native_machine_early_platform_add_devices(void)
541{
542 printk(KERN_INFO "register early platform devices\n");
543 early_platform_add_devices(minotaur_early_devices,
544 ARRAY_SIZE(minotaur_early_devices));
545}
546
Martin Strubel471b9a62008-01-27 19:54:20 +0800547void native_machine_restart(char *cmd)
548{
549 /* workaround reboot hang when booting from SPI */
550 if ((bfin_read_SYSCR() & 0x7) == 0x3)
Sonic Zhangb52dae32009-02-04 16:49:45 +0800551 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
Martin Strubel471b9a62008-01-27 19:54:20 +0800552}