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Shannon Zhao04fe4722015-09-11 09:38:32 +08001/*
2 * Copyright (C) 2015 Linaro Ltd.
3 * Author: Shannon Zhao <shannon.zhao@linaro.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18#ifndef __ASM_ARM_KVM_PMU_H
19#define __ASM_ARM_KVM_PMU_H
20
Shannon Zhao04fe4722015-09-11 09:38:32 +080021#include <linux/perf_event.h>
22#include <asm/perf_event.h>
23
Shannon Zhao051ff582015-12-08 15:29:06 +080024#define ARMV8_PMU_CYCLE_IDX (ARMV8_PMU_MAX_COUNTERS - 1)
25
Sudeep Holla0efce9d2016-06-08 11:38:55 +010026#ifdef CONFIG_KVM_ARM_PMU
27
Shannon Zhao04fe4722015-09-11 09:38:32 +080028struct kvm_pmc {
29 u8 idx; /* index into the pmu->pmc array */
30 struct perf_event *perf_event;
31 u64 bitmask;
32};
33
34struct kvm_pmu {
35 int irq_num;
36 struct kvm_pmc pmc[ARMV8_PMU_MAX_COUNTERS];
37 bool ready;
Shannon Zhaob02386e2016-02-26 19:29:19 +080038 bool irq_level;
Shannon Zhao04fe4722015-09-11 09:38:32 +080039};
Shannon Zhaoab946832015-06-18 16:01:53 +080040
41#define kvm_arm_pmu_v3_ready(v) ((v)->arch.pmu.ready)
Shannon Zhaobb0c70b2016-01-11 21:35:32 +080042#define kvm_arm_pmu_irq_initialized(v) ((v)->arch.pmu.irq_num >= VGIC_NR_SGIS)
Shannon Zhao051ff582015-12-08 15:29:06 +080043u64 kvm_pmu_get_counter_value(struct kvm_vcpu *vcpu, u64 select_idx);
44void kvm_pmu_set_counter_value(struct kvm_vcpu *vcpu, u64 select_idx, u64 val);
Shannon Zhao96b0eeb2015-09-08 12:26:13 +080045u64 kvm_pmu_valid_counter_mask(struct kvm_vcpu *vcpu);
Shannon Zhao2aa36e92015-09-11 11:30:22 +080046void kvm_pmu_vcpu_reset(struct kvm_vcpu *vcpu);
Shannon Zhao5f0a7142015-09-11 15:18:05 +080047void kvm_pmu_vcpu_destroy(struct kvm_vcpu *vcpu);
Shannon Zhao96b0eeb2015-09-08 12:26:13 +080048void kvm_pmu_disable_counter(struct kvm_vcpu *vcpu, u64 val);
49void kvm_pmu_enable_counter(struct kvm_vcpu *vcpu, u64 val);
Shannon Zhao76d883c2015-09-08 15:03:26 +080050void kvm_pmu_overflow_set(struct kvm_vcpu *vcpu, u64 val);
Shannon Zhaob02386e2016-02-26 19:29:19 +080051void kvm_pmu_flush_hwstate(struct kvm_vcpu *vcpu);
52void kvm_pmu_sync_hwstate(struct kvm_vcpu *vcpu);
Christoffer Dall3dbbdf72017-02-01 12:51:52 +010053bool kvm_pmu_should_notify_user(struct kvm_vcpu *vcpu);
54void kvm_pmu_update_run(struct kvm_vcpu *vcpu);
Shannon Zhao7a0adc72015-09-08 15:49:39 +080055void kvm_pmu_software_increment(struct kvm_vcpu *vcpu, u64 val);
Shannon Zhao76993732015-10-28 12:10:30 +080056void kvm_pmu_handle_pmcr(struct kvm_vcpu *vcpu, u64 val);
Shannon Zhao7f766352015-07-03 14:27:25 +080057void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu, u64 data,
58 u64 select_idx);
Shannon Zhao808e7382016-01-11 22:46:15 +080059bool kvm_arm_support_pmu_v3(void);
Shannon Zhaobb0c70b2016-01-11 21:35:32 +080060int kvm_arm_pmu_v3_set_attr(struct kvm_vcpu *vcpu,
61 struct kvm_device_attr *attr);
62int kvm_arm_pmu_v3_get_attr(struct kvm_vcpu *vcpu,
63 struct kvm_device_attr *attr);
64int kvm_arm_pmu_v3_has_attr(struct kvm_vcpu *vcpu,
65 struct kvm_device_attr *attr);
Shannon Zhao04fe4722015-09-11 09:38:32 +080066#else
67struct kvm_pmu {
68};
Shannon Zhaoab946832015-06-18 16:01:53 +080069
70#define kvm_arm_pmu_v3_ready(v) (false)
Shannon Zhaobb0c70b2016-01-11 21:35:32 +080071#define kvm_arm_pmu_irq_initialized(v) (false)
Shannon Zhao051ff582015-12-08 15:29:06 +080072static inline u64 kvm_pmu_get_counter_value(struct kvm_vcpu *vcpu,
73 u64 select_idx)
74{
75 return 0;
76}
77static inline void kvm_pmu_set_counter_value(struct kvm_vcpu *vcpu,
78 u64 select_idx, u64 val) {}
Shannon Zhao96b0eeb2015-09-08 12:26:13 +080079static inline u64 kvm_pmu_valid_counter_mask(struct kvm_vcpu *vcpu)
80{
81 return 0;
82}
Shannon Zhao2aa36e92015-09-11 11:30:22 +080083static inline void kvm_pmu_vcpu_reset(struct kvm_vcpu *vcpu) {}
Shannon Zhao5f0a7142015-09-11 15:18:05 +080084static inline void kvm_pmu_vcpu_destroy(struct kvm_vcpu *vcpu) {}
Shannon Zhao96b0eeb2015-09-08 12:26:13 +080085static inline void kvm_pmu_disable_counter(struct kvm_vcpu *vcpu, u64 val) {}
86static inline void kvm_pmu_enable_counter(struct kvm_vcpu *vcpu, u64 val) {}
Shannon Zhao76d883c2015-09-08 15:03:26 +080087static inline void kvm_pmu_overflow_set(struct kvm_vcpu *vcpu, u64 val) {}
Shannon Zhaob02386e2016-02-26 19:29:19 +080088static inline void kvm_pmu_flush_hwstate(struct kvm_vcpu *vcpu) {}
89static inline void kvm_pmu_sync_hwstate(struct kvm_vcpu *vcpu) {}
Christoffer Dall3dbbdf72017-02-01 12:51:52 +010090static inline bool kvm_pmu_should_notify_user(struct kvm_vcpu *vcpu)
91{
92 return false;
93}
94static inline void kvm_pmu_update_run(struct kvm_vcpu *vcpu) {}
Shannon Zhao7a0adc72015-09-08 15:49:39 +080095static inline void kvm_pmu_software_increment(struct kvm_vcpu *vcpu, u64 val) {}
Shannon Zhao76993732015-10-28 12:10:30 +080096static inline void kvm_pmu_handle_pmcr(struct kvm_vcpu *vcpu, u64 val) {}
Shannon Zhao7f766352015-07-03 14:27:25 +080097static inline void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu,
98 u64 data, u64 select_idx) {}
Shannon Zhao808e7382016-01-11 22:46:15 +080099static inline bool kvm_arm_support_pmu_v3(void) { return false; }
Shannon Zhaobb0c70b2016-01-11 21:35:32 +0800100static inline int kvm_arm_pmu_v3_set_attr(struct kvm_vcpu *vcpu,
101 struct kvm_device_attr *attr)
102{
103 return -ENXIO;
104}
105static inline int kvm_arm_pmu_v3_get_attr(struct kvm_vcpu *vcpu,
106 struct kvm_device_attr *attr)
107{
108 return -ENXIO;
109}
110static inline int kvm_arm_pmu_v3_has_attr(struct kvm_vcpu *vcpu,
111 struct kvm_device_attr *attr)
112{
113 return -ENXIO;
114}
Shannon Zhao04fe4722015-09-11 09:38:32 +0800115#endif
116
117#endif