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Thomas Chou0b782532011-02-14 10:10:43 +08001/*
2 * Altera SPI driver
3 *
4 * Copyright (C) 2008 Thomas Chou <thomas@wytron.com.tw>
5 *
6 * Based on spi_s3c24xx.c, which is:
7 * Copyright (c) 2006 Ben Dooks
8 * Copyright (c) 2006 Simtec Electronics
9 * Ben Dooks <ben@simtec.co.uk>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
Thomas Chou0b782532011-02-14 10:10:43 +080016#include <linux/interrupt.h>
17#include <linux/errno.h>
Paul Gortmakerd7614de2011-07-03 15:44:29 -040018#include <linux/module.h>
Thomas Chou0b782532011-02-14 10:10:43 +080019#include <linux/platform_device.h>
20#include <linux/spi/spi.h>
Thomas Chou0b782532011-02-14 10:10:43 +080021#include <linux/io.h>
22#include <linux/of.h>
23
24#define DRV_NAME "spi_altera"
25
26#define ALTERA_SPI_RXDATA 0
27#define ALTERA_SPI_TXDATA 4
28#define ALTERA_SPI_STATUS 8
29#define ALTERA_SPI_CONTROL 12
30#define ALTERA_SPI_SLAVE_SEL 20
31
32#define ALTERA_SPI_STATUS_ROE_MSK 0x8
33#define ALTERA_SPI_STATUS_TOE_MSK 0x10
34#define ALTERA_SPI_STATUS_TMT_MSK 0x20
35#define ALTERA_SPI_STATUS_TRDY_MSK 0x40
36#define ALTERA_SPI_STATUS_RRDY_MSK 0x80
37#define ALTERA_SPI_STATUS_E_MSK 0x100
38
39#define ALTERA_SPI_CONTROL_IROE_MSK 0x8
40#define ALTERA_SPI_CONTROL_ITOE_MSK 0x10
41#define ALTERA_SPI_CONTROL_ITRDY_MSK 0x40
42#define ALTERA_SPI_CONTROL_IRRDY_MSK 0x80
43#define ALTERA_SPI_CONTROL_IE_MSK 0x100
44#define ALTERA_SPI_CONTROL_SSO_MSK 0x400
45
46struct altera_spi {
Thomas Chou0b782532011-02-14 10:10:43 +080047 void __iomem *base;
48 int irq;
49 int len;
50 int count;
51 int bytes_per_word;
52 unsigned long imr;
53
54 /* data buffers */
55 const unsigned char *tx;
56 unsigned char *rx;
57};
58
59static inline struct altera_spi *altera_spi_to_hw(struct spi_device *sdev)
60{
61 return spi_master_get_devdata(sdev->master);
62}
63
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +020064static void altera_spi_set_cs(struct spi_device *spi, bool is_high)
Thomas Chou0b782532011-02-14 10:10:43 +080065{
66 struct altera_spi *hw = altera_spi_to_hw(spi);
67
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +020068 if (is_high) {
69 hw->imr &= ~ALTERA_SPI_CONTROL_SSO_MSK;
70 writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
71 writel(0, hw->base + ALTERA_SPI_SLAVE_SEL);
Thomas Chou0b782532011-02-14 10:10:43 +080072 } else {
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +020073 writel(BIT(spi->chip_select), hw->base + ALTERA_SPI_SLAVE_SEL);
74 hw->imr |= ALTERA_SPI_CONTROL_SSO_MSK;
75 writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
Thomas Chou0b782532011-02-14 10:10:43 +080076 }
77}
78
Lars-Peter Clausenb64836a2017-08-16 11:33:12 +020079static void altera_spi_tx_word(struct altera_spi *hw)
Thomas Chou0b782532011-02-14 10:10:43 +080080{
Lars-Peter Clausenb64836a2017-08-16 11:33:12 +020081 unsigned int txd = 0;
82
Thomas Chou0b782532011-02-14 10:10:43 +080083 if (hw->tx) {
84 switch (hw->bytes_per_word) {
85 case 1:
Lars-Peter Clausenb64836a2017-08-16 11:33:12 +020086 txd = hw->tx[hw->count];
87 break;
Thomas Chou0b782532011-02-14 10:10:43 +080088 case 2:
Lars-Peter Clausenb64836a2017-08-16 11:33:12 +020089 txd = (hw->tx[hw->count * 2]
90 | (hw->tx[hw->count * 2 + 1] << 8));
91 break;
Thomas Chou0b782532011-02-14 10:10:43 +080092 }
93 }
Lars-Peter Clausenb64836a2017-08-16 11:33:12 +020094
95 writel(txd, hw->base + ALTERA_SPI_TXDATA);
96}
97
98static void altera_spi_rx_word(struct altera_spi *hw)
99{
100 unsigned int rxd;
101
102 rxd = readl(hw->base + ALTERA_SPI_RXDATA);
103 if (hw->rx) {
104 switch (hw->bytes_per_word) {
105 case 1:
106 hw->rx[hw->count] = rxd;
107 break;
108 case 2:
109 hw->rx[hw->count * 2] = rxd;
110 hw->rx[hw->count * 2 + 1] = rxd >> 8;
111 break;
112 }
113 }
114
115 hw->count++;
Thomas Chou0b782532011-02-14 10:10:43 +0800116}
117
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +0200118static int altera_spi_txrx(struct spi_master *master,
119 struct spi_device *spi, struct spi_transfer *t)
Thomas Chou0b782532011-02-14 10:10:43 +0800120{
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +0200121 struct altera_spi *hw = spi_master_get_devdata(master);
Thomas Chou0b782532011-02-14 10:10:43 +0800122
123 hw->tx = t->tx_buf;
124 hw->rx = t->rx_buf;
125 hw->count = 0;
Axel Linf073d372013-08-29 23:41:20 +0800126 hw->bytes_per_word = DIV_ROUND_UP(t->bits_per_word, 8);
Thomas Chou0b782532011-02-14 10:10:43 +0800127 hw->len = t->len / hw->bytes_per_word;
128
129 if (hw->irq >= 0) {
130 /* enable receive interrupt */
131 hw->imr |= ALTERA_SPI_CONTROL_IRRDY_MSK;
132 writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
133
134 /* send the first byte */
Lars-Peter Clausenb64836a2017-08-16 11:33:12 +0200135 altera_spi_tx_word(hw);
Thomas Chou0b782532011-02-14 10:10:43 +0800136 } else {
Axel Lin72be0ee2013-08-15 14:18:46 +0800137 while (hw->count < hw->len) {
Lars-Peter Clausenb64836a2017-08-16 11:33:12 +0200138 altera_spi_tx_word(hw);
Axel Lin72be0ee2013-08-15 14:18:46 +0800139
Thomas Chou0b782532011-02-14 10:10:43 +0800140 while (!(readl(hw->base + ALTERA_SPI_STATUS) &
141 ALTERA_SPI_STATUS_RRDY_MSK))
142 cpu_relax();
143
Lars-Peter Clausenb64836a2017-08-16 11:33:12 +0200144 altera_spi_rx_word(hw);
Thomas Chou0b782532011-02-14 10:10:43 +0800145 }
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +0200146 spi_finalize_current_transfer(master);
Thomas Chou0b782532011-02-14 10:10:43 +0800147 }
148
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +0200149 return t->len;
Thomas Chou0b782532011-02-14 10:10:43 +0800150}
151
152static irqreturn_t altera_spi_irq(int irq, void *dev)
153{
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +0200154 struct spi_master *master = dev;
155 struct altera_spi *hw = spi_master_get_devdata(master);
Thomas Chou0b782532011-02-14 10:10:43 +0800156
Lars-Peter Clausenb64836a2017-08-16 11:33:12 +0200157 altera_spi_rx_word(hw);
Thomas Chou0b782532011-02-14 10:10:43 +0800158
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +0200159 if (hw->count < hw->len) {
Lars-Peter Clausenb64836a2017-08-16 11:33:12 +0200160 altera_spi_tx_word(hw);
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +0200161 } else {
162 /* disable receive interrupt */
163 hw->imr &= ~ALTERA_SPI_CONTROL_IRRDY_MSK;
164 writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
165
166 spi_finalize_current_transfer(master);
167 }
Thomas Chou0b782532011-02-14 10:10:43 +0800168
169 return IRQ_HANDLED;
170}
171
Grant Likelyfd4a3192012-12-07 16:57:14 +0000172static int altera_spi_probe(struct platform_device *pdev)
Thomas Chou0b782532011-02-14 10:10:43 +0800173{
Thomas Chou0b782532011-02-14 10:10:43 +0800174 struct altera_spi *hw;
175 struct spi_master *master;
176 struct resource *res;
177 int err = -ENODEV;
178
179 master = spi_alloc_master(&pdev->dev, sizeof(struct altera_spi));
180 if (!master)
181 return err;
182
183 /* setup the master state. */
184 master->bus_num = pdev->id;
185 master->num_chipselect = 16;
186 master->mode_bits = SPI_CS_HIGH;
Axel Lin72bb79d2014-03-05 13:37:00 +0800187 master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 16);
Axel Linbf2f2f72014-03-21 11:21:58 +0800188 master->dev.of_node = pdev->dev.of_node;
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +0200189 master->transfer_one = altera_spi_txrx;
190 master->set_cs = altera_spi_set_cs;
Thomas Chou0b782532011-02-14 10:10:43 +0800191
192 hw = spi_master_get_devdata(master);
Thomas Chou0b782532011-02-14 10:10:43 +0800193
194 /* find and map our resources */
195 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Julia Lawallb3136f82013-08-24 19:13:15 +0200196 hw->base = devm_ioremap_resource(&pdev->dev, res);
197 if (IS_ERR(hw->base)) {
198 err = PTR_ERR(hw->base);
199 goto exit;
200 }
Thomas Chou0b782532011-02-14 10:10:43 +0800201 /* program defaults into the registers */
202 hw->imr = 0; /* disable spi interrupts */
203 writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
204 writel(0, hw->base + ALTERA_SPI_STATUS); /* clear status reg */
205 if (readl(hw->base + ALTERA_SPI_STATUS) & ALTERA_SPI_STATUS_RRDY_MSK)
206 readl(hw->base + ALTERA_SPI_RXDATA); /* flush rxdata */
207 /* irq is optional */
208 hw->irq = platform_get_irq(pdev, 0);
209 if (hw->irq >= 0) {
Thomas Chou0b782532011-02-14 10:10:43 +0800210 err = devm_request_irq(&pdev->dev, hw->irq, altera_spi_irq, 0,
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +0200211 pdev->name, master);
Thomas Chou0b782532011-02-14 10:10:43 +0800212 if (err)
213 goto exit;
214 }
Thomas Chou0b782532011-02-14 10:10:43 +0800215
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +0200216 err = devm_spi_register_master(&pdev->dev, master);
Thomas Chou0b782532011-02-14 10:10:43 +0800217 if (err)
218 goto exit;
219 dev_info(&pdev->dev, "base %p, irq %d\n", hw->base, hw->irq);
220
221 return 0;
Thomas Chou0b782532011-02-14 10:10:43 +0800222exit:
Thomas Chou0b782532011-02-14 10:10:43 +0800223 spi_master_put(master);
224 return err;
225}
226
Thomas Chou0b782532011-02-14 10:10:43 +0800227#ifdef CONFIG_OF
228static const struct of_device_id altera_spi_match[] = {
229 { .compatible = "ALTR,spi-1.0", },
Dinh Nguyen13960b42013-08-14 15:25:19 -0500230 { .compatible = "altr,spi-1.0", },
Thomas Chou0b782532011-02-14 10:10:43 +0800231 {},
232};
233MODULE_DEVICE_TABLE(of, altera_spi_match);
Thomas Chou0b782532011-02-14 10:10:43 +0800234#endif /* CONFIG_OF */
235
236static struct platform_driver altera_spi_driver = {
237 .probe = altera_spi_probe,
Thomas Chou0b782532011-02-14 10:10:43 +0800238 .driver = {
239 .name = DRV_NAME,
Thomas Chou0b782532011-02-14 10:10:43 +0800240 .pm = NULL,
Tobias Klauser89f98dc2012-08-15 09:30:28 +0200241 .of_match_table = of_match_ptr(altera_spi_match),
Thomas Chou0b782532011-02-14 10:10:43 +0800242 },
243};
Grant Likely940ab882011-10-05 11:29:49 -0600244module_platform_driver(altera_spi_driver);
Thomas Chou0b782532011-02-14 10:10:43 +0800245
246MODULE_DESCRIPTION("Altera SPI driver");
247MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>");
248MODULE_LICENSE("GPL");
249MODULE_ALIAS("platform:" DRV_NAME);