Blame - drivers/pinctrl/sunxi/Kconfig - kernel/msm-4.19

blob: a0c419ac2a3b7900c4ca6012116a296adcf02db3 [file] [log] [blame]

Maxime Ripard	5f91077	2014-04-18 18:53:02 +0200	[diff] [blame]	1	if ARCH_SUNXI
				2
Masahiro Yamada	3a42a04	2016-01-24 00:32:09 +0900	[diff] [blame]	3	config PINCTRL_SUNXI
Maxime Ripard	118c565	2014-05-22 16:47:12 +0200	[diff] [blame]	4	bool
Maxime Ripard	5f91077	2014-04-18 18:53:02 +0200	[diff] [blame]	5	select PINMUX
				6	select GENERIC_PINCONF
				7
Maxime Ripard	340ba6c	2014-04-26 17:06:57 +0200	[diff] [blame]	8	config PINCTRL_SUN4I_A10
Maxime Ripard	d9ff081	2014-06-29 15:58:19 +0200	[diff] [blame]	9	def_bool MACH_SUN4I
Masahiro Yamada	3a42a04	2016-01-24 00:32:09 +0900	[diff] [blame]	10	select PINCTRL_SUNXI
Maxime Ripard	340ba6c	2014-04-26 17:06:57 +0200	[diff] [blame]	11
Maxime Ripard	858f559	2017-01-08 22:31:16 +0100	[diff] [blame]	12	config PINCTRL_SUN5I
Maxime Ripard	d9ff081	2014-06-29 15:58:19 +0200	[diff] [blame]	13	def_bool MACH_SUN5I
Masahiro Yamada	3a42a04	2016-01-24 00:32:09 +0900	[diff] [blame]	14	select PINCTRL_SUNXI
Maxime Ripard	340ba6c	2014-04-26 17:06:57 +0200	[diff] [blame]	15
Maxime Ripard	340ba6c	2014-04-26 17:06:57 +0200	[diff] [blame]	16	config PINCTRL_SUN6I_A31
Maxime Ripard	d9ff081	2014-06-29 15:58:19 +0200	[diff] [blame]	17	def_bool MACH_SUN6I
Masahiro Yamada	3a42a04	2016-01-24 00:32:09 +0900	[diff] [blame]	18	select PINCTRL_SUNXI
Maxime Ripard	340ba6c	2014-04-26 17:06:57 +0200	[diff] [blame]	19
				20	config PINCTRL_SUN6I_A31_R
Maxime Ripard	d9ff081	2014-06-29 15:58:19 +0200	[diff] [blame]	21	def_bool MACH_SUN6I
Maxime Ripard	de5af04	2014-05-23 20:50:43 +0200	[diff] [blame]	22	depends on RESET_CONTROLLER
Masahiro Yamada	3a42a04	2016-01-24 00:32:09 +0900	[diff] [blame]	23	select PINCTRL_SUNXI
Maxime Ripard	340ba6c	2014-04-26 17:06:57 +0200	[diff] [blame]	24
				25	config PINCTRL_SUN7I_A20
Maxime Ripard	d9ff081	2014-06-29 15:58:19 +0200	[diff] [blame]	26	def_bool MACH_SUN7I
Masahiro Yamada	3a42a04	2016-01-24 00:32:09 +0900	[diff] [blame]	27	select PINCTRL_SUNXI
Maxime Ripard	340ba6c	2014-04-26 17:06:57 +0200	[diff] [blame]	28
Chen-Yu Tsai	4c821d1	2014-06-17 22:52:51 +0800	[diff] [blame]	29	config PINCTRL_SUN8I_A23
				30	def_bool MACH_SUN8I
Masahiro Yamada	3a42a04	2016-01-24 00:32:09 +0900	[diff] [blame]	31	select PINCTRL_SUNXI
Chen-Yu Tsai	4c821d1	2014-06-17 22:52:51 +0800	[diff] [blame]	32
Vishnu Patekar	7164873	2015-06-02 11:08:40 +0200	[diff] [blame]	33	config PINCTRL_SUN8I_A33
				34	def_bool MACH_SUN8I
Masahiro Yamada	3a42a04	2016-01-24 00:32:09 +0900	[diff] [blame]	35	select PINCTRL_SUNXI
Vishnu Patekar	7164873	2015-06-02 11:08:40 +0200	[diff] [blame]	36
Vishnu Patekar	4730f33	2015-09-22 23:38:55 +0800	[diff] [blame]	37	config PINCTRL_SUN8I_A83T
				38	def_bool MACH_SUN8I
Masahiro Yamada	3a42a04	2016-01-24 00:32:09 +0900	[diff] [blame]	39	select PINCTRL_SUNXI
Vishnu Patekar	4730f33	2015-09-22 23:38:55 +0800	[diff] [blame]	40
Chen-Yu Tsai	d22bf40	2014-06-17 22:52:52 +0800	[diff] [blame]	41	config PINCTRL_SUN8I_A23_R
				42	def_bool MACH_SUN8I
				43	depends on RESET_CONTROLLER
Masahiro Yamada	3a42a04	2016-01-24 00:32:09 +0900	[diff] [blame]	44	select PINCTRL_SUNXI
Chen-Yu Tsai	d22bf40	2014-06-17 22:52:52 +0800	[diff] [blame]	45
Jens Kuske	e87623c	2015-12-04 22:24:41 +0100	[diff] [blame]	46	config PINCTRL_SUN8I_H3
				47	def_bool MACH_SUN8I
Masahiro Yamada	3a42a04	2016-01-24 00:32:09 +0900	[diff] [blame]	48	select PINCTRL_SUNXI
Jens Kuske	e87623c	2015-12-04 22:24:41 +0100	[diff] [blame]	49
Krzysztof Adamski	ba83a11	2016-02-02 22:21:51 +0100	[diff] [blame]	50	config PINCTRL_SUN8I_H3_R
Icenowy Zheng	082bc28	2017-03-02 02:01:07 +0800	[diff] [blame]	51	def_bool MACH_SUN8I \|\| (ARM64 && ARCH_SUNXI)
				52	select PINCTRL_SUNXI
Krzysztof Adamski	ba83a11	2016-02-02 22:21:51 +0100	[diff] [blame]	53
Icenowy Zheng	56d9e4a	2017-01-03 23:16:27 +0800	[diff] [blame]	54	config PINCTRL_SUN8I_V3S
				55	def_bool MACH_SUN8I
				56	select PINCTRL_SUNXI
				57
Maxime Ripard	d5e9fb3	2014-10-28 22:41:27 +0100	[diff] [blame]	58	config PINCTRL_SUN9I_A80
				59	def_bool MACH_SUN9I
Masahiro Yamada	3a42a04	2016-01-24 00:32:09 +0900	[diff] [blame]	60	select PINCTRL_SUNXI
Maxime Ripard	d5e9fb3	2014-10-28 22:41:27 +0100	[diff] [blame]	61
Maxime Ripard	0eccc9c	2015-12-17 00:39:42 +0800	[diff] [blame]	62	config PINCTRL_SUN9I_A80_R
				63	def_bool MACH_SUN9I
				64	depends on RESET_CONTROLLER
Masahiro Yamada	3a42a04	2016-01-24 00:32:09 +0900	[diff] [blame]	65	select PINCTRL_SUNXI
Maxime Ripard	0eccc9c	2015-12-17 00:39:42 +0800	[diff] [blame]	66
Andre Przywara	96851d3	2016-03-08 16:37:59 +0700	[diff] [blame]	67	config PINCTRL_SUN50I_A64
Icenowy Zheng	082bc28	2017-03-02 02:01:07 +0800	[diff] [blame]	68	def_bool ARM64 && ARCH_SUNXI
Andre Przywara	96851d3	2016-03-08 16:37:59 +0700	[diff] [blame]	69	select PINCTRL_SUNXI
				70
Icenowy Zheng	14c868b	2017-03-02 02:09:30 +0800	[diff] [blame^]	71	config PINCTRL_SUN50I_A64_R
				72	def_bool ARM64 && ARCH_SUNXI
				73	select PINCTRL_SUNXI
				74
Icenowy Zheng	838adb5	2017-01-26 23:48:51 +0800	[diff] [blame]	75	config PINCTRL_SUN50I_H5
Icenowy Zheng	082bc28	2017-03-02 02:01:07 +0800	[diff] [blame]	76	def_bool ARM64 && ARCH_SUNXI
Icenowy Zheng	838adb5	2017-01-26 23:48:51 +0800	[diff] [blame]	77	select PINCTRL_SUNXI
				78
Maxime Ripard	5f91077	2014-04-18 18:53:02 +0200	[diff] [blame]	79	endif