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Andy Fleming00db8182005-07-30 19:31:23 -04001/*
2 * drivers/net/phy/marvell.c
3 *
4 * Driver for Marvell PHYs
5 *
6 * Author: Andy Fleming
7 *
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
9 *
Michael Stapelberg3871c382013-03-11 13:56:45 +000010 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
11 *
Andy Fleming00db8182005-07-30 19:31:23 -040012 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 *
17 */
Andy Fleming00db8182005-07-30 19:31:23 -040018#include <linux/kernel.h>
Andy Fleming00db8182005-07-30 19:31:23 -040019#include <linux/string.h>
Andrew Lunn0b046802017-01-20 01:37:49 +010020#include <linux/ctype.h>
Andy Fleming00db8182005-07-30 19:31:23 -040021#include <linux/errno.h>
22#include <linux/unistd.h>
Andrew Lunn0b046802017-01-20 01:37:49 +010023#include <linux/hwmon.h>
Andy Fleming00db8182005-07-30 19:31:23 -040024#include <linux/interrupt.h>
25#include <linux/init.h>
26#include <linux/delay.h>
27#include <linux/netdevice.h>
28#include <linux/etherdevice.h>
29#include <linux/skbuff.h>
30#include <linux/spinlock.h>
31#include <linux/mm.h>
32#include <linux/module.h>
Andy Fleming00db8182005-07-30 19:31:23 -040033#include <linux/mii.h>
34#include <linux/ethtool.h>
35#include <linux/phy.h>
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +100036#include <linux/marvell_phy.h>
David Daneycf41a512010-11-19 12:13:18 +000037#include <linux/of.h>
Andy Fleming00db8182005-07-30 19:31:23 -040038
Avinash Kumareea3b202013-09-30 09:36:44 +053039#include <linux/io.h>
Andy Fleming00db8182005-07-30 19:31:23 -040040#include <asm/irq.h>
Avinash Kumareea3b202013-09-30 09:36:44 +053041#include <linux/uaccess.h>
Andy Fleming00db8182005-07-30 19:31:23 -040042
David Daney27d916d2010-11-19 11:58:52 +000043#define MII_MARVELL_PHY_PAGE 22
Andrew Lunn52295662017-05-25 21:42:08 +020044#define MII_MARVELL_COPPER_PAGE 0x00
45#define MII_MARVELL_FIBER_PAGE 0x01
46#define MII_MARVELL_MSCR_PAGE 0x02
47#define MII_MARVELL_LED_PAGE 0x03
48#define MII_MARVELL_MISC_TEST_PAGE 0x06
49#define MII_MARVELL_WOL_PAGE 0x11
David Daney27d916d2010-11-19 11:58:52 +000050
Andy Fleming00db8182005-07-30 19:31:23 -040051#define MII_M1011_IEVENT 0x13
52#define MII_M1011_IEVENT_CLEAR 0x0000
53
54#define MII_M1011_IMASK 0x12
55#define MII_M1011_IMASK_INIT 0x6400
56#define MII_M1011_IMASK_CLEAR 0x0000
57
Andrew Lunnfecd5e92017-07-30 22:41:49 +020058#define MII_M1011_PHY_SCR 0x10
59#define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
60#define MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT 12
Andrew Lunn6ef05eb2017-07-30 22:41:50 +020061#define MII_M1011_PHY_SRC_DOWNSHIFT_MASK 0x7800
Andrew Lunnfecd5e92017-07-30 22:41:49 +020062#define MII_M1011_PHY_SCR_MDI (0x0 << 5)
63#define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
64#define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
Andy Fleming76884672007-02-09 18:13:58 -060065
Andy Fleming76884672007-02-09 18:13:58 -060066#define MII_M1111_PHY_LED_CONTROL 0x18
67#define MII_M1111_PHY_LED_DIRECT 0x4100
68#define MII_M1111_PHY_LED_COMBINE 0x411c
Kim Phillips895ee682007-06-05 18:46:47 +080069#define MII_M1111_PHY_EXT_CR 0x14
Andrew Lunn61111592017-07-30 22:41:46 +020070#define MII_M1111_RGMII_RX_DELAY BIT(7)
71#define MII_M1111_RGMII_TX_DELAY BIT(1)
Kim Phillips895ee682007-06-05 18:46:47 +080072#define MII_M1111_PHY_EXT_SR 0x1b
Alexandr Smirnovbe937f12008-03-19 00:37:24 +030073
74#define MII_M1111_HWCFG_MODE_MASK 0xf
Alexandr Smirnovbe937f12008-03-19 00:37:24 +030075#define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
Kapil Juneja4117b5b2007-05-11 18:25:18 -050076#define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
Andrew Lunn865b813a2017-07-30 22:41:47 +020077#define MII_M1111_HWCFG_MODE_RTBI 0x7
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +000078#define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
Andrew Lunn865b813a2017-07-30 22:41:47 +020079#define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
80#define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
81#define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
Alexandr Smirnovbe937f12008-03-19 00:37:24 +030082
Cyril Chemparathyc477d042010-08-02 09:44:53 +000083#define MII_88E1121_PHY_MSCR_REG 21
84#define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
85#define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
Dan Carpenter5987feb2017-08-04 11:17:21 +030086#define MII_88E1121_PHY_MSCR_DELAY_MASK (~(BIT(5) | BIT(4)))
Cyril Chemparathyc477d042010-08-02 09:44:53 +000087
Andrew Lunn0b046802017-01-20 01:37:49 +010088#define MII_88E1121_MISC_TEST 0x1a
89#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
90#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
91#define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
92#define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
93#define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
94#define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
95
96#define MII_88E1510_TEMP_SENSOR 0x1b
97#define MII_88E1510_TEMP_SENSOR_MASK 0xff
98
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -070099#define MII_88E1318S_PHY_MSCR1_REG 16
100#define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700101
Michael Stapelberg3871c382013-03-11 13:56:45 +0000102/* Copper Specific Interrupt Enable Register */
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200103#define MII_88E1318S_PHY_CSIER 0x12
Michael Stapelberg3871c382013-03-11 13:56:45 +0000104/* WOL Event Interrupt Enable */
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200105#define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
Michael Stapelberg3871c382013-03-11 13:56:45 +0000106
107/* LED Timer Control Register */
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200108#define MII_88E1318S_PHY_LED_TCR 0x12
109#define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
110#define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
111#define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
Michael Stapelberg3871c382013-03-11 13:56:45 +0000112
113/* Magic Packet MAC address registers */
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200114#define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
115#define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
116#define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
Michael Stapelberg3871c382013-03-11 13:56:45 +0000117
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200118#define MII_88E1318S_PHY_WOL_CTRL 0x10
119#define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
120#define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
Michael Stapelberg3871c382013-03-11 13:56:45 +0000121
Sergei Poselenov140bc922009-04-07 02:01:41 +0000122#define MII_88E1121_PHY_LED_CTRL 16
Sergei Poselenov140bc922009-04-07 02:01:41 +0000123#define MII_88E1121_PHY_LED_DEF 0x0030
Sergei Poselenov140bc922009-04-07 02:01:41 +0000124
Alexandr Smirnovbe937f12008-03-19 00:37:24 +0300125#define MII_M1011_PHY_STATUS 0x11
126#define MII_M1011_PHY_STATUS_1000 0x8000
127#define MII_M1011_PHY_STATUS_100 0x4000
128#define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
129#define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
130#define MII_M1011_PHY_STATUS_RESOLVED 0x0800
131#define MII_M1011_PHY_STATUS_LINK 0x0400
132
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200133#define MII_88E3016_PHY_SPEC_CTRL 0x10
134#define MII_88E3016_DISABLE_SCRAMBLER 0x0200
135#define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
Andy Fleming76884672007-02-09 18:13:58 -0600136
Stefan Roese930b37e2016-02-18 10:59:07 +0100137#define MII_88E1510_GEN_CTRL_REG_1 0x14
138#define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
139#define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
140#define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
141
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +0200142#define LPA_FIBER_1000HALF 0x40
143#define LPA_FIBER_1000FULL 0x20
144
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200145#define LPA_PAUSE_FIBER 0x180
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +0200146#define LPA_PAUSE_ASYM_FIBER 0x100
147
148#define ADVERTISE_FIBER_1000HALF 0x40
149#define ADVERTISE_FIBER_1000FULL 0x20
150
151#define ADVERTISE_PAUSE_FIBER 0x180
152#define ADVERTISE_PAUSE_ASYM_FIBER 0x100
153
154#define REGISTER_LINK_STATUS 0x400
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +0200155#define NB_FIBER_STATS 1
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +0200156
Andy Fleming00db8182005-07-30 19:31:23 -0400157MODULE_DESCRIPTION("Marvell PHY driver");
158MODULE_AUTHOR("Andy Fleming");
159MODULE_LICENSE("GPL");
160
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100161struct marvell_hw_stat {
162 const char *string;
163 u8 page;
164 u8 reg;
165 u8 bits;
166};
167
168static struct marvell_hw_stat marvell_hw_stats[] = {
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +0200169 { "phy_receive_errors_copper", 0, 21, 16},
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100170 { "phy_idle_errors", 0, 10, 8 },
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +0200171 { "phy_receive_errors_fiber", 1, 21, 16},
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100172};
173
174struct marvell_priv {
175 u64 stats[ARRAY_SIZE(marvell_hw_stats)];
Andrew Lunn0b046802017-01-20 01:37:49 +0100176 char *hwmon_name;
177 struct device *hwmon_dev;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100178};
179
Andrew Lunn6427bb22017-05-17 03:26:03 +0200180static int marvell_get_page(struct phy_device *phydev)
181{
182 return phy_read(phydev, MII_MARVELL_PHY_PAGE);
183}
184
185static int marvell_set_page(struct phy_device *phydev, int page)
186{
187 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
188}
189
Andrew Lunn53798322017-05-25 21:42:07 +0200190static int marvell_get_set_page(struct phy_device *phydev, int page)
191{
192 int oldpage = marvell_get_page(phydev);
193
194 if (oldpage < 0)
195 return oldpage;
196
197 if (page != oldpage)
198 return marvell_set_page(phydev, page);
199
200 return 0;
201}
202
Andy Fleming00db8182005-07-30 19:31:23 -0400203static int marvell_ack_interrupt(struct phy_device *phydev)
204{
205 int err;
206
207 /* Clear the interrupts by reading the reg */
208 err = phy_read(phydev, MII_M1011_IEVENT);
209
210 if (err < 0)
211 return err;
212
213 return 0;
214}
215
216static int marvell_config_intr(struct phy_device *phydev)
217{
218 int err;
219
Andy Fleming76884672007-02-09 18:13:58 -0600220 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
Andrew Lunn23beb382017-05-17 03:26:04 +0200221 err = phy_write(phydev, MII_M1011_IMASK,
222 MII_M1011_IMASK_INIT);
Andy Fleming00db8182005-07-30 19:31:23 -0400223 else
Andrew Lunn23beb382017-05-17 03:26:04 +0200224 err = phy_write(phydev, MII_M1011_IMASK,
225 MII_M1011_IMASK_CLEAR);
Andy Fleming00db8182005-07-30 19:31:23 -0400226
227 return err;
228}
229
David Thomson239aa552015-07-10 16:28:25 +1200230static int marvell_set_polarity(struct phy_device *phydev, int polarity)
231{
232 int reg;
233 int err;
234 int val;
235
236 /* get the current settings */
237 reg = phy_read(phydev, MII_M1011_PHY_SCR);
238 if (reg < 0)
239 return reg;
240
241 val = reg;
242 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
243 switch (polarity) {
244 case ETH_TP_MDI:
245 val |= MII_M1011_PHY_SCR_MDI;
246 break;
247 case ETH_TP_MDI_X:
248 val |= MII_M1011_PHY_SCR_MDI_X;
249 break;
250 case ETH_TP_MDI_AUTO:
251 case ETH_TP_MDI_INVALID:
252 default:
253 val |= MII_M1011_PHY_SCR_AUTO_CROSS;
254 break;
255 }
256
257 if (val != reg) {
258 /* Set the new polarity value in the register */
259 err = phy_write(phydev, MII_M1011_PHY_SCR, val);
260 if (err)
261 return err;
262 }
263
264 return 0;
265}
266
Andrew Lunn6ef05eb2017-07-30 22:41:50 +0200267static int marvell_set_downshift(struct phy_device *phydev, bool enable,
268 u8 retries)
269{
270 int reg;
271
272 reg = phy_read(phydev, MII_M1011_PHY_SCR);
273 if (reg < 0)
274 return reg;
275
276 reg &= MII_M1011_PHY_SRC_DOWNSHIFT_MASK;
277 reg |= ((retries - 1) << MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT);
278 if (enable)
279 reg |= MII_M1011_PHY_SCR_DOWNSHIFT_EN;
280
281 return phy_write(phydev, MII_M1011_PHY_SCR, reg);
282}
283
Andy Fleming00db8182005-07-30 19:31:23 -0400284static int marvell_config_aneg(struct phy_device *phydev)
285{
286 int err;
287
Raju Lakkaraju4e26c5c2016-11-29 15:16:49 +0530288 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
Andy Fleming76884672007-02-09 18:13:58 -0600289 if (err < 0)
290 return err;
291
292 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
293 MII_M1111_PHY_LED_DIRECT);
294 if (err < 0)
295 return err;
Andy Fleming00db8182005-07-30 19:31:23 -0400296
297 err = genphy_config_aneg(phydev);
Anton Vorontsov8ff44982009-09-09 16:01:30 +0000298 if (err < 0)
299 return err;
Andy Fleming00db8182005-07-30 19:31:23 -0400300
Anton Vorontsov8ff44982009-09-09 16:01:30 +0000301 if (phydev->autoneg != AUTONEG_ENABLE) {
Andrew Lunn0c3439b2017-05-17 03:25:59 +0200302 /* A write to speed/duplex bits (that is performed by
Anton Vorontsov8ff44982009-09-09 16:01:30 +0000303 * genphy_config_aneg() call above) must be followed by
304 * a software reset. Otherwise, the write has no effect.
305 */
Andrew Lunn34386342017-07-30 22:41:45 +0200306 err = genphy_soft_reset(phydev);
Anton Vorontsov8ff44982009-09-09 16:01:30 +0000307 if (err < 0)
308 return err;
309 }
310
311 return 0;
Andy Fleming00db8182005-07-30 19:31:23 -0400312}
313
Andrew Lunnf2899782017-05-23 17:49:13 +0200314static int m88e1101_config_aneg(struct phy_device *phydev)
315{
316 int err;
317
318 /* This Marvell PHY has an errata which requires
319 * that certain registers get written in order
320 * to restart autonegotiation
321 */
Andrew Lunn34386342017-07-30 22:41:45 +0200322 err = genphy_soft_reset(phydev);
Andrew Lunnf2899782017-05-23 17:49:13 +0200323 if (err < 0)
324 return err;
325
326 err = phy_write(phydev, 0x1d, 0x1f);
327 if (err < 0)
328 return err;
329
330 err = phy_write(phydev, 0x1e, 0x200c);
331 if (err < 0)
332 return err;
333
334 err = phy_write(phydev, 0x1d, 0x5);
335 if (err < 0)
336 return err;
337
338 err = phy_write(phydev, 0x1e, 0);
339 if (err < 0)
340 return err;
341
342 err = phy_write(phydev, 0x1e, 0x100);
343 if (err < 0)
344 return err;
345
346 return marvell_config_aneg(phydev);
347}
348
Harini Katakam3ec0a0f2016-06-27 13:09:59 +0530349static int m88e1111_config_aneg(struct phy_device *phydev)
350{
351 int err;
352
353 /* The Marvell PHY has an errata which requires
354 * that certain registers get written in order
355 * to restart autonegotiation
356 */
Andrew Lunn34386342017-07-30 22:41:45 +0200357 err = genphy_soft_reset(phydev);
Harini Katakam3ec0a0f2016-06-27 13:09:59 +0530358
Raju Lakkaraju4e26c5c2016-11-29 15:16:49 +0530359 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
Harini Katakam3ec0a0f2016-06-27 13:09:59 +0530360 if (err < 0)
361 return err;
362
363 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
364 MII_M1111_PHY_LED_DIRECT);
365 if (err < 0)
366 return err;
367
368 err = genphy_config_aneg(phydev);
369 if (err < 0)
370 return err;
371
372 if (phydev->autoneg != AUTONEG_ENABLE) {
Harini Katakam3ec0a0f2016-06-27 13:09:59 +0530373 /* A write to speed/duplex bits (that is performed by
374 * genphy_config_aneg() call above) must be followed by
375 * a software reset. Otherwise, the write has no effect.
376 */
Andrew Lunn34386342017-07-30 22:41:45 +0200377 err = genphy_soft_reset(phydev);
Harini Katakam3ec0a0f2016-06-27 13:09:59 +0530378 if (err < 0)
379 return err;
380 }
381
382 return 0;
383}
384
David Daneycf41a512010-11-19 12:13:18 +0000385#ifdef CONFIG_OF_MDIO
Andrew Lunn0c3439b2017-05-17 03:25:59 +0200386/* Set and/or override some configuration registers based on the
David Daneycf41a512010-11-19 12:13:18 +0000387 * marvell,reg-init property stored in the of_node for the phydev.
388 *
389 * marvell,reg-init = <reg-page reg mask value>,...;
390 *
391 * There may be one or more sets of <reg-page reg mask value>:
392 *
393 * reg-page: which register bank to use.
394 * reg: the register.
395 * mask: if non-zero, ANDed with existing register value.
396 * value: ORed with the masked value and written to the regiser.
397 *
398 */
399static int marvell_of_reg_init(struct phy_device *phydev)
400{
401 const __be32 *paddr;
Uwe Kleine-Königb5718b52016-11-10 15:03:01 +0100402 int len, i, saved_page, current_page, ret;
David Daneycf41a512010-11-19 12:13:18 +0000403
Andrew Lunne5a03bf2016-01-06 20:11:16 +0100404 if (!phydev->mdio.dev.of_node)
David Daneycf41a512010-11-19 12:13:18 +0000405 return 0;
406
Andrew Lunne5a03bf2016-01-06 20:11:16 +0100407 paddr = of_get_property(phydev->mdio.dev.of_node,
408 "marvell,reg-init", &len);
David Daneycf41a512010-11-19 12:13:18 +0000409 if (!paddr || len < (4 * sizeof(*paddr)))
410 return 0;
411
Andrew Lunn6427bb22017-05-17 03:26:03 +0200412 saved_page = marvell_get_page(phydev);
David Daneycf41a512010-11-19 12:13:18 +0000413 if (saved_page < 0)
414 return saved_page;
David Daneycf41a512010-11-19 12:13:18 +0000415 current_page = saved_page;
416
417 ret = 0;
418 len /= sizeof(*paddr);
419 for (i = 0; i < len - 3; i += 4) {
Andrew Lunn6427bb22017-05-17 03:26:03 +0200420 u16 page = be32_to_cpup(paddr + i);
David Daneycf41a512010-11-19 12:13:18 +0000421 u16 reg = be32_to_cpup(paddr + i + 1);
422 u16 mask = be32_to_cpup(paddr + i + 2);
423 u16 val_bits = be32_to_cpup(paddr + i + 3);
424 int val;
425
Andrew Lunn6427bb22017-05-17 03:26:03 +0200426 if (page != current_page) {
427 current_page = page;
428 ret = marvell_set_page(phydev, page);
David Daneycf41a512010-11-19 12:13:18 +0000429 if (ret < 0)
430 goto err;
431 }
432
433 val = 0;
434 if (mask) {
435 val = phy_read(phydev, reg);
436 if (val < 0) {
437 ret = val;
438 goto err;
439 }
440 val &= mask;
441 }
442 val |= val_bits;
443
444 ret = phy_write(phydev, reg, val);
445 if (ret < 0)
446 goto err;
David Daneycf41a512010-11-19 12:13:18 +0000447 }
448err:
Uwe Kleine-Königb5718b52016-11-10 15:03:01 +0100449 if (current_page != saved_page) {
Andrew Lunn6427bb22017-05-17 03:26:03 +0200450 i = marvell_set_page(phydev, saved_page);
David Daneycf41a512010-11-19 12:13:18 +0000451 if (ret == 0)
452 ret = i;
453 }
454 return ret;
455}
456#else
457static int marvell_of_reg_init(struct phy_device *phydev)
458{
459 return 0;
460}
461#endif /* CONFIG_OF_MDIO */
462
Andrew Lunn864dc722017-07-30 22:41:48 +0200463static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
Sergei Poselenov140bc922009-04-07 02:01:41 +0000464{
Cyril Chemparathyc477d042010-08-02 09:44:53 +0000465 int err, oldpage, mscr;
466
Andrew Lunn52295662017-05-25 21:42:08 +0200467 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MSCR_PAGE);
Andrew Lunn53798322017-05-25 21:42:07 +0200468 if (oldpage < 0)
469 return oldpage;
Cyril Chemparathyc477d042010-08-02 09:44:53 +0000470
Andrew Lunn864dc722017-07-30 22:41:48 +0200471 mscr = phy_read(phydev, MII_88E1121_PHY_MSCR_REG);
472 if (mscr < 0) {
473 err = mscr;
474 goto out;
Arnaud Patardbe8c6482010-10-21 03:59:57 -0700475 }
Cyril Chemparathyc477d042010-08-02 09:44:53 +0000476
Andrew Lunn864dc722017-07-30 22:41:48 +0200477 mscr &= MII_88E1121_PHY_MSCR_DELAY_MASK;
478
479 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
480 mscr |= (MII_88E1121_PHY_MSCR_RX_DELAY |
481 MII_88E1121_PHY_MSCR_TX_DELAY);
482 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
483 mscr |= MII_88E1121_PHY_MSCR_RX_DELAY;
484 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
485 mscr |= MII_88E1121_PHY_MSCR_TX_DELAY;
486
487 err = phy_write(phydev, MII_88E1121_PHY_MSCR_REG, mscr);
488
489out:
Andrew Lunn6427bb22017-05-17 03:26:03 +0200490 marvell_set_page(phydev, oldpage);
Sergei Poselenov140bc922009-04-07 02:01:41 +0000491
Andrew Lunn864dc722017-07-30 22:41:48 +0200492 return err;
493}
494
495static int m88e1121_config_aneg(struct phy_device *phydev)
496{
497 int err = 0;
498
499 if (phy_interface_is_rgmii(phydev)) {
500 err = m88e1121_config_aneg_rgmii_delays(phydev);
501 if (err)
502 return err;
503 }
504
Andrew Lunn34386342017-07-30 22:41:45 +0200505 err = genphy_soft_reset(phydev);
Sergei Poselenov140bc922009-04-07 02:01:41 +0000506 if (err < 0)
507 return err;
508
Andrew Lunnfecd5e92017-07-30 22:41:49 +0200509 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
Sergei Poselenov140bc922009-04-07 02:01:41 +0000510 if (err < 0)
511 return err;
512
Clemens Gruberfdecf362016-06-11 17:21:26 +0200513 return genphy_config_aneg(phydev);
Sergei Poselenov140bc922009-04-07 02:01:41 +0000514}
515
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -0700516static int m88e1318_config_aneg(struct phy_device *phydev)
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700517{
518 int err, oldpage, mscr;
519
Andrew Lunn52295662017-05-25 21:42:08 +0200520 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MSCR_PAGE);
Andrew Lunn53798322017-05-25 21:42:07 +0200521 if (oldpage < 0)
522 return oldpage;
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700523
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -0700524 mscr = phy_read(phydev, MII_88E1318S_PHY_MSCR1_REG);
525 mscr |= MII_88E1318S_PHY_MSCR1_PAD_ODD;
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700526
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -0700527 err = phy_write(phydev, MII_88E1318S_PHY_MSCR1_REG, mscr);
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700528 if (err < 0)
529 return err;
530
Andrew Lunn6427bb22017-05-17 03:26:03 +0200531 err = marvell_set_page(phydev, oldpage);
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700532 if (err < 0)
533 return err;
534
535 return m88e1121_config_aneg(phydev);
536}
537
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200538/**
539 * ethtool_adv_to_fiber_adv_t
540 * @ethadv: the ethtool advertisement settings
541 *
542 * A small helper function that translates ethtool advertisement
543 * settings to phy autonegotiation advertisements for the
544 * MII_ADV register for fiber link.
545 */
546static inline u32 ethtool_adv_to_fiber_adv_t(u32 ethadv)
547{
548 u32 result = 0;
549
550 if (ethadv & ADVERTISED_1000baseT_Half)
551 result |= ADVERTISE_FIBER_1000HALF;
552 if (ethadv & ADVERTISED_1000baseT_Full)
553 result |= ADVERTISE_FIBER_1000FULL;
554
555 if ((ethadv & ADVERTISE_PAUSE_ASYM) && (ethadv & ADVERTISE_PAUSE_CAP))
556 result |= LPA_PAUSE_ASYM_FIBER;
557 else if (ethadv & ADVERTISE_PAUSE_CAP)
558 result |= (ADVERTISE_PAUSE_FIBER
559 & (~ADVERTISE_PAUSE_ASYM_FIBER));
560
561 return result;
562}
563
564/**
565 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
566 * @phydev: target phy_device struct
567 *
568 * Description: If auto-negotiation is enabled, we configure the
569 * advertising, and then restart auto-negotiation. If it is not
570 * enabled, then we write the BMCR. Adapted for fiber link in
571 * some Marvell's devices.
572 */
573static int marvell_config_aneg_fiber(struct phy_device *phydev)
574{
575 int changed = 0;
576 int err;
577 int adv, oldadv;
578 u32 advertise;
579
580 if (phydev->autoneg != AUTONEG_ENABLE)
581 return genphy_setup_forced(phydev);
582
583 /* Only allow advertising what this PHY supports */
584 phydev->advertising &= phydev->supported;
585 advertise = phydev->advertising;
586
587 /* Setup fiber advertisement */
588 adv = phy_read(phydev, MII_ADVERTISE);
589 if (adv < 0)
590 return adv;
591
592 oldadv = adv;
593 adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL
594 | LPA_PAUSE_FIBER);
595 adv |= ethtool_adv_to_fiber_adv_t(advertise);
596
597 if (adv != oldadv) {
598 err = phy_write(phydev, MII_ADVERTISE, adv);
599 if (err < 0)
600 return err;
601
602 changed = 1;
603 }
604
605 if (changed == 0) {
606 /* Advertisement hasn't changed, but maybe aneg was never on to
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200607 * begin with? Or maybe phy was isolated?
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200608 */
609 int ctl = phy_read(phydev, MII_BMCR);
610
611 if (ctl < 0)
612 return ctl;
613
614 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
615 changed = 1; /* do restart aneg */
616 }
617
618 /* Only restart aneg if we are advertising something different
619 * than we were before.
620 */
621 if (changed > 0)
622 changed = genphy_restart_aneg(phydev);
623
624 return changed;
625}
626
Michal Simek10e24caa2013-05-30 20:08:27 +0000627static int m88e1510_config_aneg(struct phy_device *phydev)
628{
629 int err;
630
Andrew Lunn52295662017-05-25 21:42:08 +0200631 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200632 if (err < 0)
633 goto error;
634
635 /* Configure the copper link first */
Michal Simek10e24caa2013-05-30 20:08:27 +0000636 err = m88e1318_config_aneg(phydev);
637 if (err < 0)
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200638 goto error;
Michal Simek10e24caa2013-05-30 20:08:27 +0000639
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200640 /* Then the fiber link */
Andrew Lunn52295662017-05-25 21:42:08 +0200641 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200642 if (err < 0)
643 goto error;
644
645 err = marvell_config_aneg_fiber(phydev);
646 if (err < 0)
647 goto error;
648
Andrew Lunn52295662017-05-25 21:42:08 +0200649 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200650
651error:
Andrew Lunn52295662017-05-25 21:42:08 +0200652 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200653 return err;
Clemens Gruber79be1a12016-02-15 23:46:45 +0100654}
655
656static int marvell_config_init(struct phy_device *phydev)
657{
658 /* Set registers from marvell,reg-init DT property */
Michal Simek10e24caa2013-05-30 20:08:27 +0000659 return marvell_of_reg_init(phydev);
660}
661
Michal Simek3da09a52013-05-30 20:08:26 +0000662static int m88e1116r_config_init(struct phy_device *phydev)
663{
Michal Simek3da09a52013-05-30 20:08:26 +0000664 int err;
665
Andrew Lunn34386342017-07-30 22:41:45 +0200666 err = genphy_soft_reset(phydev);
Michal Simek3da09a52013-05-30 20:08:26 +0000667 if (err < 0)
668 return err;
669
670 mdelay(500);
671
Andrew Lunn52295662017-05-25 21:42:08 +0200672 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Michal Simek3da09a52013-05-30 20:08:26 +0000673 if (err < 0)
674 return err;
675
Andrew Lunnfecd5e92017-07-30 22:41:49 +0200676 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
677 if (err < 0)
678 return err;
679
Andrew Lunn6ef05eb2017-07-30 22:41:50 +0200680 err = marvell_set_downshift(phydev, true, 8);
Michal Simek3da09a52013-05-30 20:08:26 +0000681 if (err < 0)
682 return err;
683
Andrew Lunn14fc0ab2017-10-31 20:31:28 +0100684 if (phy_interface_is_rgmii(phydev)) {
685 err = m88e1121_config_aneg_rgmii_delays(phydev);
686 if (err < 0)
687 return err;
688 }
Michal Simek3da09a52013-05-30 20:08:26 +0000689
Andrew Lunn34386342017-07-30 22:41:45 +0200690 err = genphy_soft_reset(phydev);
Michal Simek3da09a52013-05-30 20:08:26 +0000691 if (err < 0)
692 return err;
693
Clemens Gruber79be1a12016-02-15 23:46:45 +0100694 return marvell_config_init(phydev);
Michal Simek3da09a52013-05-30 20:08:26 +0000695}
696
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200697static int m88e3016_config_init(struct phy_device *phydev)
698{
699 int reg;
700
701 /* Enable Scrambler and Auto-Crossover */
702 reg = phy_read(phydev, MII_88E3016_PHY_SPEC_CTRL);
703 if (reg < 0)
704 return reg;
705
706 reg &= ~MII_88E3016_DISABLE_SCRAMBLER;
707 reg |= MII_88E3016_AUTO_MDIX_CROSSOVER;
708
709 reg = phy_write(phydev, MII_88E3016_PHY_SPEC_CTRL, reg);
710 if (reg < 0)
711 return reg;
712
Clemens Gruber79be1a12016-02-15 23:46:45 +0100713 return marvell_config_init(phydev);
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200714}
715
Andrew Lunn865b813a2017-07-30 22:41:47 +0200716static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
717 u16 mode,
718 int fibre_copper_auto)
719{
720 int temp;
721
722 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
723 if (temp < 0)
724 return temp;
725
726 temp &= ~(MII_M1111_HWCFG_MODE_MASK |
727 MII_M1111_HWCFG_FIBER_COPPER_AUTO |
728 MII_M1111_HWCFG_FIBER_COPPER_RES);
729 temp |= mode;
730
731 if (fibre_copper_auto)
732 temp |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
733
734 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
735}
736
Andrew Lunn61111592017-07-30 22:41:46 +0200737static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
Kim Phillips895ee682007-06-05 18:46:47 +0800738{
Alexandr Smirnovbe937f12008-03-19 00:37:24 +0300739 int temp;
Alexandr Smirnovbe937f12008-03-19 00:37:24 +0300740
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200741 temp = phy_read(phydev, MII_M1111_PHY_EXT_CR);
742 if (temp < 0)
743 return temp;
744
745 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
Andrew Lunn61111592017-07-30 22:41:46 +0200746 temp |= (MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200747 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
Andrew Lunn61111592017-07-30 22:41:46 +0200748 temp &= ~MII_M1111_RGMII_TX_DELAY;
749 temp |= MII_M1111_RGMII_RX_DELAY;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200750 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
Andrew Lunn61111592017-07-30 22:41:46 +0200751 temp &= ~MII_M1111_RGMII_RX_DELAY;
752 temp |= MII_M1111_RGMII_TX_DELAY;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200753 }
754
Andrew Lunn61111592017-07-30 22:41:46 +0200755 return phy_write(phydev, MII_M1111_PHY_EXT_CR, temp);
756}
757
758static int m88e1111_config_init_rgmii(struct phy_device *phydev)
759{
760 int temp;
761 int err;
762
763 err = m88e1111_config_init_rgmii_delays(phydev);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200764 if (err < 0)
765 return err;
766
767 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
768 if (temp < 0)
769 return temp;
770
771 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
772
773 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
774 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
775 else
776 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
777
778 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
779}
780
781static int m88e1111_config_init_sgmii(struct phy_device *phydev)
782{
783 int err;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200784
Andrew Lunn865b813a2017-07-30 22:41:47 +0200785 err = m88e1111_config_init_hwcfg_mode(
786 phydev,
787 MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
788 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200789 if (err < 0)
790 return err;
791
792 /* make sure copper is selected */
Andrew Lunn52295662017-05-25 21:42:08 +0200793 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200794}
795
796static int m88e1111_config_init_rtbi(struct phy_device *phydev)
797{
Andrew Lunn61111592017-07-30 22:41:46 +0200798 int err;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200799
Andrew Lunn61111592017-07-30 22:41:46 +0200800 err = m88e1111_config_init_rgmii_delays(phydev);
801 if (err)
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200802 return err;
803
Andrew Lunn865b813a2017-07-30 22:41:47 +0200804 err = m88e1111_config_init_hwcfg_mode(
805 phydev,
806 MII_M1111_HWCFG_MODE_RTBI,
807 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200808 if (err < 0)
809 return err;
810
811 /* soft reset */
Andrew Lunn34386342017-07-30 22:41:45 +0200812 err = genphy_soft_reset(phydev);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200813 if (err < 0)
814 return err;
815
Andrew Lunn865b813a2017-07-30 22:41:47 +0200816 return m88e1111_config_init_hwcfg_mode(
817 phydev,
818 MII_M1111_HWCFG_MODE_RTBI,
819 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200820}
821
822static int m88e1111_config_init(struct phy_device *phydev)
823{
824 int err;
825
Florian Fainelli32a64162015-05-26 12:19:59 -0700826 if (phy_interface_is_rgmii(phydev)) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200827 err = m88e1111_config_init_rgmii(phydev);
828 if (err)
Kim Phillips895ee682007-06-05 18:46:47 +0800829 return err;
830 }
831
Kapil Juneja4117b5b2007-05-11 18:25:18 -0500832 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200833 err = m88e1111_config_init_sgmii(phydev);
Madalin Bucur07151bc2015-08-07 17:07:50 +0800834 if (err < 0)
835 return err;
Kapil Juneja4117b5b2007-05-11 18:25:18 -0500836 }
837
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +0000838 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200839 err = m88e1111_config_init_rtbi(phydev);
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +0000840 if (err < 0)
841 return err;
842 }
843
David Daneycf41a512010-11-19 12:13:18 +0000844 err = marvell_of_reg_init(phydev);
845 if (err < 0)
846 return err;
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +0000847
Andrew Lunn34386342017-07-30 22:41:45 +0200848 return genphy_soft_reset(phydev);
Kim Phillips895ee682007-06-05 18:46:47 +0800849}
850
Clemens Gruberfdecf362016-06-11 17:21:26 +0200851static int m88e1121_config_init(struct phy_device *phydev)
852{
853 int err, oldpage;
854
Andrew Lunn52295662017-05-25 21:42:08 +0200855 oldpage = marvell_get_set_page(phydev, MII_MARVELL_LED_PAGE);
Andrew Lunn53798322017-05-25 21:42:07 +0200856 if (oldpage < 0)
857 return oldpage;
Clemens Gruberfdecf362016-06-11 17:21:26 +0200858
859 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
860 err = phy_write(phydev, MII_88E1121_PHY_LED_CTRL,
861 MII_88E1121_PHY_LED_DEF);
862 if (err < 0)
863 return err;
864
Andrew Lunn6427bb22017-05-17 03:26:03 +0200865 marvell_set_page(phydev, oldpage);
Clemens Gruberfdecf362016-06-11 17:21:26 +0200866
867 /* Set marvell,reg-init configuration from device tree */
868 return marvell_config_init(phydev);
869}
870
Clemens Gruber407353e2016-02-23 20:16:58 +0100871static int m88e1510_config_init(struct phy_device *phydev)
872{
873 int err;
874 int temp;
875
876 /* SGMII-to-Copper mode initialization */
877 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
878 /* Select page 18 */
Andrew Lunn6427bb22017-05-17 03:26:03 +0200879 err = marvell_set_page(phydev, 18);
Clemens Gruber407353e2016-02-23 20:16:58 +0100880 if (err < 0)
881 return err;
882
883 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
884 temp = phy_read(phydev, MII_88E1510_GEN_CTRL_REG_1);
885 temp &= ~MII_88E1510_GEN_CTRL_REG_1_MODE_MASK;
886 temp |= MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII;
887 err = phy_write(phydev, MII_88E1510_GEN_CTRL_REG_1, temp);
888 if (err < 0)
889 return err;
890
891 /* PHY reset is necessary after changing MODE[2:0] */
892 temp |= MII_88E1510_GEN_CTRL_REG_1_RESET;
893 err = phy_write(phydev, MII_88E1510_GEN_CTRL_REG_1, temp);
894 if (err < 0)
895 return err;
896
897 /* Reset page selection */
Andrew Lunn52295662017-05-25 21:42:08 +0200898 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Clemens Gruber407353e2016-02-23 20:16:58 +0100899 if (err < 0)
900 return err;
901 }
902
Clemens Gruberfdecf362016-06-11 17:21:26 +0200903 return m88e1121_config_init(phydev);
Clemens Gruber407353e2016-02-23 20:16:58 +0100904}
905
Ron Madrid605f1962008-11-06 09:05:26 +0000906static int m88e1118_config_aneg(struct phy_device *phydev)
907{
908 int err;
909
Andrew Lunn34386342017-07-30 22:41:45 +0200910 err = genphy_soft_reset(phydev);
Ron Madrid605f1962008-11-06 09:05:26 +0000911 if (err < 0)
912 return err;
913
Andrew Lunnfecd5e92017-07-30 22:41:49 +0200914 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
Ron Madrid605f1962008-11-06 09:05:26 +0000915 if (err < 0)
916 return err;
917
918 err = genphy_config_aneg(phydev);
919 return 0;
920}
921
922static int m88e1118_config_init(struct phy_device *phydev)
923{
924 int err;
925
926 /* Change address */
Andrew Lunn52295662017-05-25 21:42:08 +0200927 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
Ron Madrid605f1962008-11-06 09:05:26 +0000928 if (err < 0)
929 return err;
930
931 /* Enable 1000 Mbit */
932 err = phy_write(phydev, 0x15, 0x1070);
933 if (err < 0)
934 return err;
935
936 /* Change address */
Andrew Lunn52295662017-05-25 21:42:08 +0200937 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
Ron Madrid605f1962008-11-06 09:05:26 +0000938 if (err < 0)
939 return err;
940
941 /* Adjust LED Control */
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +1000942 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
943 err = phy_write(phydev, 0x10, 0x1100);
944 else
945 err = phy_write(phydev, 0x10, 0x021e);
Ron Madrid605f1962008-11-06 09:05:26 +0000946 if (err < 0)
947 return err;
948
David Daneycf41a512010-11-19 12:13:18 +0000949 err = marvell_of_reg_init(phydev);
950 if (err < 0)
951 return err;
952
Ron Madrid605f1962008-11-06 09:05:26 +0000953 /* Reset address */
Andrew Lunn52295662017-05-25 21:42:08 +0200954 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Ron Madrid605f1962008-11-06 09:05:26 +0000955 if (err < 0)
956 return err;
957
Andrew Lunn34386342017-07-30 22:41:45 +0200958 return genphy_soft_reset(phydev);
Ron Madrid605f1962008-11-06 09:05:26 +0000959}
960
David Daney90600732010-11-19 11:58:53 +0000961static int m88e1149_config_init(struct phy_device *phydev)
962{
963 int err;
964
965 /* Change address */
Andrew Lunn52295662017-05-25 21:42:08 +0200966 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
David Daney90600732010-11-19 11:58:53 +0000967 if (err < 0)
968 return err;
969
970 /* Enable 1000 Mbit */
971 err = phy_write(phydev, 0x15, 0x1048);
972 if (err < 0)
973 return err;
974
David Daneycf41a512010-11-19 12:13:18 +0000975 err = marvell_of_reg_init(phydev);
976 if (err < 0)
977 return err;
978
David Daney90600732010-11-19 11:58:53 +0000979 /* Reset address */
Andrew Lunn52295662017-05-25 21:42:08 +0200980 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
David Daney90600732010-11-19 11:58:53 +0000981 if (err < 0)
982 return err;
983
Andrew Lunn34386342017-07-30 22:41:45 +0200984 return genphy_soft_reset(phydev);
David Daney90600732010-11-19 11:58:53 +0000985}
986
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200987static int m88e1145_config_init_rgmii(struct phy_device *phydev)
988{
Andrew Lunn61111592017-07-30 22:41:46 +0200989 int temp;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200990 int err;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200991
Andrew Lunn61111592017-07-30 22:41:46 +0200992 err = m88e1111_config_init_rgmii_delays(phydev);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200993 if (err < 0)
994 return err;
995
996 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
997 err = phy_write(phydev, 0x1d, 0x0012);
998 if (err < 0)
999 return err;
1000
1001 temp = phy_read(phydev, 0x1e);
1002 if (temp < 0)
1003 return temp;
1004
1005 temp &= 0xf03f;
1006 temp |= 2 << 9; /* 36 ohm */
1007 temp |= 2 << 6; /* 39 ohm */
1008
1009 err = phy_write(phydev, 0x1e, temp);
1010 if (err < 0)
1011 return err;
1012
1013 err = phy_write(phydev, 0x1d, 0x3);
1014 if (err < 0)
1015 return err;
1016
1017 err = phy_write(phydev, 0x1e, 0x8000);
1018 }
1019 return err;
1020}
1021
1022static int m88e1145_config_init_sgmii(struct phy_device *phydev)
1023{
Andrew Lunn865b813a2017-07-30 22:41:47 +02001024 return m88e1111_config_init_hwcfg_mode(
1025 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
1026 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001027}
1028
Andy Fleming76884672007-02-09 18:13:58 -06001029static int m88e1145_config_init(struct phy_device *phydev)
1030{
1031 int err;
1032
1033 /* Take care of errata E0 & E1 */
1034 err = phy_write(phydev, 0x1d, 0x001b);
1035 if (err < 0)
1036 return err;
1037
1038 err = phy_write(phydev, 0x1e, 0x418f);
1039 if (err < 0)
1040 return err;
1041
1042 err = phy_write(phydev, 0x1d, 0x0016);
1043 if (err < 0)
1044 return err;
1045
1046 err = phy_write(phydev, 0x1e, 0xa2da);
1047 if (err < 0)
1048 return err;
1049
Kim Phillips895ee682007-06-05 18:46:47 +08001050 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001051 err = m88e1145_config_init_rgmii(phydev);
Andy Fleming76884672007-02-09 18:13:58 -06001052 if (err < 0)
1053 return err;
Andy Fleming76884672007-02-09 18:13:58 -06001054 }
1055
Viet Nga Daob0224172014-10-23 19:41:53 -07001056 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001057 err = m88e1145_config_init_sgmii(phydev);
Viet Nga Daob0224172014-10-23 19:41:53 -07001058 if (err < 0)
1059 return err;
1060 }
1061
David Daneycf41a512010-11-19 12:13:18 +00001062 err = marvell_of_reg_init(phydev);
1063 if (err < 0)
1064 return err;
1065
Andy Fleming76884672007-02-09 18:13:58 -06001066 return 0;
1067}
Andy Fleming00db8182005-07-30 19:31:23 -04001068
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001069/**
1070 * fiber_lpa_to_ethtool_lpa_t
1071 * @lpa: value of the MII_LPA register for fiber link
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001072 *
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001073 * A small helper function that translates MII_LPA
1074 * bits to ethtool LP advertisement settings.
1075 */
1076static u32 fiber_lpa_to_ethtool_lpa_t(u32 lpa)
1077{
1078 u32 result = 0;
1079
1080 if (lpa & LPA_FIBER_1000HALF)
1081 result |= ADVERTISED_1000baseT_Half;
1082 if (lpa & LPA_FIBER_1000FULL)
1083 result |= ADVERTISED_1000baseT_Full;
1084
1085 return result;
1086}
1087
1088/**
1089 * marvell_update_link - update link status in real time in @phydev
1090 * @phydev: target phy_device struct
1091 *
1092 * Description: Update the value in phydev->link to reflect the
1093 * current link value.
1094 */
1095static int marvell_update_link(struct phy_device *phydev, int fiber)
1096{
1097 int status;
1098
1099 /* Use the generic register for copper link, or specific
Andrew Lunn0c3439b2017-05-17 03:25:59 +02001100 * register for fiber case
1101 */
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001102 if (fiber) {
1103 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1104 if (status < 0)
1105 return status;
1106
1107 if ((status & REGISTER_LINK_STATUS) == 0)
1108 phydev->link = 0;
1109 else
1110 phydev->link = 1;
1111 } else {
1112 return genphy_update_link(phydev);
1113 }
1114
1115 return 0;
1116}
1117
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001118static int marvell_read_status_page_an(struct phy_device *phydev,
1119 int fiber)
1120{
1121 int status;
1122 int lpa;
1123 int lpagb;
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001124
1125 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1126 if (status < 0)
1127 return status;
1128
1129 lpa = phy_read(phydev, MII_LPA);
1130 if (lpa < 0)
1131 return lpa;
1132
1133 lpagb = phy_read(phydev, MII_STAT1000);
1134 if (lpagb < 0)
1135 return lpagb;
1136
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001137 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1138 phydev->duplex = DUPLEX_FULL;
1139 else
1140 phydev->duplex = DUPLEX_HALF;
1141
1142 status = status & MII_M1011_PHY_STATUS_SPD_MASK;
1143 phydev->pause = 0;
1144 phydev->asym_pause = 0;
1145
1146 switch (status) {
1147 case MII_M1011_PHY_STATUS_1000:
1148 phydev->speed = SPEED_1000;
1149 break;
1150
1151 case MII_M1011_PHY_STATUS_100:
1152 phydev->speed = SPEED_100;
1153 break;
1154
1155 default:
1156 phydev->speed = SPEED_10;
1157 break;
1158 }
1159
1160 if (!fiber) {
1161 phydev->lp_advertising =
1162 mii_stat1000_to_ethtool_lpa_t(lpagb) |
1163 mii_lpa_to_ethtool_lpa_t(lpa);
1164
1165 if (phydev->duplex == DUPLEX_FULL) {
1166 phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
1167 phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
1168 }
1169 } else {
1170 /* The fiber link is only 1000M capable */
1171 phydev->lp_advertising = fiber_lpa_to_ethtool_lpa_t(lpa);
1172
1173 if (phydev->duplex == DUPLEX_FULL) {
1174 if (!(lpa & LPA_PAUSE_FIBER)) {
1175 phydev->pause = 0;
1176 phydev->asym_pause = 0;
1177 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1178 phydev->pause = 1;
1179 phydev->asym_pause = 1;
1180 } else {
1181 phydev->pause = 1;
1182 phydev->asym_pause = 0;
1183 }
1184 }
1185 }
1186 return 0;
1187}
1188
1189static int marvell_read_status_page_fixed(struct phy_device *phydev)
1190{
1191 int bmcr = phy_read(phydev, MII_BMCR);
1192
1193 if (bmcr < 0)
1194 return bmcr;
1195
1196 if (bmcr & BMCR_FULLDPLX)
1197 phydev->duplex = DUPLEX_FULL;
1198 else
1199 phydev->duplex = DUPLEX_HALF;
1200
1201 if (bmcr & BMCR_SPEED1000)
1202 phydev->speed = SPEED_1000;
1203 else if (bmcr & BMCR_SPEED100)
1204 phydev->speed = SPEED_100;
1205 else
1206 phydev->speed = SPEED_10;
1207
1208 phydev->pause = 0;
1209 phydev->asym_pause = 0;
1210 phydev->lp_advertising = 0;
1211
1212 return 0;
1213}
1214
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001215/* marvell_read_status_page
1216 *
Jeff Garzikf0c88f92008-03-25 23:53:24 -04001217 * Description:
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001218 * Check the link, then figure out the current state
1219 * by comparing what we advertise with what the link partner
1220 * advertises. Start by checking the gigabit possibilities,
1221 * then move on to 10/100.
1222 */
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001223static int marvell_read_status_page(struct phy_device *phydev, int page)
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001224{
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001225 int fiber;
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001226 int err;
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001227
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001228 /* Detect and update the link, but return if there
Andrew Lunn0c3439b2017-05-17 03:25:59 +02001229 * was an error
1230 */
Andrew Lunn52295662017-05-25 21:42:08 +02001231 if (page == MII_MARVELL_FIBER_PAGE)
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001232 fiber = 1;
1233 else
1234 fiber = 0;
1235
1236 err = marvell_update_link(phydev, fiber);
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001237 if (err)
1238 return err;
1239
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001240 if (phydev->autoneg == AUTONEG_ENABLE)
1241 err = marvell_read_status_page_an(phydev, fiber);
1242 else
1243 err = marvell_read_status_page_fixed(phydev);
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001244
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001245 return err;
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001246}
1247
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001248/* marvell_read_status
1249 *
1250 * Some Marvell's phys have two modes: fiber and copper.
1251 * Both need status checked.
1252 * Description:
1253 * First, check the fiber link and status.
1254 * If the fiber link is down, check the copper link and status which
1255 * will be the default value if both link are down.
1256 */
1257static int marvell_read_status(struct phy_device *phydev)
1258{
1259 int err;
1260
1261 /* Check the fiber mode first */
Russell Kinga13c06522017-01-10 23:13:45 +00001262 if (phydev->supported & SUPPORTED_FIBRE &&
1263 phydev->interface != PHY_INTERFACE_MODE_SGMII) {
Andrew Lunn52295662017-05-25 21:42:08 +02001264 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001265 if (err < 0)
1266 goto error;
1267
Andrew Lunn52295662017-05-25 21:42:08 +02001268 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001269 if (err < 0)
1270 goto error;
1271
Andrew Lunn0c3439b2017-05-17 03:25:59 +02001272 /* If the fiber link is up, it is the selected and
1273 * used link. In this case, we need to stay in the
1274 * fiber page. Please to be careful about that, avoid
1275 * to restore Copper page in other functions which
1276 * could break the behaviour for some fiber phy like
1277 * 88E1512.
1278 */
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001279 if (phydev->link)
1280 return 0;
1281
1282 /* If fiber link is down, check and save copper mode state */
Andrew Lunn52295662017-05-25 21:42:08 +02001283 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001284 if (err < 0)
1285 goto error;
1286 }
1287
Andrew Lunn52295662017-05-25 21:42:08 +02001288 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001289
1290error:
Andrew Lunn52295662017-05-25 21:42:08 +02001291 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001292 return err;
1293}
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001294
1295/* marvell_suspend
1296 *
1297 * Some Marvell's phys have two modes: fiber and copper.
1298 * Both need to be suspended
1299 */
1300static int marvell_suspend(struct phy_device *phydev)
1301{
1302 int err;
1303
1304 /* Suspend the fiber mode first */
1305 if (!(phydev->supported & SUPPORTED_FIBRE)) {
Andrew Lunn52295662017-05-25 21:42:08 +02001306 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001307 if (err < 0)
1308 goto error;
1309
1310 /* With the page set, use the generic suspend */
1311 err = genphy_suspend(phydev);
1312 if (err < 0)
1313 goto error;
1314
1315 /* Then, the copper link */
Andrew Lunn52295662017-05-25 21:42:08 +02001316 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001317 if (err < 0)
1318 goto error;
1319 }
1320
1321 /* With the page set, use the generic suspend */
1322 return genphy_suspend(phydev);
1323
1324error:
Andrew Lunn52295662017-05-25 21:42:08 +02001325 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001326 return err;
1327}
1328
1329/* marvell_resume
1330 *
1331 * Some Marvell's phys have two modes: fiber and copper.
1332 * Both need to be resumed
1333 */
1334static int marvell_resume(struct phy_device *phydev)
1335{
1336 int err;
1337
1338 /* Resume the fiber mode first */
1339 if (!(phydev->supported & SUPPORTED_FIBRE)) {
Andrew Lunn52295662017-05-25 21:42:08 +02001340 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001341 if (err < 0)
1342 goto error;
1343
1344 /* With the page set, use the generic resume */
1345 err = genphy_resume(phydev);
1346 if (err < 0)
1347 goto error;
1348
1349 /* Then, the copper link */
Andrew Lunn52295662017-05-25 21:42:08 +02001350 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001351 if (err < 0)
1352 goto error;
1353 }
1354
1355 /* With the page set, use the generic resume */
1356 return genphy_resume(phydev);
1357
1358error:
Andrew Lunn52295662017-05-25 21:42:08 +02001359 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001360 return err;
1361}
1362
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02001363static int marvell_aneg_done(struct phy_device *phydev)
1364{
1365 int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
Andrew Lunne69d9ed2017-05-17 03:26:00 +02001366
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02001367 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1368}
1369
Anatolij Gustschindcd07be2009-04-07 02:01:43 +00001370static int m88e1121_did_interrupt(struct phy_device *phydev)
1371{
1372 int imask;
1373
1374 imask = phy_read(phydev, MII_M1011_IEVENT);
1375
1376 if (imask & MII_M1011_IMASK_INIT)
1377 return 1;
1378
1379 return 0;
1380}
1381
Andrew Lunn23beb382017-05-17 03:26:04 +02001382static void m88e1318_get_wol(struct phy_device *phydev,
1383 struct ethtool_wolinfo *wol)
Michael Stapelberg3871c382013-03-11 13:56:45 +00001384{
1385 wol->supported = WAKE_MAGIC;
1386 wol->wolopts = 0;
1387
Andrew Lunn52295662017-05-25 21:42:08 +02001388 if (marvell_set_page(phydev, MII_MARVELL_WOL_PAGE) < 0)
Michael Stapelberg3871c382013-03-11 13:56:45 +00001389 return;
1390
1391 if (phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL) &
1392 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1393 wol->wolopts |= WAKE_MAGIC;
1394
Andrew Lunn52295662017-05-25 21:42:08 +02001395 if (marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE) < 0)
Michael Stapelberg3871c382013-03-11 13:56:45 +00001396 return;
1397}
1398
Andrew Lunn23beb382017-05-17 03:26:04 +02001399static int m88e1318_set_wol(struct phy_device *phydev,
1400 struct ethtool_wolinfo *wol)
Michael Stapelberg3871c382013-03-11 13:56:45 +00001401{
1402 int err, oldpage, temp;
1403
Andrew Lunn6427bb22017-05-17 03:26:03 +02001404 oldpage = marvell_get_page(phydev);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001405
1406 if (wol->wolopts & WAKE_MAGIC) {
1407 /* Explicitly switch to page 0x00, just to be sure */
Andrew Lunn52295662017-05-25 21:42:08 +02001408 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001409 if (err < 0)
1410 return err;
1411
1412 /* Enable the WOL interrupt */
1413 temp = phy_read(phydev, MII_88E1318S_PHY_CSIER);
1414 temp |= MII_88E1318S_PHY_CSIER_WOL_EIE;
1415 err = phy_write(phydev, MII_88E1318S_PHY_CSIER, temp);
1416 if (err < 0)
1417 return err;
1418
Andrew Lunn52295662017-05-25 21:42:08 +02001419 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001420 if (err < 0)
1421 return err;
1422
1423 /* Setup LED[2] as interrupt pin (active low) */
1424 temp = phy_read(phydev, MII_88E1318S_PHY_LED_TCR);
1425 temp &= ~MII_88E1318S_PHY_LED_TCR_FORCE_INT;
1426 temp |= MII_88E1318S_PHY_LED_TCR_INTn_ENABLE;
1427 temp |= MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW;
1428 err = phy_write(phydev, MII_88E1318S_PHY_LED_TCR, temp);
1429 if (err < 0)
1430 return err;
1431
Andrew Lunn52295662017-05-25 21:42:08 +02001432 err = marvell_set_page(phydev, MII_MARVELL_WOL_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001433 if (err < 0)
1434 return err;
1435
1436 /* Store the device address for the magic packet */
1437 err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1438 ((phydev->attached_dev->dev_addr[5] << 8) |
1439 phydev->attached_dev->dev_addr[4]));
1440 if (err < 0)
1441 return err;
1442 err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1443 ((phydev->attached_dev->dev_addr[3] << 8) |
1444 phydev->attached_dev->dev_addr[2]));
1445 if (err < 0)
1446 return err;
1447 err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1448 ((phydev->attached_dev->dev_addr[1] << 8) |
1449 phydev->attached_dev->dev_addr[0]));
1450 if (err < 0)
1451 return err;
1452
1453 /* Clear WOL status and enable magic packet matching */
1454 temp = phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1455 temp |= MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS;
1456 temp |= MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE;
1457 err = phy_write(phydev, MII_88E1318S_PHY_WOL_CTRL, temp);
1458 if (err < 0)
1459 return err;
1460 } else {
Andrew Lunn52295662017-05-25 21:42:08 +02001461 err = marvell_set_page(phydev, MII_MARVELL_WOL_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001462 if (err < 0)
1463 return err;
1464
1465 /* Clear WOL status and disable magic packet matching */
1466 temp = phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1467 temp |= MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS;
1468 temp &= ~MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE;
1469 err = phy_write(phydev, MII_88E1318S_PHY_WOL_CTRL, temp);
1470 if (err < 0)
1471 return err;
1472 }
1473
Andrew Lunn6427bb22017-05-17 03:26:03 +02001474 err = marvell_set_page(phydev, oldpage);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001475 if (err < 0)
1476 return err;
1477
1478 return 0;
1479}
1480
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001481static int marvell_get_sset_count(struct phy_device *phydev)
1482{
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +02001483 if (phydev->supported & SUPPORTED_FIBRE)
1484 return ARRAY_SIZE(marvell_hw_stats);
1485 else
1486 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001487}
1488
1489static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1490{
1491 int i;
1492
1493 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) {
1494 memcpy(data + i * ETH_GSTRING_LEN,
1495 marvell_hw_stats[i].string, ETH_GSTRING_LEN);
1496 }
1497}
1498
1499#ifndef UINT64_MAX
Andrew Lunn8cf8b872017-07-30 22:41:44 +02001500#define UINT64_MAX (u64)(~((u64)0))
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001501#endif
1502static u64 marvell_get_stat(struct phy_device *phydev, int i)
1503{
1504 struct marvell_hw_stat stat = marvell_hw_stats[i];
1505 struct marvell_priv *priv = phydev->priv;
Andrew Lunn53798322017-05-25 21:42:07 +02001506 int oldpage, val;
Andrew Lunn321b4d42016-02-20 00:35:29 +01001507 u64 ret;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001508
Andrew Lunn53798322017-05-25 21:42:07 +02001509 oldpage = marvell_get_set_page(phydev, stat.page);
1510 if (oldpage < 0)
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001511 return UINT64_MAX;
1512
1513 val = phy_read(phydev, stat.reg);
1514 if (val < 0) {
Andrew Lunn321b4d42016-02-20 00:35:29 +01001515 ret = UINT64_MAX;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001516 } else {
1517 val = val & ((1 << stat.bits) - 1);
1518 priv->stats[i] += val;
Andrew Lunn321b4d42016-02-20 00:35:29 +01001519 ret = priv->stats[i];
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001520 }
1521
Andrew Lunn6427bb22017-05-17 03:26:03 +02001522 marvell_set_page(phydev, oldpage);
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001523
Andrew Lunn321b4d42016-02-20 00:35:29 +01001524 return ret;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001525}
1526
1527static void marvell_get_stats(struct phy_device *phydev,
1528 struct ethtool_stats *stats, u64 *data)
1529{
1530 int i;
1531
1532 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++)
1533 data[i] = marvell_get_stat(phydev, i);
1534}
1535
Andrew Lunn0b046802017-01-20 01:37:49 +01001536#ifdef CONFIG_HWMON
1537static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
1538{
Andrew Lunn975b3882017-05-25 21:42:06 +02001539 int oldpage;
Andrew Lunn0b046802017-01-20 01:37:49 +01001540 int ret;
1541 int val;
1542
1543 *temp = 0;
1544
1545 mutex_lock(&phydev->lock);
1546
Andrew Lunn52295662017-05-25 21:42:08 +02001547 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
Andrew Lunn975b3882017-05-25 21:42:06 +02001548 if (oldpage < 0) {
1549 mutex_unlock(&phydev->lock);
1550 return oldpage;
1551 }
1552
Andrew Lunn0b046802017-01-20 01:37:49 +01001553 /* Enable temperature sensor */
1554 ret = phy_read(phydev, MII_88E1121_MISC_TEST);
1555 if (ret < 0)
1556 goto error;
1557
1558 ret = phy_write(phydev, MII_88E1121_MISC_TEST,
1559 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1560 if (ret < 0)
1561 goto error;
1562
1563 /* Wait for temperature to stabilize */
1564 usleep_range(10000, 12000);
1565
1566 val = phy_read(phydev, MII_88E1121_MISC_TEST);
1567 if (val < 0) {
1568 ret = val;
1569 goto error;
1570 }
1571
1572 /* Disable temperature sensor */
1573 ret = phy_write(phydev, MII_88E1121_MISC_TEST,
1574 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1575 if (ret < 0)
1576 goto error;
1577
1578 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
1579
1580error:
Andrew Lunn975b3882017-05-25 21:42:06 +02001581 marvell_set_page(phydev, oldpage);
Andrew Lunn0b046802017-01-20 01:37:49 +01001582 mutex_unlock(&phydev->lock);
1583
1584 return ret;
1585}
1586
1587static int m88e1121_hwmon_read(struct device *dev,
1588 enum hwmon_sensor_types type,
1589 u32 attr, int channel, long *temp)
1590{
1591 struct phy_device *phydev = dev_get_drvdata(dev);
1592 int err;
1593
1594 switch (attr) {
1595 case hwmon_temp_input:
1596 err = m88e1121_get_temp(phydev, temp);
1597 break;
1598 default:
1599 return -EOPNOTSUPP;
1600 }
1601
1602 return err;
1603}
1604
1605static umode_t m88e1121_hwmon_is_visible(const void *data,
1606 enum hwmon_sensor_types type,
1607 u32 attr, int channel)
1608{
1609 if (type != hwmon_temp)
1610 return 0;
1611
1612 switch (attr) {
1613 case hwmon_temp_input:
1614 return 0444;
1615 default:
1616 return 0;
1617 }
1618}
1619
1620static u32 m88e1121_hwmon_chip_config[] = {
1621 HWMON_C_REGISTER_TZ,
1622 0
1623};
1624
1625static const struct hwmon_channel_info m88e1121_hwmon_chip = {
1626 .type = hwmon_chip,
1627 .config = m88e1121_hwmon_chip_config,
1628};
1629
1630static u32 m88e1121_hwmon_temp_config[] = {
1631 HWMON_T_INPUT,
1632 0
1633};
1634
1635static const struct hwmon_channel_info m88e1121_hwmon_temp = {
1636 .type = hwmon_temp,
1637 .config = m88e1121_hwmon_temp_config,
1638};
1639
1640static const struct hwmon_channel_info *m88e1121_hwmon_info[] = {
1641 &m88e1121_hwmon_chip,
1642 &m88e1121_hwmon_temp,
1643 NULL
1644};
1645
1646static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = {
1647 .is_visible = m88e1121_hwmon_is_visible,
1648 .read = m88e1121_hwmon_read,
1649};
1650
1651static const struct hwmon_chip_info m88e1121_hwmon_chip_info = {
1652 .ops = &m88e1121_hwmon_hwmon_ops,
1653 .info = m88e1121_hwmon_info,
1654};
1655
1656static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
1657{
Andrew Lunn975b3882017-05-25 21:42:06 +02001658 int oldpage;
Andrew Lunn0b046802017-01-20 01:37:49 +01001659 int ret;
1660
1661 *temp = 0;
1662
1663 mutex_lock(&phydev->lock);
1664
Andrew Lunn52295662017-05-25 21:42:08 +02001665 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
Andrew Lunn975b3882017-05-25 21:42:06 +02001666 if (oldpage < 0) {
1667 mutex_unlock(&phydev->lock);
1668 return oldpage;
1669 }
1670
Andrew Lunn0b046802017-01-20 01:37:49 +01001671 ret = phy_read(phydev, MII_88E1510_TEMP_SENSOR);
1672 if (ret < 0)
1673 goto error;
1674
1675 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
1676
1677error:
Andrew Lunn975b3882017-05-25 21:42:06 +02001678 marvell_set_page(phydev, oldpage);
Andrew Lunn0b046802017-01-20 01:37:49 +01001679 mutex_unlock(&phydev->lock);
1680
1681 return ret;
1682}
1683
Colin Ian Kingf0a45812017-06-02 15:13:34 +01001684static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
Andrew Lunn0b046802017-01-20 01:37:49 +01001685{
Andrew Lunn975b3882017-05-25 21:42:06 +02001686 int oldpage;
Andrew Lunn0b046802017-01-20 01:37:49 +01001687 int ret;
1688
1689 *temp = 0;
1690
1691 mutex_lock(&phydev->lock);
Andrew Lunn53798322017-05-25 21:42:07 +02001692
Andrew Lunn52295662017-05-25 21:42:08 +02001693 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
Andrew Lunn975b3882017-05-25 21:42:06 +02001694 if (oldpage < 0) {
1695 mutex_unlock(&phydev->lock);
1696 return oldpage;
1697 }
Andrew Lunn0b046802017-01-20 01:37:49 +01001698
Andrew Lunn0b046802017-01-20 01:37:49 +01001699 ret = phy_read(phydev, MII_88E1121_MISC_TEST);
1700 if (ret < 0)
1701 goto error;
1702
1703 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
1704 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
1705 /* convert to mC */
1706 *temp *= 1000;
1707
1708error:
Andrew Lunn975b3882017-05-25 21:42:06 +02001709 marvell_set_page(phydev, oldpage);
Andrew Lunn0b046802017-01-20 01:37:49 +01001710 mutex_unlock(&phydev->lock);
1711
1712 return ret;
1713}
1714
Colin Ian Kingf0a45812017-06-02 15:13:34 +01001715static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
Andrew Lunn0b046802017-01-20 01:37:49 +01001716{
Andrew Lunn975b3882017-05-25 21:42:06 +02001717 int oldpage;
Andrew Lunn0b046802017-01-20 01:37:49 +01001718 int ret;
1719
1720 mutex_lock(&phydev->lock);
1721
Andrew Lunn52295662017-05-25 21:42:08 +02001722 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
Andrew Lunn975b3882017-05-25 21:42:06 +02001723 if (oldpage < 0) {
1724 mutex_unlock(&phydev->lock);
1725 return oldpage;
1726 }
1727
Andrew Lunn0b046802017-01-20 01:37:49 +01001728 ret = phy_read(phydev, MII_88E1121_MISC_TEST);
1729 if (ret < 0)
1730 goto error;
1731
1732 temp = temp / 1000;
1733 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
1734 ret = phy_write(phydev, MII_88E1121_MISC_TEST,
1735 (ret & ~MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) |
1736 (temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT));
1737
1738error:
Andrew Lunn975b3882017-05-25 21:42:06 +02001739 marvell_set_page(phydev, oldpage);
Andrew Lunn0b046802017-01-20 01:37:49 +01001740 mutex_unlock(&phydev->lock);
1741
1742 return ret;
1743}
1744
Colin Ian Kingf0a45812017-06-02 15:13:34 +01001745static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
Andrew Lunn0b046802017-01-20 01:37:49 +01001746{
Andrew Lunn975b3882017-05-25 21:42:06 +02001747 int oldpage;
Andrew Lunn0b046802017-01-20 01:37:49 +01001748 int ret;
1749
1750 *alarm = false;
1751
1752 mutex_lock(&phydev->lock);
1753
Andrew Lunn52295662017-05-25 21:42:08 +02001754 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
Andrew Lunn975b3882017-05-25 21:42:06 +02001755 if (oldpage < 0) {
1756 mutex_unlock(&phydev->lock);
1757 return oldpage;
1758 }
1759
Andrew Lunn0b046802017-01-20 01:37:49 +01001760 ret = phy_read(phydev, MII_88E1121_MISC_TEST);
1761 if (ret < 0)
1762 goto error;
1763 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
1764
1765error:
Andrew Lunn975b3882017-05-25 21:42:06 +02001766 marvell_set_page(phydev, oldpage);
Andrew Lunn0b046802017-01-20 01:37:49 +01001767 mutex_unlock(&phydev->lock);
1768
1769 return ret;
1770}
1771
1772static int m88e1510_hwmon_read(struct device *dev,
1773 enum hwmon_sensor_types type,
1774 u32 attr, int channel, long *temp)
1775{
1776 struct phy_device *phydev = dev_get_drvdata(dev);
1777 int err;
1778
1779 switch (attr) {
1780 case hwmon_temp_input:
1781 err = m88e1510_get_temp(phydev, temp);
1782 break;
1783 case hwmon_temp_crit:
1784 err = m88e1510_get_temp_critical(phydev, temp);
1785 break;
1786 case hwmon_temp_max_alarm:
1787 err = m88e1510_get_temp_alarm(phydev, temp);
1788 break;
1789 default:
1790 return -EOPNOTSUPP;
1791 }
1792
1793 return err;
1794}
1795
1796static int m88e1510_hwmon_write(struct device *dev,
1797 enum hwmon_sensor_types type,
1798 u32 attr, int channel, long temp)
1799{
1800 struct phy_device *phydev = dev_get_drvdata(dev);
1801 int err;
1802
1803 switch (attr) {
1804 case hwmon_temp_crit:
1805 err = m88e1510_set_temp_critical(phydev, temp);
1806 break;
1807 default:
1808 return -EOPNOTSUPP;
1809 }
1810 return err;
1811}
1812
1813static umode_t m88e1510_hwmon_is_visible(const void *data,
1814 enum hwmon_sensor_types type,
1815 u32 attr, int channel)
1816{
1817 if (type != hwmon_temp)
1818 return 0;
1819
1820 switch (attr) {
1821 case hwmon_temp_input:
1822 case hwmon_temp_max_alarm:
1823 return 0444;
1824 case hwmon_temp_crit:
1825 return 0644;
1826 default:
1827 return 0;
1828 }
1829}
1830
1831static u32 m88e1510_hwmon_temp_config[] = {
1832 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
1833 0
1834};
1835
1836static const struct hwmon_channel_info m88e1510_hwmon_temp = {
1837 .type = hwmon_temp,
1838 .config = m88e1510_hwmon_temp_config,
1839};
1840
1841static const struct hwmon_channel_info *m88e1510_hwmon_info[] = {
1842 &m88e1121_hwmon_chip,
1843 &m88e1510_hwmon_temp,
1844 NULL
1845};
1846
1847static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = {
1848 .is_visible = m88e1510_hwmon_is_visible,
1849 .read = m88e1510_hwmon_read,
1850 .write = m88e1510_hwmon_write,
1851};
1852
1853static const struct hwmon_chip_info m88e1510_hwmon_chip_info = {
1854 .ops = &m88e1510_hwmon_hwmon_ops,
1855 .info = m88e1510_hwmon_info,
1856};
1857
1858static int marvell_hwmon_name(struct phy_device *phydev)
1859{
1860 struct marvell_priv *priv = phydev->priv;
1861 struct device *dev = &phydev->mdio.dev;
1862 const char *devname = dev_name(dev);
1863 size_t len = strlen(devname);
1864 int i, j;
1865
1866 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
1867 if (!priv->hwmon_name)
1868 return -ENOMEM;
1869
1870 for (i = j = 0; i < len && devname[i]; i++) {
1871 if (isalnum(devname[i]))
1872 priv->hwmon_name[j++] = devname[i];
1873 }
1874
1875 return 0;
1876}
1877
1878static int marvell_hwmon_probe(struct phy_device *phydev,
1879 const struct hwmon_chip_info *chip)
1880{
1881 struct marvell_priv *priv = phydev->priv;
1882 struct device *dev = &phydev->mdio.dev;
1883 int err;
1884
1885 err = marvell_hwmon_name(phydev);
1886 if (err)
1887 return err;
1888
1889 priv->hwmon_dev = devm_hwmon_device_register_with_info(
1890 dev, priv->hwmon_name, phydev, chip, NULL);
1891
1892 return PTR_ERR_OR_ZERO(priv->hwmon_dev);
1893}
1894
1895static int m88e1121_hwmon_probe(struct phy_device *phydev)
1896{
1897 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info);
1898}
1899
1900static int m88e1510_hwmon_probe(struct phy_device *phydev)
1901{
1902 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info);
1903}
1904#else
1905static int m88e1121_hwmon_probe(struct phy_device *phydev)
1906{
1907 return 0;
1908}
1909
1910static int m88e1510_hwmon_probe(struct phy_device *phydev)
1911{
1912 return 0;
1913}
1914#endif
1915
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001916static int marvell_probe(struct phy_device *phydev)
1917{
1918 struct marvell_priv *priv;
1919
Andrew Lunne5a03bf2016-01-06 20:11:16 +01001920 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001921 if (!priv)
1922 return -ENOMEM;
1923
1924 phydev->priv = priv;
1925
1926 return 0;
1927}
1928
Andrew Lunn0b046802017-01-20 01:37:49 +01001929static int m88e1121_probe(struct phy_device *phydev)
1930{
1931 int err;
1932
1933 err = marvell_probe(phydev);
1934 if (err)
1935 return err;
1936
1937 return m88e1121_hwmon_probe(phydev);
1938}
1939
1940static int m88e1510_probe(struct phy_device *phydev)
1941{
1942 int err;
1943
1944 err = marvell_probe(phydev);
1945 if (err)
1946 return err;
1947
1948 return m88e1510_hwmon_probe(phydev);
1949}
1950
Olof Johanssone5479232007-07-03 16:23:46 -05001951static struct phy_driver marvell_drivers[] = {
1952 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10001953 .phy_id = MARVELL_PHY_ID_88E1101,
1954 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssone5479232007-07-03 16:23:46 -05001955 .name = "Marvell 88E1101",
1956 .features = PHY_GBIT_FEATURES,
1957 .flags = PHY_HAS_INTERRUPT,
Arnd Bergmann18702412017-01-23 13:18:41 +01001958 .probe = marvell_probe,
Clemens Gruber79be1a12016-02-15 23:46:45 +01001959 .config_init = &marvell_config_init,
Andrew Lunnf2899782017-05-23 17:49:13 +02001960 .config_aneg = &m88e1101_config_aneg,
Olof Johanssone5479232007-07-03 16:23:46 -05001961 .read_status = &genphy_read_status,
1962 .ack_interrupt = &marvell_ack_interrupt,
1963 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01001964 .resume = &genphy_resume,
1965 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001966 .get_sset_count = marvell_get_sset_count,
1967 .get_strings = marvell_get_strings,
1968 .get_stats = marvell_get_stats,
Olof Johanssone5479232007-07-03 16:23:46 -05001969 },
1970 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10001971 .phy_id = MARVELL_PHY_ID_88E1112,
1972 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johansson85cfb532007-07-03 16:24:32 -05001973 .name = "Marvell 88E1112",
1974 .features = PHY_GBIT_FEATURES,
1975 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001976 .probe = marvell_probe,
Olof Johansson85cfb532007-07-03 16:24:32 -05001977 .config_init = &m88e1111_config_init,
1978 .config_aneg = &marvell_config_aneg,
1979 .read_status = &genphy_read_status,
1980 .ack_interrupt = &marvell_ack_interrupt,
1981 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01001982 .resume = &genphy_resume,
1983 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001984 .get_sset_count = marvell_get_sset_count,
1985 .get_strings = marvell_get_strings,
1986 .get_stats = marvell_get_stats,
Olof Johansson85cfb532007-07-03 16:24:32 -05001987 },
1988 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10001989 .phy_id = MARVELL_PHY_ID_88E1111,
1990 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssone5479232007-07-03 16:23:46 -05001991 .name = "Marvell 88E1111",
1992 .features = PHY_GBIT_FEATURES,
1993 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001994 .probe = marvell_probe,
Olof Johanssone5479232007-07-03 16:23:46 -05001995 .config_init = &m88e1111_config_init,
Harini Katakam3ec0a0f2016-06-27 13:09:59 +05301996 .config_aneg = &m88e1111_config_aneg,
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001997 .read_status = &marvell_read_status,
Olof Johanssone5479232007-07-03 16:23:46 -05001998 .ack_interrupt = &marvell_ack_interrupt,
1999 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002000 .resume = &genphy_resume,
2001 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002002 .get_sset_count = marvell_get_sset_count,
2003 .get_strings = marvell_get_strings,
2004 .get_stats = marvell_get_stats,
Olof Johanssone5479232007-07-03 16:23:46 -05002005 },
2006 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002007 .phy_id = MARVELL_PHY_ID_88E1118,
2008 .phy_id_mask = MARVELL_PHY_ID_MASK,
Ron Madrid605f1962008-11-06 09:05:26 +00002009 .name = "Marvell 88E1118",
2010 .features = PHY_GBIT_FEATURES,
2011 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002012 .probe = marvell_probe,
Ron Madrid605f1962008-11-06 09:05:26 +00002013 .config_init = &m88e1118_config_init,
2014 .config_aneg = &m88e1118_config_aneg,
2015 .read_status = &genphy_read_status,
2016 .ack_interrupt = &marvell_ack_interrupt,
2017 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002018 .resume = &genphy_resume,
2019 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002020 .get_sset_count = marvell_get_sset_count,
2021 .get_strings = marvell_get_strings,
2022 .get_stats = marvell_get_stats,
Ron Madrid605f1962008-11-06 09:05:26 +00002023 },
2024 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002025 .phy_id = MARVELL_PHY_ID_88E1121R,
2026 .phy_id_mask = MARVELL_PHY_ID_MASK,
Sergei Poselenov140bc922009-04-07 02:01:41 +00002027 .name = "Marvell 88E1121R",
2028 .features = PHY_GBIT_FEATURES,
2029 .flags = PHY_HAS_INTERRUPT,
Arnd Bergmann18702412017-01-23 13:18:41 +01002030 .probe = &m88e1121_probe,
Clemens Gruberfdecf362016-06-11 17:21:26 +02002031 .config_init = &m88e1121_config_init,
Sergei Poselenov140bc922009-04-07 02:01:41 +00002032 .config_aneg = &m88e1121_config_aneg,
2033 .read_status = &marvell_read_status,
2034 .ack_interrupt = &marvell_ack_interrupt,
2035 .config_intr = &marvell_config_intr,
Anatolij Gustschindcd07be2009-04-07 02:01:43 +00002036 .did_interrupt = &m88e1121_did_interrupt,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002037 .resume = &genphy_resume,
2038 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002039 .get_sset_count = marvell_get_sset_count,
2040 .get_strings = marvell_get_strings,
2041 .get_stats = marvell_get_stats,
Sergei Poselenov140bc922009-04-07 02:01:41 +00002042 },
2043 {
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -07002044 .phy_id = MARVELL_PHY_ID_88E1318S,
Linus Torvalds6ba74012010-08-04 11:47:58 -07002045 .phy_id_mask = MARVELL_PHY_ID_MASK,
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -07002046 .name = "Marvell 88E1318S",
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -07002047 .features = PHY_GBIT_FEATURES,
2048 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002049 .probe = marvell_probe,
Clemens Gruberfdecf362016-06-11 17:21:26 +02002050 .config_init = &m88e1121_config_init,
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -07002051 .config_aneg = &m88e1318_config_aneg,
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -07002052 .read_status = &marvell_read_status,
2053 .ack_interrupt = &marvell_ack_interrupt,
2054 .config_intr = &marvell_config_intr,
2055 .did_interrupt = &m88e1121_did_interrupt,
Michael Stapelberg3871c382013-03-11 13:56:45 +00002056 .get_wol = &m88e1318_get_wol,
2057 .set_wol = &m88e1318_set_wol,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002058 .resume = &genphy_resume,
2059 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002060 .get_sset_count = marvell_get_sset_count,
2061 .get_strings = marvell_get_strings,
2062 .get_stats = marvell_get_stats,
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -07002063 },
2064 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002065 .phy_id = MARVELL_PHY_ID_88E1145,
2066 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssone5479232007-07-03 16:23:46 -05002067 .name = "Marvell 88E1145",
2068 .features = PHY_GBIT_FEATURES,
2069 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002070 .probe = marvell_probe,
Olof Johanssone5479232007-07-03 16:23:46 -05002071 .config_init = &m88e1145_config_init,
2072 .config_aneg = &marvell_config_aneg,
2073 .read_status = &genphy_read_status,
2074 .ack_interrupt = &marvell_ack_interrupt,
2075 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002076 .resume = &genphy_resume,
2077 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002078 .get_sset_count = marvell_get_sset_count,
2079 .get_strings = marvell_get_strings,
2080 .get_stats = marvell_get_stats,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002081 },
2082 {
David Daney90600732010-11-19 11:58:53 +00002083 .phy_id = MARVELL_PHY_ID_88E1149R,
2084 .phy_id_mask = MARVELL_PHY_ID_MASK,
2085 .name = "Marvell 88E1149R",
2086 .features = PHY_GBIT_FEATURES,
2087 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002088 .probe = marvell_probe,
David Daney90600732010-11-19 11:58:53 +00002089 .config_init = &m88e1149_config_init,
2090 .config_aneg = &m88e1118_config_aneg,
2091 .read_status = &genphy_read_status,
2092 .ack_interrupt = &marvell_ack_interrupt,
2093 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002094 .resume = &genphy_resume,
2095 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002096 .get_sset_count = marvell_get_sset_count,
2097 .get_strings = marvell_get_strings,
2098 .get_stats = marvell_get_stats,
David Daney90600732010-11-19 11:58:53 +00002099 },
2100 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002101 .phy_id = MARVELL_PHY_ID_88E1240,
2102 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002103 .name = "Marvell 88E1240",
2104 .features = PHY_GBIT_FEATURES,
2105 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002106 .probe = marvell_probe,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002107 .config_init = &m88e1111_config_init,
2108 .config_aneg = &marvell_config_aneg,
2109 .read_status = &genphy_read_status,
2110 .ack_interrupt = &marvell_ack_interrupt,
2111 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002112 .resume = &genphy_resume,
2113 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002114 .get_sset_count = marvell_get_sset_count,
2115 .get_strings = marvell_get_strings,
2116 .get_stats = marvell_get_stats,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002117 },
Michal Simek3da09a52013-05-30 20:08:26 +00002118 {
2119 .phy_id = MARVELL_PHY_ID_88E1116R,
2120 .phy_id_mask = MARVELL_PHY_ID_MASK,
2121 .name = "Marvell 88E1116R",
2122 .features = PHY_GBIT_FEATURES,
2123 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002124 .probe = marvell_probe,
Michal Simek3da09a52013-05-30 20:08:26 +00002125 .config_init = &m88e1116r_config_init,
2126 .config_aneg = &genphy_config_aneg,
2127 .read_status = &genphy_read_status,
2128 .ack_interrupt = &marvell_ack_interrupt,
2129 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002130 .resume = &genphy_resume,
2131 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002132 .get_sset_count = marvell_get_sset_count,
2133 .get_strings = marvell_get_strings,
2134 .get_stats = marvell_get_stats,
Michal Simek3da09a52013-05-30 20:08:26 +00002135 },
Michal Simek10e24caa2013-05-30 20:08:27 +00002136 {
2137 .phy_id = MARVELL_PHY_ID_88E1510,
2138 .phy_id_mask = MARVELL_PHY_ID_MASK,
2139 .name = "Marvell 88E1510",
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02002140 .features = PHY_GBIT_FEATURES | SUPPORTED_FIBRE,
Arnd Bergmann18702412017-01-23 13:18:41 +01002141 .flags = PHY_HAS_INTERRUPT,
Andrew Lunn0b046802017-01-20 01:37:49 +01002142 .probe = &m88e1510_probe,
Stefan Roese930b37e2016-02-18 10:59:07 +01002143 .config_init = &m88e1510_config_init,
Michal Simek10e24caa2013-05-30 20:08:27 +00002144 .config_aneg = &m88e1510_config_aneg,
2145 .read_status = &marvell_read_status,
2146 .ack_interrupt = &marvell_ack_interrupt,
2147 .config_intr = &marvell_config_intr,
2148 .did_interrupt = &m88e1121_did_interrupt,
Jingju Houf39aac72017-01-22 18:20:56 +08002149 .get_wol = &m88e1318_get_wol,
2150 .set_wol = &m88e1318_set_wol,
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02002151 .resume = &marvell_resume,
2152 .suspend = &marvell_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002153 .get_sset_count = marvell_get_sset_count,
2154 .get_strings = marvell_get_strings,
2155 .get_stats = marvell_get_stats,
Lin Yun Shengf0f9b4e2017-06-30 17:44:15 +08002156 .set_loopback = genphy_loopback,
Michal Simek10e24caa2013-05-30 20:08:27 +00002157 },
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002158 {
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002159 .phy_id = MARVELL_PHY_ID_88E1540,
2160 .phy_id_mask = MARVELL_PHY_ID_MASK,
2161 .name = "Marvell 88E1540",
2162 .features = PHY_GBIT_FEATURES,
2163 .flags = PHY_HAS_INTERRUPT,
Arnd Bergmann18702412017-01-23 13:18:41 +01002164 .probe = m88e1510_probe,
Clemens Gruber79be1a12016-02-15 23:46:45 +01002165 .config_init = &marvell_config_init,
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002166 .config_aneg = &m88e1510_config_aneg,
2167 .read_status = &marvell_read_status,
2168 .ack_interrupt = &marvell_ack_interrupt,
2169 .config_intr = &marvell_config_intr,
2170 .did_interrupt = &m88e1121_did_interrupt,
2171 .resume = &genphy_resume,
2172 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002173 .get_sset_count = marvell_get_sset_count,
2174 .get_strings = marvell_get_strings,
2175 .get_stats = marvell_get_stats,
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002176 },
2177 {
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002178 .phy_id = MARVELL_PHY_ID_88E1545,
2179 .phy_id_mask = MARVELL_PHY_ID_MASK,
2180 .name = "Marvell 88E1545",
2181 .probe = m88e1510_probe,
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002182 .features = PHY_GBIT_FEATURES,
2183 .flags = PHY_HAS_INTERRUPT,
2184 .config_init = &marvell_config_init,
2185 .config_aneg = &m88e1510_config_aneg,
2186 .read_status = &marvell_read_status,
2187 .ack_interrupt = &marvell_ack_interrupt,
2188 .config_intr = &marvell_config_intr,
2189 .did_interrupt = &m88e1121_did_interrupt,
2190 .resume = &genphy_resume,
2191 .suspend = &genphy_suspend,
2192 .get_sset_count = marvell_get_sset_count,
2193 .get_strings = marvell_get_strings,
2194 .get_stats = marvell_get_stats,
2195 },
2196 {
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002197 .phy_id = MARVELL_PHY_ID_88E3016,
2198 .phy_id_mask = MARVELL_PHY_ID_MASK,
2199 .name = "Marvell 88E3016",
2200 .features = PHY_BASIC_FEATURES,
2201 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002202 .probe = marvell_probe,
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002203 .config_aneg = &genphy_config_aneg,
2204 .config_init = &m88e3016_config_init,
2205 .aneg_done = &marvell_aneg_done,
2206 .read_status = &marvell_read_status,
2207 .ack_interrupt = &marvell_ack_interrupt,
2208 .config_intr = &marvell_config_intr,
2209 .did_interrupt = &m88e1121_did_interrupt,
2210 .resume = &genphy_resume,
2211 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002212 .get_sset_count = marvell_get_sset_count,
2213 .get_strings = marvell_get_strings,
2214 .get_stats = marvell_get_stats,
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002215 },
Andrew Lunne4cf8a32017-02-01 03:40:06 +01002216 {
2217 .phy_id = MARVELL_PHY_ID_88E6390,
2218 .phy_id_mask = MARVELL_PHY_ID_MASK,
2219 .name = "Marvell 88E6390",
2220 .features = PHY_GBIT_FEATURES,
2221 .flags = PHY_HAS_INTERRUPT,
2222 .probe = m88e1510_probe,
2223 .config_init = &marvell_config_init,
2224 .config_aneg = &m88e1510_config_aneg,
2225 .read_status = &marvell_read_status,
2226 .ack_interrupt = &marvell_ack_interrupt,
2227 .config_intr = &marvell_config_intr,
2228 .did_interrupt = &m88e1121_did_interrupt,
2229 .resume = &genphy_resume,
2230 .suspend = &genphy_suspend,
2231 .get_sset_count = marvell_get_sset_count,
2232 .get_strings = marvell_get_strings,
2233 .get_stats = marvell_get_stats,
2234 },
Andy Fleming00db8182005-07-30 19:31:23 -04002235};
2236
Johan Hovold50fd7152014-11-11 19:45:59 +01002237module_phy_driver(marvell_drivers);
David Woodhouse4e4f10f2010-04-02 01:05:56 +00002238
Uwe Kleine-Königcf93c942010-10-03 23:43:32 +00002239static struct mdio_device_id __maybe_unused marvell_tbl[] = {
Michal Simekf5e1cab2013-05-30 20:08:25 +00002240 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
2241 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
2242 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
2243 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
2244 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
2245 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
2246 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
2247 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
2248 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
Michal Simek3da09a52013-05-30 20:08:26 +00002249 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
Michal Simek10e24caa2013-05-30 20:08:27 +00002250 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002251 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002252 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002253 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
Andrew Lunne4cf8a32017-02-01 03:40:06 +01002254 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK },
David Woodhouse4e4f10f2010-04-02 01:05:56 +00002255 { }
2256};
2257
2258MODULE_DEVICE_TABLE(mdio, marvell_tbl);