Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 1 | /* |
| 2 | * MXC GPIO support. (c) 2008 Daniel Mack <daniel@caiaq.de> |
| 3 | * Copyright 2008 Juergen Beisert, kernel@pengutronix.de |
| 4 | * |
| 5 | * Based on code from Freescale, |
| 6 | * Copyright (C) 2004-2010 Freescale Semiconductor, Inc. All Rights Reserved. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License |
| 10 | * as published by the Free Software Foundation; either version 2 |
| 11 | * of the License, or (at your option) any later version. |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, |
| 20 | * MA 02110-1301, USA. |
| 21 | */ |
| 22 | |
| 23 | #include <linux/init.h> |
| 24 | #include <linux/interrupt.h> |
| 25 | #include <linux/io.h> |
| 26 | #include <linux/irq.h> |
| 27 | #include <linux/gpio.h> |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame] | 28 | #include <linux/platform_device.h> |
| 29 | #include <linux/slab.h> |
Shawn Guo | 06f88a8 | 2011-06-06 22:31:29 +0800 | [diff] [blame] | 30 | #include <linux/basic_mmio_gpio.h> |
Paul Gortmaker | bb207ef | 2011-07-03 13:38:09 -0400 | [diff] [blame] | 31 | #include <linux/module.h> |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 32 | |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame] | 33 | #define MXS_SET 0x4 |
| 34 | #define MXS_CLR 0x8 |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 35 | |
Shawn Guo | 164387d | 2012-05-03 23:32:52 +0800 | [diff] [blame^] | 36 | #define PINCTRL_DOUT(p) ((is_imx23_gpio(p) ? 0x0500 : 0x0700) + (p->id) * 0x10) |
| 37 | #define PINCTRL_DIN(p) ((is_imx23_gpio(p) ? 0x0600 : 0x0900) + (p->id) * 0x10) |
| 38 | #define PINCTRL_DOE(p) ((is_imx23_gpio(p) ? 0x0700 : 0x0b00) + (p->id) * 0x10) |
| 39 | #define PINCTRL_PIN2IRQ(p) ((is_imx23_gpio(p) ? 0x0800 : 0x1000) + (p->id) * 0x10) |
| 40 | #define PINCTRL_IRQEN(p) ((is_imx23_gpio(p) ? 0x0900 : 0x1100) + (p->id) * 0x10) |
| 41 | #define PINCTRL_IRQLEV(p) ((is_imx23_gpio(p) ? 0x0a00 : 0x1200) + (p->id) * 0x10) |
| 42 | #define PINCTRL_IRQPOL(p) ((is_imx23_gpio(p) ? 0x0b00 : 0x1300) + (p->id) * 0x10) |
| 43 | #define PINCTRL_IRQSTAT(p) ((is_imx23_gpio(p) ? 0x0c00 : 0x1400) + (p->id) * 0x10) |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 44 | |
| 45 | #define GPIO_INT_FALL_EDGE 0x0 |
| 46 | #define GPIO_INT_LOW_LEV 0x1 |
| 47 | #define GPIO_INT_RISE_EDGE 0x2 |
| 48 | #define GPIO_INT_HIGH_LEV 0x3 |
| 49 | #define GPIO_INT_LEV_MASK (1 << 0) |
| 50 | #define GPIO_INT_POL_MASK (1 << 1) |
| 51 | |
Shawn Guo | 7e6c53a | 2011-08-14 00:14:06 +0800 | [diff] [blame] | 52 | #define irq_to_gpio(irq) ((irq) - MXS_GPIO_IRQ_START) |
| 53 | |
Shawn Guo | 164387d | 2012-05-03 23:32:52 +0800 | [diff] [blame^] | 54 | enum mxs_gpio_id { |
| 55 | IMX23_GPIO, |
| 56 | IMX28_GPIO, |
| 57 | }; |
| 58 | |
Grant Likely | 7b2fa57 | 2011-06-06 09:37:58 -0600 | [diff] [blame] | 59 | struct mxs_gpio_port { |
| 60 | void __iomem *base; |
| 61 | int id; |
| 62 | int irq; |
Grant Likely | 7b2fa57 | 2011-06-06 09:37:58 -0600 | [diff] [blame] | 63 | int virtual_irq_start; |
Shawn Guo | 06f88a8 | 2011-06-06 22:31:29 +0800 | [diff] [blame] | 64 | struct bgpio_chip bgc; |
Shawn Guo | 164387d | 2012-05-03 23:32:52 +0800 | [diff] [blame^] | 65 | enum mxs_gpio_id devid; |
Grant Likely | 7b2fa57 | 2011-06-06 09:37:58 -0600 | [diff] [blame] | 66 | }; |
| 67 | |
Shawn Guo | 164387d | 2012-05-03 23:32:52 +0800 | [diff] [blame^] | 68 | static inline int is_imx23_gpio(struct mxs_gpio_port *port) |
| 69 | { |
| 70 | return port->devid == IMX23_GPIO; |
| 71 | } |
| 72 | |
| 73 | static inline int is_imx28_gpio(struct mxs_gpio_port *port) |
| 74 | { |
| 75 | return port->devid == IMX28_GPIO; |
| 76 | } |
| 77 | |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 78 | /* Note: This driver assumes 32 GPIOs are handled in one register */ |
| 79 | |
Uwe Kleine-König | bf0c1118 | 2011-02-18 21:31:41 +0100 | [diff] [blame] | 80 | static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type) |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 81 | { |
Uwe Kleine-König | bf0c1118 | 2011-02-18 21:31:41 +0100 | [diff] [blame] | 82 | u32 gpio = irq_to_gpio(d->irq); |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 83 | u32 pin_mask = 1 << (gpio & 31); |
Shawn Guo | 498c17c | 2011-06-07 22:00:54 +0800 | [diff] [blame] | 84 | struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); |
| 85 | struct mxs_gpio_port *port = gc->private; |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 86 | void __iomem *pin_addr; |
| 87 | int edge; |
| 88 | |
| 89 | switch (type) { |
| 90 | case IRQ_TYPE_EDGE_RISING: |
| 91 | edge = GPIO_INT_RISE_EDGE; |
| 92 | break; |
| 93 | case IRQ_TYPE_EDGE_FALLING: |
| 94 | edge = GPIO_INT_FALL_EDGE; |
| 95 | break; |
| 96 | case IRQ_TYPE_LEVEL_LOW: |
| 97 | edge = GPIO_INT_LOW_LEV; |
| 98 | break; |
| 99 | case IRQ_TYPE_LEVEL_HIGH: |
| 100 | edge = GPIO_INT_HIGH_LEV; |
| 101 | break; |
| 102 | default: |
| 103 | return -EINVAL; |
| 104 | } |
| 105 | |
| 106 | /* set level or edge */ |
Shawn Guo | 164387d | 2012-05-03 23:32:52 +0800 | [diff] [blame^] | 107 | pin_addr = port->base + PINCTRL_IRQLEV(port); |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 108 | if (edge & GPIO_INT_LEV_MASK) |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame] | 109 | writel(pin_mask, pin_addr + MXS_SET); |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 110 | else |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame] | 111 | writel(pin_mask, pin_addr + MXS_CLR); |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 112 | |
| 113 | /* set polarity */ |
Shawn Guo | 164387d | 2012-05-03 23:32:52 +0800 | [diff] [blame^] | 114 | pin_addr = port->base + PINCTRL_IRQPOL(port); |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 115 | if (edge & GPIO_INT_POL_MASK) |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame] | 116 | writel(pin_mask, pin_addr + MXS_SET); |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 117 | else |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame] | 118 | writel(pin_mask, pin_addr + MXS_CLR); |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 119 | |
Shawn Guo | 498c17c | 2011-06-07 22:00:54 +0800 | [diff] [blame] | 120 | writel(1 << (gpio & 0x1f), |
Shawn Guo | 164387d | 2012-05-03 23:32:52 +0800 | [diff] [blame^] | 121 | port->base + PINCTRL_IRQSTAT(port) + MXS_CLR); |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 122 | |
| 123 | return 0; |
| 124 | } |
| 125 | |
| 126 | /* MXS has one interrupt *per* gpio port */ |
| 127 | static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc) |
| 128 | { |
| 129 | u32 irq_stat; |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame] | 130 | struct mxs_gpio_port *port = irq_get_handler_data(irq); |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 131 | u32 gpio_irq_no_base = port->virtual_irq_start; |
| 132 | |
Uwe Kleine-König | 1f6b5dd | 2011-01-25 16:54:22 +0100 | [diff] [blame] | 133 | desc->irq_data.chip->irq_ack(&desc->irq_data); |
| 134 | |
Shawn Guo | 164387d | 2012-05-03 23:32:52 +0800 | [diff] [blame^] | 135 | irq_stat = readl(port->base + PINCTRL_IRQSTAT(port)) & |
| 136 | readl(port->base + PINCTRL_IRQEN(port)); |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 137 | |
| 138 | while (irq_stat != 0) { |
| 139 | int irqoffset = fls(irq_stat) - 1; |
| 140 | generic_handle_irq(gpio_irq_no_base + irqoffset); |
| 141 | irq_stat &= ~(1 << irqoffset); |
| 142 | } |
| 143 | } |
| 144 | |
| 145 | /* |
| 146 | * Set interrupt number "irq" in the GPIO as a wake-up source. |
| 147 | * While system is running, all registered GPIO interrupts need to have |
| 148 | * wake-up enabled. When system is suspended, only selected GPIO interrupts |
| 149 | * need to have wake-up enabled. |
| 150 | * @param irq interrupt source number |
| 151 | * @param enable enable as wake-up if equal to non-zero |
| 152 | * @return This function returns 0 on success. |
| 153 | */ |
Uwe Kleine-König | bf0c1118 | 2011-02-18 21:31:41 +0100 | [diff] [blame] | 154 | static int mxs_gpio_set_wake_irq(struct irq_data *d, unsigned int enable) |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 155 | { |
Shawn Guo | 498c17c | 2011-06-07 22:00:54 +0800 | [diff] [blame] | 156 | struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); |
| 157 | struct mxs_gpio_port *port = gc->private; |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 158 | |
Shawn Guo | 6161715 | 2011-06-07 22:00:53 +0800 | [diff] [blame] | 159 | if (enable) |
| 160 | enable_irq_wake(port->irq); |
| 161 | else |
| 162 | disable_irq_wake(port->irq); |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 163 | |
| 164 | return 0; |
| 165 | } |
| 166 | |
Shawn Guo | 498c17c | 2011-06-07 22:00:54 +0800 | [diff] [blame] | 167 | static void __init mxs_gpio_init_gc(struct mxs_gpio_port *port) |
| 168 | { |
| 169 | struct irq_chip_generic *gc; |
| 170 | struct irq_chip_type *ct; |
| 171 | |
| 172 | gc = irq_alloc_generic_chip("gpio-mxs", 1, port->virtual_irq_start, |
| 173 | port->base, handle_level_irq); |
| 174 | gc->private = port; |
| 175 | |
| 176 | ct = gc->chip_types; |
Shawn Guo | 591567a | 2011-07-19 21:16:56 +0800 | [diff] [blame] | 177 | ct->chip.irq_ack = irq_gc_ack_set_bit; |
Shawn Guo | 498c17c | 2011-06-07 22:00:54 +0800 | [diff] [blame] | 178 | ct->chip.irq_mask = irq_gc_mask_clr_bit; |
| 179 | ct->chip.irq_unmask = irq_gc_mask_set_bit; |
| 180 | ct->chip.irq_set_type = mxs_gpio_set_irq_type; |
Shawn Guo | 591567a | 2011-07-19 21:16:56 +0800 | [diff] [blame] | 181 | ct->chip.irq_set_wake = mxs_gpio_set_wake_irq; |
Shawn Guo | 164387d | 2012-05-03 23:32:52 +0800 | [diff] [blame^] | 182 | ct->regs.ack = PINCTRL_IRQSTAT(port) + MXS_CLR; |
| 183 | ct->regs.mask = PINCTRL_IRQEN(port); |
Shawn Guo | 498c17c | 2011-06-07 22:00:54 +0800 | [diff] [blame] | 184 | |
| 185 | irq_setup_generic_chip(gc, IRQ_MSK(32), 0, IRQ_NOREQUEST, 0); |
| 186 | } |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 187 | |
Shawn Guo | 06f88a8 | 2011-06-06 22:31:29 +0800 | [diff] [blame] | 188 | static int mxs_gpio_to_irq(struct gpio_chip *gc, unsigned offset) |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 189 | { |
Shawn Guo | 06f88a8 | 2011-06-06 22:31:29 +0800 | [diff] [blame] | 190 | struct bgpio_chip *bgc = to_bgpio_chip(gc); |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 191 | struct mxs_gpio_port *port = |
Shawn Guo | 06f88a8 | 2011-06-06 22:31:29 +0800 | [diff] [blame] | 192 | container_of(bgc, struct mxs_gpio_port, bgc); |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 193 | |
| 194 | return port->virtual_irq_start + offset; |
| 195 | } |
| 196 | |
Shawn Guo | 164387d | 2012-05-03 23:32:52 +0800 | [diff] [blame^] | 197 | static struct platform_device_id mxs_gpio_ids[] = { |
| 198 | { |
| 199 | .name = "imx23-gpio", |
| 200 | .driver_data = IMX23_GPIO, |
| 201 | }, { |
| 202 | .name = "imx28-gpio", |
| 203 | .driver_data = IMX28_GPIO, |
| 204 | }, { |
| 205 | /* sentinel */ |
| 206 | } |
| 207 | }; |
| 208 | MODULE_DEVICE_TABLE(platform, mxs_gpio_ids); |
| 209 | |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame] | 210 | static int __devinit mxs_gpio_probe(struct platform_device *pdev) |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 211 | { |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame] | 212 | static void __iomem *base; |
| 213 | struct mxs_gpio_port *port; |
| 214 | struct resource *iores = NULL; |
Shawn Guo | 498c17c | 2011-06-07 22:00:54 +0800 | [diff] [blame] | 215 | int err; |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 216 | |
Shawn Guo | 940a4f7 | 2012-05-04 10:30:14 +0800 | [diff] [blame] | 217 | port = devm_kzalloc(&pdev->dev, sizeof(*port), GFP_KERNEL); |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame] | 218 | if (!port) |
| 219 | return -ENOMEM; |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 220 | |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame] | 221 | port->id = pdev->id; |
Shawn Guo | 164387d | 2012-05-03 23:32:52 +0800 | [diff] [blame^] | 222 | port->devid = pdev->id_entry->driver_data; |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame] | 223 | port->virtual_irq_start = MXS_GPIO_IRQ_START + port->id * 32; |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 224 | |
Shawn Guo | 940a4f7 | 2012-05-04 10:30:14 +0800 | [diff] [blame] | 225 | port->irq = platform_get_irq(pdev, 0); |
| 226 | if (port->irq < 0) |
| 227 | return port->irq; |
| 228 | |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame] | 229 | /* |
| 230 | * map memory region only once, as all the gpio ports |
| 231 | * share the same one |
| 232 | */ |
| 233 | if (!base) { |
| 234 | iores = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
Shawn Guo | 940a4f7 | 2012-05-04 10:30:14 +0800 | [diff] [blame] | 235 | base = devm_request_and_ioremap(&pdev->dev, iores); |
| 236 | if (!base) |
| 237 | return -EADDRNOTAVAIL; |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 238 | } |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame] | 239 | port->base = base; |
| 240 | |
Shawn Guo | 498c17c | 2011-06-07 22:00:54 +0800 | [diff] [blame] | 241 | /* |
| 242 | * select the pin interrupt functionality but initially |
| 243 | * disable the interrupts |
| 244 | */ |
Shawn Guo | 164387d | 2012-05-03 23:32:52 +0800 | [diff] [blame^] | 245 | writel(~0U, port->base + PINCTRL_PIN2IRQ(port)); |
| 246 | writel(0, port->base + PINCTRL_IRQEN(port)); |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame] | 247 | |
| 248 | /* clear address has to be used to clear IRQSTAT bits */ |
Shawn Guo | 164387d | 2012-05-03 23:32:52 +0800 | [diff] [blame^] | 249 | writel(~0U, port->base + PINCTRL_IRQSTAT(port) + MXS_CLR); |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame] | 250 | |
Shawn Guo | 498c17c | 2011-06-07 22:00:54 +0800 | [diff] [blame] | 251 | /* gpio-mxs can be a generic irq chip */ |
| 252 | mxs_gpio_init_gc(port); |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame] | 253 | |
| 254 | /* setup one handler for each entry */ |
| 255 | irq_set_chained_handler(port->irq, mxs_gpio_irq_handler); |
| 256 | irq_set_handler_data(port->irq, port); |
| 257 | |
Shawn Guo | 06f88a8 | 2011-06-06 22:31:29 +0800 | [diff] [blame] | 258 | err = bgpio_init(&port->bgc, &pdev->dev, 4, |
Shawn Guo | 164387d | 2012-05-03 23:32:52 +0800 | [diff] [blame^] | 259 | port->base + PINCTRL_DIN(port), |
| 260 | port->base + PINCTRL_DOUT(port), NULL, |
| 261 | port->base + PINCTRL_DOE(port), NULL, false); |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame] | 262 | if (err) |
Shawn Guo | 940a4f7 | 2012-05-04 10:30:14 +0800 | [diff] [blame] | 263 | return err; |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 264 | |
Shawn Guo | 06f88a8 | 2011-06-06 22:31:29 +0800 | [diff] [blame] | 265 | port->bgc.gc.to_irq = mxs_gpio_to_irq; |
| 266 | port->bgc.gc.base = port->id * 32; |
| 267 | |
| 268 | err = gpiochip_add(&port->bgc.gc); |
Shawn Guo | 940a4f7 | 2012-05-04 10:30:14 +0800 | [diff] [blame] | 269 | if (err) { |
| 270 | bgpio_remove(&port->bgc); |
| 271 | return err; |
| 272 | } |
Shawn Guo | 06f88a8 | 2011-06-06 22:31:29 +0800 | [diff] [blame] | 273 | |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 274 | return 0; |
| 275 | } |
| 276 | |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame] | 277 | static struct platform_driver mxs_gpio_driver = { |
| 278 | .driver = { |
| 279 | .name = "gpio-mxs", |
| 280 | .owner = THIS_MODULE, |
| 281 | }, |
| 282 | .probe = mxs_gpio_probe, |
Shawn Guo | 164387d | 2012-05-03 23:32:52 +0800 | [diff] [blame^] | 283 | .id_table = mxs_gpio_ids, |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 284 | }; |
Sascha Hauer | ef19660 | 2011-01-24 12:57:46 +0100 | [diff] [blame] | 285 | |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame] | 286 | static int __init mxs_gpio_init(void) |
Sascha Hauer | ef19660 | 2011-01-24 12:57:46 +0100 | [diff] [blame] | 287 | { |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame] | 288 | return platform_driver_register(&mxs_gpio_driver); |
Sascha Hauer | ef19660 | 2011-01-24 12:57:46 +0100 | [diff] [blame] | 289 | } |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame] | 290 | postcore_initcall(mxs_gpio_init); |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 291 | |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame] | 292 | MODULE_AUTHOR("Freescale Semiconductor, " |
| 293 | "Daniel Mack <danielncaiaq.de>, " |
| 294 | "Juergen Beisert <kernel@pengutronix.de>"); |
| 295 | MODULE_DESCRIPTION("Freescale MXS GPIO"); |
| 296 | MODULE_LICENSE("GPL"); |