| Ard Biesheuvel | 006d062 | 2015-03-10 09:47:46 +0100 | [diff] [blame] | 1 | /* |
| 2 | * sha2-ce-core.S - SHA-224/256 secure hash using ARMv8 Crypto Extensions |
| 3 | * |
| 4 | * Copyright (C) 2015 Linaro Ltd. |
| 5 | * Author: Ard Biesheuvel <ard.biesheuvel@linaro.org> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | */ |
| 11 | |
| 12 | #include <linux/linkage.h> |
| 13 | #include <asm/assembler.h> |
| 14 | |
| 15 | .text |
| 16 | .fpu crypto-neon-fp-armv8 |
| 17 | |
| 18 | k0 .req q7 |
| 19 | k1 .req q8 |
| 20 | rk .req r3 |
| 21 | |
| 22 | ta0 .req q9 |
| 23 | ta1 .req q10 |
| 24 | tb0 .req q10 |
| 25 | tb1 .req q9 |
| 26 | |
| 27 | dga .req q11 |
| 28 | dgb .req q12 |
| 29 | |
| 30 | dg0 .req q13 |
| 31 | dg1 .req q14 |
| 32 | dg2 .req q15 |
| 33 | |
| 34 | .macro add_only, ev, s0 |
| 35 | vmov dg2, dg0 |
| 36 | .ifnb \s0 |
| 37 | vld1.32 {k\ev}, [rk, :128]! |
| 38 | .endif |
| 39 | sha256h.32 dg0, dg1, tb\ev |
| 40 | sha256h2.32 dg1, dg2, tb\ev |
| 41 | .ifnb \s0 |
| 42 | vadd.u32 ta\ev, q\s0, k\ev |
| 43 | .endif |
| 44 | .endm |
| 45 | |
| 46 | .macro add_update, ev, s0, s1, s2, s3 |
| 47 | sha256su0.32 q\s0, q\s1 |
| 48 | add_only \ev, \s1 |
| 49 | sha256su1.32 q\s0, q\s2, q\s3 |
| 50 | .endm |
| 51 | |
| 52 | .align 6 |
| 53 | .Lsha256_rcon: |
| 54 | .word 0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5 |
| 55 | .word 0x3956c25b, 0x59f111f1, 0x923f82a4, 0xab1c5ed5 |
| 56 | .word 0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3 |
| 57 | .word 0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174 |
| 58 | .word 0xe49b69c1, 0xefbe4786, 0x0fc19dc6, 0x240ca1cc |
| 59 | .word 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da |
| 60 | .word 0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7 |
| 61 | .word 0xc6e00bf3, 0xd5a79147, 0x06ca6351, 0x14292967 |
| 62 | .word 0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13 |
| 63 | .word 0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85 |
| 64 | .word 0xa2bfe8a1, 0xa81a664b, 0xc24b8b70, 0xc76c51a3 |
| 65 | .word 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070 |
| 66 | .word 0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5 |
| 67 | .word 0x391c0cb3, 0x4ed8aa4a, 0x5b9cca4f, 0x682e6ff3 |
| 68 | .word 0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208 |
| 69 | .word 0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2 |
| 70 | |
| 71 | /* |
| Ard Biesheuvel | 9205b94 | 2015-04-09 12:55:43 +0200 | [diff] [blame] | 72 | * void sha2_ce_transform(struct sha256_state *sst, u8 const *src, |
| 73 | int blocks); |
| Ard Biesheuvel | 006d062 | 2015-03-10 09:47:46 +0100 | [diff] [blame] | 74 | */ |
| 75 | ENTRY(sha2_ce_transform) |
| 76 | /* load state */ |
| Ard Biesheuvel | 9205b94 | 2015-04-09 12:55:43 +0200 | [diff] [blame] | 77 | vld1.32 {dga-dgb}, [r0] |
| Ard Biesheuvel | 006d062 | 2015-03-10 09:47:46 +0100 | [diff] [blame] | 78 | |
| 79 | /* load input */ |
| 80 | 0: vld1.32 {q0-q1}, [r1]! |
| 81 | vld1.32 {q2-q3}, [r1]! |
| Ard Biesheuvel | 9205b94 | 2015-04-09 12:55:43 +0200 | [diff] [blame] | 82 | subs r2, r2, #1 |
| Ard Biesheuvel | 006d062 | 2015-03-10 09:47:46 +0100 | [diff] [blame] | 83 | |
| Ard Biesheuvel | 006d062 | 2015-03-10 09:47:46 +0100 | [diff] [blame] | 84 | #ifndef CONFIG_CPU_BIG_ENDIAN |
| 85 | vrev32.8 q0, q0 |
| 86 | vrev32.8 q1, q1 |
| 87 | vrev32.8 q2, q2 |
| 88 | vrev32.8 q3, q3 |
| 89 | #endif |
| 90 | |
| 91 | /* load first round constant */ |
| 92 | adr rk, .Lsha256_rcon |
| 93 | vld1.32 {k0}, [rk, :128]! |
| 94 | |
| 95 | vadd.u32 ta0, q0, k0 |
| 96 | vmov dg0, dga |
| 97 | vmov dg1, dgb |
| 98 | |
| 99 | add_update 1, 0, 1, 2, 3 |
| 100 | add_update 0, 1, 2, 3, 0 |
| 101 | add_update 1, 2, 3, 0, 1 |
| 102 | add_update 0, 3, 0, 1, 2 |
| 103 | add_update 1, 0, 1, 2, 3 |
| 104 | add_update 0, 1, 2, 3, 0 |
| 105 | add_update 1, 2, 3, 0, 1 |
| 106 | add_update 0, 3, 0, 1, 2 |
| 107 | add_update 1, 0, 1, 2, 3 |
| 108 | add_update 0, 1, 2, 3, 0 |
| 109 | add_update 1, 2, 3, 0, 1 |
| 110 | add_update 0, 3, 0, 1, 2 |
| 111 | |
| 112 | add_only 1, 1 |
| 113 | add_only 0, 2 |
| 114 | add_only 1, 3 |
| 115 | add_only 0 |
| 116 | |
| 117 | /* update state */ |
| 118 | vadd.u32 dga, dga, dg0 |
| 119 | vadd.u32 dgb, dgb, dg1 |
| 120 | bne 0b |
| 121 | |
| 122 | /* store new state */ |
| Ard Biesheuvel | 9205b94 | 2015-04-09 12:55:43 +0200 | [diff] [blame] | 123 | vst1.32 {dga-dgb}, [r0] |
| Ard Biesheuvel | 006d062 | 2015-03-10 09:47:46 +0100 | [diff] [blame] | 124 | bx lr |
| 125 | ENDPROC(sha2_ce_transform) |