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Dan Williams9bc89cd2007-01-02 11:10:44 -07001/*
2 * xor offload engine api
3 *
4 * Copyright © 2006, Intel Corporation.
5 *
6 * Dan Williams <dan.j.williams@intel.com>
7 *
8 * with architecture considerations by:
9 * Neil Brown <neilb@suse.de>
10 * Jeff Garzik <jeff@garzik.org>
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms and conditions of the GNU General Public License,
14 * version 2, as published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope it will be useful, but WITHOUT
17 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * more details.
20 *
21 * You should have received a copy of the GNU General Public License along with
22 * this program; if not, write to the Free Software Foundation, Inc.,
23 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
24 *
25 */
26#include <linux/kernel.h>
27#include <linux/interrupt.h>
Paul Gortmaker4bb33cc2011-05-27 14:41:48 -040028#include <linux/module.h>
Dan Williams9bc89cd2007-01-02 11:10:44 -070029#include <linux/mm.h>
30#include <linux/dma-mapping.h>
31#include <linux/raid/xor.h>
32#include <linux/async_tx.h>
33
Dan Williams06164f32009-03-25 09:13:25 -070034/* do_async_xor - dma map the pages and perform the xor with an engine */
35static __async_inline struct dma_async_tx_descriptor *
Dan Williamsfb36ab12013-10-18 19:35:26 +020036do_async_xor(struct dma_chan *chan, struct dmaengine_unmap_data *unmap,
Dan Williamsa08abd82009-06-03 11:43:59 -070037 struct async_submit_ctl *submit)
Dan Williams9bc89cd2007-01-02 11:10:44 -070038{
Dan Williams1e55db22008-07-16 19:44:56 -070039 struct dma_device *dma = chan->device;
Dan Williams1e55db22008-07-16 19:44:56 -070040 struct dma_async_tx_descriptor *tx = NULL;
Dan Williamsa08abd82009-06-03 11:43:59 -070041 dma_async_tx_callback cb_fn_orig = submit->cb_fn;
42 void *cb_param_orig = submit->cb_param;
43 enum async_tx_flags flags_orig = submit->flags;
Dan Williams1e55db22008-07-16 19:44:56 -070044 enum dma_ctrl_flags dma_flags;
Dan Williamsfb36ab12013-10-18 19:35:26 +020045 int src_cnt = unmap->to_cnt;
46 int xor_src_cnt;
47 dma_addr_t dma_dest = unmap->addr[unmap->to_cnt];
48 dma_addr_t *src_list = unmap->addr;
Dan Williams00367312008-02-02 19:49:57 -070049
Dan Williams1e55db22008-07-16 19:44:56 -070050 while (src_cnt) {
Dan Williamsfb36ab12013-10-18 19:35:26 +020051 dma_addr_t tmp;
52
Dan Williamsa08abd82009-06-03 11:43:59 -070053 submit->flags = flags_orig;
Dan Williamsb2f46fd2009-07-14 12:20:36 -070054 xor_src_cnt = min(src_cnt, (int)dma->max_xor);
Dan Williamsfb36ab12013-10-18 19:35:26 +020055 /* if we are submitting additional xors, leave the chain open
56 * and clear the callback parameters
Dan Williams1e55db22008-07-16 19:44:56 -070057 */
Dan Williamsfb36ab12013-10-18 19:35:26 +020058 dma_flags = DMA_COMPL_SKIP_SRC_UNMAP | DMA_COMPL_SKIP_DEST_UNMAP;
Dan Williams1e55db22008-07-16 19:44:56 -070059 if (src_cnt > xor_src_cnt) {
Dan Williamsa08abd82009-06-03 11:43:59 -070060 submit->flags &= ~ASYNC_TX_ACK;
Dan Williams0403e382009-09-08 17:42:50 -070061 submit->flags |= ASYNC_TX_FENCE;
Dan Williamsa08abd82009-06-03 11:43:59 -070062 submit->cb_fn = NULL;
63 submit->cb_param = NULL;
Dan Williams1e55db22008-07-16 19:44:56 -070064 } else {
Dan Williamsa08abd82009-06-03 11:43:59 -070065 submit->cb_fn = cb_fn_orig;
66 submit->cb_param = cb_param_orig;
Dan Williams1e55db22008-07-16 19:44:56 -070067 }
Dan Williamsa08abd82009-06-03 11:43:59 -070068 if (submit->cb_fn)
Dan Williams1e55db22008-07-16 19:44:56 -070069 dma_flags |= DMA_PREP_INTERRUPT;
Dan Williams0403e382009-09-08 17:42:50 -070070 if (submit->flags & ASYNC_TX_FENCE)
71 dma_flags |= DMA_PREP_FENCE;
Dan Williamsfb36ab12013-10-18 19:35:26 +020072
73 /* Drivers force forward progress in case they can not provide a
74 * descriptor
Dan Williams1e55db22008-07-16 19:44:56 -070075 */
Dan Williamsfb36ab12013-10-18 19:35:26 +020076 tmp = src_list[0];
77 if (src_list > unmap->addr)
78 src_list[0] = dma_dest;
79 tx = dma->device_prep_dma_xor(chan, dma_dest, src_list,
80 xor_src_cnt, unmap->len,
81 dma_flags);
82 src_list[0] = tmp;
83
Dan Williams1e55db22008-07-16 19:44:56 -070084
Dan Williams669ab0b2008-07-17 17:59:55 -070085 if (unlikely(!tx))
Dan Williamsa08abd82009-06-03 11:43:59 -070086 async_tx_quiesce(&submit->depend_tx);
Dan Williams00367312008-02-02 19:49:57 -070087
Lucas De Marchi25985ed2011-03-30 22:57:33 -030088 /* spin wait for the preceding transactions to complete */
Dan Williams669ab0b2008-07-17 17:59:55 -070089 while (unlikely(!tx)) {
90 dma_async_issue_pending(chan);
Dan Williams1e55db22008-07-16 19:44:56 -070091 tx = dma->device_prep_dma_xor(chan, dma_dest,
Dan Williamsfb36ab12013-10-18 19:35:26 +020092 src_list,
93 xor_src_cnt, unmap->len,
Dan Williams1e55db22008-07-16 19:44:56 -070094 dma_flags);
Dan Williams669ab0b2008-07-17 17:59:55 -070095 }
Dan Williams9bc89cd2007-01-02 11:10:44 -070096
Dan Williamsfb36ab12013-10-18 19:35:26 +020097 dma_set_unmap(tx, unmap);
Dan Williamsa08abd82009-06-03 11:43:59 -070098 async_tx_submit(chan, tx, submit);
99 submit->depend_tx = tx;
Dan Williams1e55db22008-07-16 19:44:56 -0700100
101 if (src_cnt > xor_src_cnt) {
102 /* drop completed sources */
103 src_cnt -= xor_src_cnt;
Dan Williams1e55db22008-07-16 19:44:56 -0700104 /* use the intermediate result a source */
Dan Williams1e55db22008-07-16 19:44:56 -0700105 src_cnt++;
Dan Williamsfb36ab12013-10-18 19:35:26 +0200106 src_list += xor_src_cnt - 1;
Dan Williams1e55db22008-07-16 19:44:56 -0700107 } else
108 break;
109 }
Dan Williams00367312008-02-02 19:49:57 -0700110
111 return tx;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700112}
113
114static void
115do_sync_xor(struct page *dest, struct page **src_list, unsigned int offset,
Dan Williamsa08abd82009-06-03 11:43:59 -0700116 int src_cnt, size_t len, struct async_submit_ctl *submit)
Dan Williams9bc89cd2007-01-02 11:10:44 -0700117{
Dan Williams9bc89cd2007-01-02 11:10:44 -0700118 int i;
NeilBrownb2141e62009-10-16 16:40:34 +1100119 int xor_src_cnt = 0;
Dan Williams1e55db22008-07-16 19:44:56 -0700120 int src_off = 0;
121 void *dest_buf;
Dan Williams04ce9ab2009-06-03 14:22:28 -0700122 void **srcs;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700123
Dan Williams04ce9ab2009-06-03 14:22:28 -0700124 if (submit->scribble)
125 srcs = submit->scribble;
126 else
127 srcs = (void **) src_list;
128
129 /* convert to buffer pointers */
Dan Williams9bc89cd2007-01-02 11:10:44 -0700130 for (i = 0; i < src_cnt; i++)
NeilBrownb2141e62009-10-16 16:40:34 +1100131 if (src_list[i])
132 srcs[xor_src_cnt++] = page_address(src_list[i]) + offset;
133 src_cnt = xor_src_cnt;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700134 /* set destination address */
Dan Williams1e55db22008-07-16 19:44:56 -0700135 dest_buf = page_address(dest) + offset;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700136
Dan Williamsa08abd82009-06-03 11:43:59 -0700137 if (submit->flags & ASYNC_TX_XOR_ZERO_DST)
Dan Williams1e55db22008-07-16 19:44:56 -0700138 memset(dest_buf, 0, len);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700139
Dan Williams1e55db22008-07-16 19:44:56 -0700140 while (src_cnt > 0) {
141 /* process up to 'MAX_XOR_BLOCKS' sources */
142 xor_src_cnt = min(src_cnt, MAX_XOR_BLOCKS);
143 xor_blocks(xor_src_cnt, len, dest_buf, &srcs[src_off]);
144
145 /* drop completed sources */
146 src_cnt -= xor_src_cnt;
147 src_off += xor_src_cnt;
148 }
Dan Williams9bc89cd2007-01-02 11:10:44 -0700149
Dan Williamsa08abd82009-06-03 11:43:59 -0700150 async_tx_sync_epilog(submit);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700151}
152
153/**
154 * async_xor - attempt to xor a set of blocks with a dma engine.
Dan Williams9bc89cd2007-01-02 11:10:44 -0700155 * @dest: destination page
Dan Williamsa08abd82009-06-03 11:43:59 -0700156 * @src_list: array of source pages
157 * @offset: common src/dst offset to start transaction
Dan Williams9bc89cd2007-01-02 11:10:44 -0700158 * @src_cnt: number of source pages
159 * @len: length in bytes
Dan Williamsa08abd82009-06-03 11:43:59 -0700160 * @submit: submission / completion modifiers
161 *
162 * honored flags: ASYNC_TX_ACK, ASYNC_TX_XOR_ZERO_DST, ASYNC_TX_XOR_DROP_DST
163 *
164 * xor_blocks always uses the dest as a source so the
165 * ASYNC_TX_XOR_ZERO_DST flag must be set to not include dest data in
166 * the calculation. The assumption with dma eninges is that they only
167 * use the destination buffer as a source when it is explicity specified
168 * in the source list.
169 *
170 * src_list note: if the dest is also a source it must be at index zero.
171 * The contents of this array will be overwritten if a scribble region
172 * is not specified.
Dan Williams9bc89cd2007-01-02 11:10:44 -0700173 */
174struct dma_async_tx_descriptor *
175async_xor(struct page *dest, struct page **src_list, unsigned int offset,
Dan Williamsa08abd82009-06-03 11:43:59 -0700176 int src_cnt, size_t len, struct async_submit_ctl *submit)
Dan Williams9bc89cd2007-01-02 11:10:44 -0700177{
Dan Williamsa08abd82009-06-03 11:43:59 -0700178 struct dma_chan *chan = async_tx_find_channel(submit, DMA_XOR,
Dan Williams47437b22008-02-02 19:49:59 -0700179 &dest, 1, src_list,
180 src_cnt, len);
Dan Williamsfb36ab12013-10-18 19:35:26 +0200181 struct dma_device *device = chan ? chan->device : NULL;
182 struct dmaengine_unmap_data *unmap = NULL;
Dan Williams04ce9ab2009-06-03 14:22:28 -0700183
Dan Williams9bc89cd2007-01-02 11:10:44 -0700184 BUG_ON(src_cnt <= 1);
185
Dan Williamsfb36ab12013-10-18 19:35:26 +0200186 if (device)
187 unmap = dmaengine_get_unmap_data(device->dev, src_cnt+1, GFP_NOIO);
Dan Williams04ce9ab2009-06-03 14:22:28 -0700188
Dan Williamsfb36ab12013-10-18 19:35:26 +0200189 if (unmap && is_dma_xor_aligned(device, offset, 0, len)) {
190 struct dma_async_tx_descriptor *tx;
191 int i, j;
192
Dan Williams1e55db22008-07-16 19:44:56 -0700193 /* run the xor asynchronously */
194 pr_debug("%s (async): len: %zu\n", __func__, len);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700195
Dan Williamsfb36ab12013-10-18 19:35:26 +0200196 unmap->len = len;
197 for (i = 0, j = 0; i < src_cnt; i++) {
198 if (!src_list[i])
199 continue;
200 unmap->to_cnt++;
201 unmap->addr[j++] = dma_map_page(device->dev, src_list[i],
202 offset, len, DMA_TO_DEVICE);
203 }
204
205 /* map it bidirectional as it may be re-used as a source */
206 unmap->addr[j] = dma_map_page(device->dev, dest, offset, len,
207 DMA_BIDIRECTIONAL);
208 unmap->bidi_cnt = 1;
209
210 tx = do_async_xor(chan, unmap, submit);
211 dmaengine_unmap_put(unmap);
212 return tx;
Dan Williams1e55db22008-07-16 19:44:56 -0700213 } else {
Dan Williamsfb36ab12013-10-18 19:35:26 +0200214 dmaengine_unmap_put(unmap);
Dan Williams1e55db22008-07-16 19:44:56 -0700215 /* run the xor synchronously */
216 pr_debug("%s (sync): len: %zu\n", __func__, len);
Dan Williams04ce9ab2009-06-03 14:22:28 -0700217 WARN_ONCE(chan, "%s: no space for dma address conversion\n",
218 __func__);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700219
Dan Williams1e55db22008-07-16 19:44:56 -0700220 /* in the sync case the dest is an implied source
221 * (assumes the dest is the first source)
222 */
Dan Williamsa08abd82009-06-03 11:43:59 -0700223 if (submit->flags & ASYNC_TX_XOR_DROP_DST) {
Dan Williams1e55db22008-07-16 19:44:56 -0700224 src_cnt--;
225 src_list++;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700226 }
227
Dan Williams1e55db22008-07-16 19:44:56 -0700228 /* wait for any prerequisite operations */
Dan Williamsa08abd82009-06-03 11:43:59 -0700229 async_tx_quiesce(&submit->depend_tx);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700230
Dan Williamsa08abd82009-06-03 11:43:59 -0700231 do_sync_xor(dest, src_list, offset, src_cnt, len, submit);
Dan Williams1e55db22008-07-16 19:44:56 -0700232
233 return NULL;
234 }
Dan Williams9bc89cd2007-01-02 11:10:44 -0700235}
236EXPORT_SYMBOL_GPL(async_xor);
237
238static int page_is_zero(struct page *p, unsigned int offset, size_t len)
239{
Akinobu Mita2c88ae92012-10-28 00:49:33 +0900240 return !memchr_inv(page_address(p) + offset, 0, len);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700241}
242
Dan Williams7b3cc2b2009-11-19 17:10:37 -0700243static inline struct dma_chan *
244xor_val_chan(struct async_submit_ctl *submit, struct page *dest,
245 struct page **src_list, int src_cnt, size_t len)
246{
247 #ifdef CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA
248 return NULL;
249 #endif
250 return async_tx_find_channel(submit, DMA_XOR_VAL, &dest, 1, src_list,
251 src_cnt, len);
252}
253
Dan Williams9bc89cd2007-01-02 11:10:44 -0700254/**
Dan Williams099f53c2009-04-08 14:28:37 -0700255 * async_xor_val - attempt a xor parity check with a dma engine.
Dan Williams9bc89cd2007-01-02 11:10:44 -0700256 * @dest: destination page used if the xor is performed synchronously
Dan Williamsa08abd82009-06-03 11:43:59 -0700257 * @src_list: array of source pages
Dan Williams9bc89cd2007-01-02 11:10:44 -0700258 * @offset: offset in pages to start transaction
259 * @src_cnt: number of source pages
260 * @len: length in bytes
261 * @result: 0 if sum == 0 else non-zero
Dan Williamsa08abd82009-06-03 11:43:59 -0700262 * @submit: submission / completion modifiers
263 *
264 * honored flags: ASYNC_TX_ACK
265 *
266 * src_list note: if the dest is also a source it must be at index zero.
267 * The contents of this array will be overwritten if a scribble region
268 * is not specified.
Dan Williams9bc89cd2007-01-02 11:10:44 -0700269 */
270struct dma_async_tx_descriptor *
Dan Williamsa08abd82009-06-03 11:43:59 -0700271async_xor_val(struct page *dest, struct page **src_list, unsigned int offset,
Dan Williamsad283ea2009-08-29 19:09:26 -0700272 int src_cnt, size_t len, enum sum_check_flags *result,
Dan Williamsa08abd82009-06-03 11:43:59 -0700273 struct async_submit_ctl *submit)
Dan Williams9bc89cd2007-01-02 11:10:44 -0700274{
Dan Williams7b3cc2b2009-11-19 17:10:37 -0700275 struct dma_chan *chan = xor_val_chan(submit, dest, src_list, src_cnt, len);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700276 struct dma_device *device = chan ? chan->device : NULL;
Dan Williams00367312008-02-02 19:49:57 -0700277 struct dma_async_tx_descriptor *tx = NULL;
Dan Williams173e86b2013-10-18 19:35:27 +0200278 struct dmaengine_unmap_data *unmap = NULL;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700279
280 BUG_ON(src_cnt <= 1);
281
Dan Williams173e86b2013-10-18 19:35:27 +0200282 if (device)
283 unmap = dmaengine_get_unmap_data(device->dev, src_cnt, GFP_NOIO);
Dan Williams04ce9ab2009-06-03 14:22:28 -0700284
Dan Williams173e86b2013-10-18 19:35:27 +0200285 if (unmap && src_cnt <= device->max_xor &&
Dan Williams83544ae2009-09-08 17:42:53 -0700286 is_dma_xor_aligned(device, offset, 0, len)) {
Dan Williams173e86b2013-10-18 19:35:27 +0200287 unsigned long dma_prep_flags = DMA_COMPL_SKIP_SRC_UNMAP |
288 DMA_COMPL_SKIP_DEST_UNMAP;
Dan Williams00367312008-02-02 19:49:57 -0700289 int i;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700290
Dan Williams3280ab3e2008-03-13 17:45:28 -0700291 pr_debug("%s: (async) len: %zu\n", __func__, len);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700292
Dan Williams0403e382009-09-08 17:42:50 -0700293 if (submit->cb_fn)
294 dma_prep_flags |= DMA_PREP_INTERRUPT;
295 if (submit->flags & ASYNC_TX_FENCE)
296 dma_prep_flags |= DMA_PREP_FENCE;
Dan Williams00367312008-02-02 19:49:57 -0700297
Dan Williams173e86b2013-10-18 19:35:27 +0200298 for (i = 0; i < src_cnt; i++) {
299 unmap->addr[i] = dma_map_page(device->dev, src_list[i],
300 offset, len, DMA_TO_DEVICE);
301 unmap->to_cnt++;
302 }
303 unmap->len = len;
304
305 tx = device->device_prep_dma_xor_val(chan, unmap->addr, src_cnt,
Dan Williams099f53c2009-04-08 14:28:37 -0700306 len, result,
307 dma_prep_flags);
Dan Williams669ab0b2008-07-17 17:59:55 -0700308 if (unlikely(!tx)) {
Dan Williamsa08abd82009-06-03 11:43:59 -0700309 async_tx_quiesce(&submit->depend_tx);
Dan Williams00367312008-02-02 19:49:57 -0700310
Dan Williamse34a8ae2008-08-05 10:22:05 -0700311 while (!tx) {
Dan Williams669ab0b2008-07-17 17:59:55 -0700312 dma_async_issue_pending(chan);
Dan Williams099f53c2009-04-08 14:28:37 -0700313 tx = device->device_prep_dma_xor_val(chan,
Dan Williams173e86b2013-10-18 19:35:27 +0200314 unmap->addr, src_cnt, len, result,
Dan Williamsd4c56f92008-02-02 19:49:58 -0700315 dma_prep_flags);
Dan Williamse34a8ae2008-08-05 10:22:05 -0700316 }
Dan Williams9bc89cd2007-01-02 11:10:44 -0700317 }
Dan Williams173e86b2013-10-18 19:35:27 +0200318 dma_set_unmap(tx, unmap);
Dan Williamsa08abd82009-06-03 11:43:59 -0700319 async_tx_submit(chan, tx, submit);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700320 } else {
Dan Williamsa08abd82009-06-03 11:43:59 -0700321 enum async_tx_flags flags_orig = submit->flags;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700322
Dan Williams3280ab3e2008-03-13 17:45:28 -0700323 pr_debug("%s: (sync) len: %zu\n", __func__, len);
Dan Williams04ce9ab2009-06-03 14:22:28 -0700324 WARN_ONCE(device && src_cnt <= device->max_xor,
325 "%s: no space for dma address conversion\n",
326 __func__);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700327
Dan Williamsa08abd82009-06-03 11:43:59 -0700328 submit->flags |= ASYNC_TX_XOR_DROP_DST;
329 submit->flags &= ~ASYNC_TX_ACK;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700330
Dan Williamsa08abd82009-06-03 11:43:59 -0700331 tx = async_xor(dest, src_list, offset, src_cnt, len, submit);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700332
Dan Williamsd2c52b72008-07-17 17:59:55 -0700333 async_tx_quiesce(&tx);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700334
Dan Williamsad283ea2009-08-29 19:09:26 -0700335 *result = !page_is_zero(dest, offset, len) << SUM_CHECK_P;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700336
Dan Williamsa08abd82009-06-03 11:43:59 -0700337 async_tx_sync_epilog(submit);
338 submit->flags = flags_orig;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700339 }
Dan Williams173e86b2013-10-18 19:35:27 +0200340 dmaengine_unmap_put(unmap);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700341
342 return tx;
343}
Dan Williams099f53c2009-04-08 14:28:37 -0700344EXPORT_SYMBOL_GPL(async_xor_val);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700345
Dan Williams9bc89cd2007-01-02 11:10:44 -0700346MODULE_AUTHOR("Intel Corporation");
347MODULE_DESCRIPTION("asynchronous xor/xor-zero-sum api");
348MODULE_LICENSE("GPL");