Krzysztof Kozlowski | 3a7c01d | 2015-05-25 21:13:17 +0900 | [diff] [blame] | 1 | /* |
| 2 | * Hardkernel Odroid XU3 board device tree source |
| 3 | * |
| 4 | * Copyright (c) 2014 Collabora Ltd. |
| 5 | * Copyright (c) 2013 Samsung Electronics Co., Ltd. |
| 6 | * http://www.samsung.com |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | */ |
| 12 | |
| 13 | #include <dt-bindings/clock/samsung,s2mps11.h> |
| 14 | #include <dt-bindings/interrupt-controller/irq.h> |
| 15 | #include <dt-bindings/gpio/gpio.h> |
| 16 | #include <dt-bindings/sound/samsung-i2s.h> |
| 17 | #include "exynos5800.dtsi" |
| 18 | |
| 19 | / { |
| 20 | memory { |
| 21 | reg = <0x40000000 0x7EA00000>; |
| 22 | }; |
| 23 | |
| 24 | chosen { |
| 25 | linux,stdout-path = &serial_2; |
| 26 | }; |
| 27 | |
| 28 | firmware@02073000 { |
| 29 | compatible = "samsung,secure-firmware"; |
| 30 | reg = <0x02073000 0x1000>; |
| 31 | }; |
| 32 | |
| 33 | fixed-rate-clocks { |
| 34 | oscclk { |
| 35 | compatible = "samsung,exynos5420-oscclk"; |
| 36 | clock-frequency = <24000000>; |
| 37 | }; |
| 38 | }; |
| 39 | |
| 40 | emmc_pwrseq: pwrseq { |
| 41 | pinctrl-0 = <&emmc_nrst_pin>; |
| 42 | pinctrl-names = "default"; |
| 43 | compatible = "mmc-pwrseq-emmc"; |
| 44 | reset-gpios = <&gpd1 0 1>; |
| 45 | }; |
| 46 | |
| 47 | pwmleds { |
| 48 | compatible = "pwm-leds"; |
| 49 | |
| 50 | greenled { |
| 51 | label = "green:mmc0"; |
| 52 | pwms = <&pwm 1 2000000 0>; |
| 53 | pwm-names = "pwm1"; |
| 54 | /* |
| 55 | * Green LED is much brighter than the others |
| 56 | * so limit its max brightness |
| 57 | */ |
| 58 | max_brightness = <127>; |
| 59 | linux,default-trigger = "mmc0"; |
| 60 | }; |
| 61 | |
| 62 | blueled { |
| 63 | label = "blue:heartbeat"; |
| 64 | pwms = <&pwm 2 2000000 0>; |
| 65 | pwm-names = "pwm2"; |
| 66 | max_brightness = <255>; |
| 67 | linux,default-trigger = "heartbeat"; |
| 68 | }; |
| 69 | }; |
| 70 | |
| 71 | gpioleds { |
| 72 | compatible = "gpio-leds"; |
| 73 | redled { |
| 74 | label = "red:microSD"; |
| 75 | gpios = <&gpx2 3 GPIO_ACTIVE_HIGH>; |
| 76 | default-state = "off"; |
| 77 | linux,default-trigger = "mmc1"; |
| 78 | }; |
| 79 | }; |
| 80 | |
| 81 | sound: sound { |
| 82 | compatible = "simple-audio-card"; |
| 83 | |
| 84 | simple-audio-card,name = "Odroid-XU3"; |
| 85 | simple-audio-card,widgets = |
| 86 | "Headphone", "Headphone Jack", |
| 87 | "Speakers", "Speakers"; |
| 88 | simple-audio-card,routing = |
| 89 | "Headphone Jack", "HPL", |
| 90 | "Headphone Jack", "HPR", |
| 91 | "Headphone Jack", "MICBIAS", |
| 92 | "IN1", "Headphone Jack", |
| 93 | "Speakers", "SPKL", |
| 94 | "Speakers", "SPKR"; |
| 95 | |
| 96 | simple-audio-card,format = "i2s"; |
| 97 | simple-audio-card,bitclock-master = <&link0_codec>; |
| 98 | simple-audio-card,frame-master = <&link0_codec>; |
| 99 | |
| 100 | simple-audio-card,cpu { |
| 101 | sound-dai = <&i2s0 0>; |
| 102 | system-clock-frequency = <19200000>; |
| 103 | }; |
| 104 | |
| 105 | link0_codec: simple-audio-card,codec { |
| 106 | sound-dai = <&max98090>; |
| 107 | clocks = <&i2s0 CLK_I2S_CDCLK>; |
| 108 | }; |
| 109 | }; |
| 110 | }; |
| 111 | |
| 112 | &clock_audss { |
| 113 | assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>, |
| 114 | <&clock_audss EXYNOS_MOUT_I2S>, |
| 115 | <&clock_audss EXYNOS_DOUT_AUD_BUS>; |
| 116 | assigned-clock-parents = <&clock CLK_FIN_PLL>, |
| 117 | <&clock_audss EXYNOS_MOUT_AUDSS>; |
| 118 | assigned-clock-rates = <0>, |
| 119 | <0>, |
| 120 | <19200000>; |
| 121 | }; |
| 122 | |
| 123 | &fimd { |
| 124 | status = "okay"; |
| 125 | }; |
| 126 | |
| 127 | |
| 128 | &hdmi { |
| 129 | status = "okay"; |
| 130 | hpd-gpio = <&gpx3 7 0>; |
| 131 | pinctrl-names = "default"; |
| 132 | pinctrl-0 = <&hdmi_hpd_irq>; |
| 133 | |
| 134 | vdd_osc-supply = <&ldo7_reg>; |
| 135 | vdd_pll-supply = <&ldo6_reg>; |
| 136 | vdd-supply = <&ldo6_reg>; |
| 137 | }; |
| 138 | |
| 139 | &hsi2c_4 { |
| 140 | status = "okay"; |
| 141 | |
| 142 | s2mps11_pmic@66 { |
| 143 | compatible = "samsung,s2mps11-pmic"; |
| 144 | reg = <0x66>; |
| 145 | s2mps11,buck2-ramp-delay = <12>; |
| 146 | s2mps11,buck34-ramp-delay = <12>; |
| 147 | s2mps11,buck16-ramp-delay = <12>; |
| 148 | s2mps11,buck6-ramp-enable = <1>; |
| 149 | s2mps11,buck2-ramp-enable = <1>; |
| 150 | s2mps11,buck3-ramp-enable = <1>; |
| 151 | s2mps11,buck4-ramp-enable = <1>; |
| 152 | |
| 153 | interrupt-parent = <&gpx0>; |
| 154 | interrupts = <4 IRQ_TYPE_EDGE_FALLING>; |
| 155 | pinctrl-names = "default"; |
| 156 | pinctrl-0 = <&s2mps11_irq>; |
| 157 | |
| 158 | s2mps11_osc: clocks { |
| 159 | #clock-cells = <1>; |
| 160 | clock-output-names = "s2mps11_ap", |
| 161 | "s2mps11_cp", "s2mps11_bt"; |
| 162 | }; |
| 163 | |
| 164 | regulators { |
| 165 | ldo1_reg: LDO1 { |
| 166 | regulator-name = "vdd_ldo1"; |
| 167 | regulator-min-microvolt = <1000000>; |
| 168 | regulator-max-microvolt = <1000000>; |
| 169 | regulator-always-on; |
| 170 | }; |
| 171 | |
| 172 | ldo3_reg: LDO3 { |
| 173 | regulator-name = "vdd_ldo3"; |
| 174 | regulator-min-microvolt = <1800000>; |
| 175 | regulator-max-microvolt = <1800000>; |
| 176 | regulator-always-on; |
| 177 | }; |
| 178 | |
| 179 | ldo5_reg: LDO5 { |
| 180 | regulator-name = "vdd_ldo5"; |
| 181 | regulator-min-microvolt = <1800000>; |
| 182 | regulator-max-microvolt = <1800000>; |
| 183 | regulator-always-on; |
| 184 | }; |
| 185 | |
| 186 | ldo6_reg: LDO6 { |
| 187 | regulator-name = "vdd_ldo6"; |
| 188 | regulator-min-microvolt = <1000000>; |
| 189 | regulator-max-microvolt = <1000000>; |
| 190 | regulator-always-on; |
| 191 | }; |
| 192 | |
| 193 | ldo7_reg: LDO7 { |
| 194 | regulator-name = "vdd_ldo7"; |
| 195 | regulator-min-microvolt = <1800000>; |
| 196 | regulator-max-microvolt = <1800000>; |
| 197 | regulator-always-on; |
| 198 | }; |
| 199 | |
| 200 | ldo8_reg: LDO8 { |
| 201 | regulator-name = "vdd_ldo8"; |
| 202 | regulator-min-microvolt = <1800000>; |
| 203 | regulator-max-microvolt = <1800000>; |
| 204 | regulator-always-on; |
| 205 | }; |
| 206 | |
| 207 | ldo9_reg: LDO9 { |
| 208 | regulator-name = "vdd_ldo9"; |
| 209 | regulator-min-microvolt = <3000000>; |
| 210 | regulator-max-microvolt = <3000000>; |
| 211 | regulator-always-on; |
| 212 | }; |
| 213 | |
| 214 | ldo10_reg: LDO10 { |
| 215 | regulator-name = "vdd_ldo10"; |
| 216 | regulator-min-microvolt = <1800000>; |
| 217 | regulator-max-microvolt = <1800000>; |
| 218 | regulator-always-on; |
| 219 | }; |
| 220 | |
| 221 | ldo11_reg: LDO11 { |
| 222 | regulator-name = "vdd_ldo11"; |
| 223 | regulator-min-microvolt = <1000000>; |
| 224 | regulator-max-microvolt = <1000000>; |
| 225 | regulator-always-on; |
| 226 | }; |
| 227 | |
| 228 | ldo12_reg: LDO12 { |
| 229 | regulator-name = "vdd_ldo12"; |
| 230 | regulator-min-microvolt = <1800000>; |
| 231 | regulator-max-microvolt = <1800000>; |
| 232 | regulator-always-on; |
| 233 | }; |
| 234 | |
| 235 | ldo13_reg: LDO13 { |
| 236 | regulator-name = "vdd_ldo13"; |
| 237 | regulator-min-microvolt = <2800000>; |
| 238 | regulator-max-microvolt = <2800000>; |
| 239 | regulator-always-on; |
| 240 | }; |
| 241 | |
| 242 | ldo15_reg: LDO15 { |
| 243 | regulator-name = "vdd_ldo15"; |
| 244 | regulator-min-microvolt = <3100000>; |
| 245 | regulator-max-microvolt = <3100000>; |
| 246 | regulator-always-on; |
| 247 | }; |
| 248 | |
| 249 | ldo16_reg: LDO16 { |
| 250 | regulator-name = "vdd_ldo16"; |
| 251 | regulator-min-microvolt = <2200000>; |
| 252 | regulator-max-microvolt = <2200000>; |
| 253 | regulator-always-on; |
| 254 | }; |
| 255 | |
| 256 | ldo17_reg: LDO17 { |
| 257 | regulator-name = "tsp_avdd"; |
| 258 | regulator-min-microvolt = <3300000>; |
| 259 | regulator-max-microvolt = <3300000>; |
| 260 | regulator-always-on; |
| 261 | }; |
| 262 | |
| 263 | ldo19_reg: LDO19 { |
| 264 | regulator-name = "vdd_sd"; |
| 265 | regulator-min-microvolt = <2800000>; |
| 266 | regulator-max-microvolt = <2800000>; |
| 267 | regulator-always-on; |
| 268 | }; |
| 269 | |
| 270 | ldo24_reg: LDO24 { |
| 271 | regulator-name = "tsp_io"; |
| 272 | regulator-min-microvolt = <2800000>; |
| 273 | regulator-max-microvolt = <2800000>; |
| 274 | regulator-always-on; |
| 275 | }; |
| 276 | |
| 277 | ldo26_reg: LDO26 { |
| 278 | regulator-name = "vdd_ldo26"; |
| 279 | regulator-min-microvolt = <3000000>; |
| 280 | regulator-max-microvolt = <3000000>; |
| 281 | regulator-always-on; |
| 282 | }; |
| 283 | |
| 284 | buck1_reg: BUCK1 { |
| 285 | regulator-name = "vdd_mif"; |
| 286 | regulator-min-microvolt = <800000>; |
| 287 | regulator-max-microvolt = <1300000>; |
| 288 | regulator-always-on; |
| 289 | regulator-boot-on; |
| 290 | }; |
| 291 | |
| 292 | buck2_reg: BUCK2 { |
| 293 | regulator-name = "vdd_arm"; |
| 294 | regulator-min-microvolt = <800000>; |
| 295 | regulator-max-microvolt = <1500000>; |
| 296 | regulator-always-on; |
| 297 | regulator-boot-on; |
| 298 | }; |
| 299 | |
| 300 | buck3_reg: BUCK3 { |
| 301 | regulator-name = "vdd_int"; |
| 302 | regulator-min-microvolt = <800000>; |
| 303 | regulator-max-microvolt = <1400000>; |
| 304 | regulator-always-on; |
| 305 | regulator-boot-on; |
| 306 | }; |
| 307 | |
| 308 | buck4_reg: BUCK4 { |
| 309 | regulator-name = "vdd_g3d"; |
| 310 | regulator-min-microvolt = <800000>; |
| 311 | regulator-max-microvolt = <1400000>; |
| 312 | regulator-always-on; |
| 313 | regulator-boot-on; |
| 314 | }; |
| 315 | |
| 316 | buck5_reg: BUCK5 { |
| 317 | regulator-name = "vdd_mem"; |
| 318 | regulator-min-microvolt = <800000>; |
| 319 | regulator-max-microvolt = <1400000>; |
| 320 | regulator-always-on; |
| 321 | regulator-boot-on; |
| 322 | }; |
| 323 | |
| 324 | buck6_reg: BUCK6 { |
| 325 | regulator-name = "vdd_kfc"; |
| 326 | regulator-min-microvolt = <800000>; |
| 327 | regulator-max-microvolt = <1500000>; |
| 328 | regulator-always-on; |
| 329 | regulator-boot-on; |
| 330 | }; |
| 331 | |
| 332 | buck7_reg: BUCK7 { |
| 333 | regulator-name = "vdd_1.0v_ldo"; |
| 334 | regulator-min-microvolt = <800000>; |
| 335 | regulator-max-microvolt = <1500000>; |
| 336 | regulator-always-on; |
| 337 | regulator-boot-on; |
| 338 | }; |
| 339 | |
| 340 | buck8_reg: BUCK8 { |
| 341 | regulator-name = "vdd_1.8v_ldo"; |
| 342 | regulator-min-microvolt = <800000>; |
| 343 | regulator-max-microvolt = <1500000>; |
| 344 | regulator-always-on; |
| 345 | regulator-boot-on; |
| 346 | }; |
| 347 | |
| 348 | buck9_reg: BUCK9 { |
| 349 | regulator-name = "vdd_2.8v_ldo"; |
| 350 | regulator-min-microvolt = <3000000>; |
| 351 | regulator-max-microvolt = <3750000>; |
| 352 | regulator-always-on; |
| 353 | regulator-boot-on; |
| 354 | }; |
| 355 | |
| 356 | buck10_reg: BUCK10 { |
| 357 | regulator-name = "vdd_vmem"; |
| 358 | regulator-min-microvolt = <2850000>; |
| 359 | regulator-max-microvolt = <2850000>; |
| 360 | regulator-always-on; |
| 361 | regulator-boot-on; |
| 362 | }; |
| 363 | }; |
| 364 | }; |
| 365 | }; |
| 366 | |
| 367 | &hsi2c_5 { |
| 368 | status = "okay"; |
| 369 | max98090: max98090@10 { |
| 370 | compatible = "maxim,max98090"; |
| 371 | reg = <0x10>; |
| 372 | interrupt-parent = <&gpx3>; |
| 373 | interrupts = <2 0>; |
| 374 | clocks = <&i2s0 CLK_I2S_CDCLK>; |
| 375 | clock-names = "mclk"; |
| 376 | #sound-dai-cells = <0>; |
| 377 | }; |
| 378 | }; |
| 379 | |
| 380 | &i2c_2 { |
| 381 | samsung,i2c-sda-delay = <100>; |
| 382 | samsung,i2c-max-bus-freq = <66000>; |
| 383 | status = "okay"; |
| 384 | |
| 385 | hdmiddc@50 { |
| 386 | compatible = "samsung,exynos4210-hdmiddc"; |
| 387 | reg = <0x50>; |
| 388 | }; |
| 389 | }; |
| 390 | |
| 391 | &i2s0 { |
| 392 | status = "okay"; |
| 393 | }; |
| 394 | |
| 395 | &mfc { |
| 396 | samsung,mfc-r = <0x43000000 0x800000>; |
| 397 | samsung,mfc-l = <0x51000000 0x800000>; |
| 398 | }; |
| 399 | |
| 400 | &mmc_0 { |
| 401 | status = "okay"; |
| 402 | mmc-pwrseq = <&emmc_pwrseq>; |
| 403 | cd-gpios = <&gpc0 2 GPIO_ACTIVE_LOW>; |
| 404 | card-detect-delay = <200>; |
| 405 | samsung,dw-mshc-ciu-div = <3>; |
| 406 | samsung,dw-mshc-sdr-timing = <0 4>; |
| 407 | samsung,dw-mshc-ddr-timing = <0 2>; |
| 408 | samsung,dw-mshc-hs400-timing = <0 2>; |
| 409 | samsung,read-strobe-delay = <90>; |
| 410 | pinctrl-names = "default"; |
| 411 | pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8 &sd0_cd &sd0_rclk>; |
| 412 | bus-width = <8>; |
| 413 | cap-mmc-highspeed; |
| 414 | mmc-hs200-1_8v; |
| 415 | mmc-hs400-1_8v; |
| 416 | }; |
| 417 | |
| 418 | &mmc_2 { |
| 419 | status = "okay"; |
| 420 | card-detect-delay = <200>; |
| 421 | samsung,dw-mshc-ciu-div = <3>; |
| 422 | samsung,dw-mshc-sdr-timing = <0 4>; |
| 423 | samsung,dw-mshc-ddr-timing = <0 2>; |
| 424 | pinctrl-names = "default"; |
| 425 | pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>; |
| 426 | bus-width = <4>; |
| 427 | cap-sd-highspeed; |
| 428 | }; |
| 429 | |
| 430 | &pinctrl_0 { |
| 431 | hdmi_hpd_irq: hdmi-hpd-irq { |
| 432 | samsung,pins = "gpx3-7"; |
| 433 | samsung,pin-function = <0>; |
| 434 | samsung,pin-pud = <1>; |
| 435 | samsung,pin-drv = <0>; |
| 436 | }; |
| 437 | |
| 438 | s2mps11_irq: s2mps11-irq { |
| 439 | samsung,pins = "gpx0-4"; |
| 440 | samsung,pin-function = <0xf>; |
| 441 | samsung,pin-pud = <0>; |
| 442 | samsung,pin-drv = <0>; |
| 443 | }; |
| 444 | }; |
| 445 | |
| 446 | &pinctrl_1 { |
| 447 | emmc_nrst_pin: emmc-nrst { |
| 448 | samsung,pins = "gpd1-0"; |
| 449 | samsung,pin-function = <0>; |
| 450 | samsung,pin-pud = <0>; |
| 451 | samsung,pin-drv = <0>; |
| 452 | }; |
| 453 | }; |
| 454 | |
| 455 | &pwm { |
| 456 | /* |
| 457 | * PWM 0 -- fan |
| 458 | * PWM 1 -- Green LED |
| 459 | * PWM 2 -- Blue LED |
| 460 | * PWM 3 -- on MIPI connector for backlight |
| 461 | */ |
| 462 | pinctrl-0 = <&pwm0_out &pwm1_out &pwm2_out &pwm3_out>; |
| 463 | pinctrl-names = "default"; |
| 464 | status = "okay"; |
| 465 | }; |
| 466 | |
| 467 | &rtc { |
| 468 | status = "okay"; |
| 469 | clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>; |
| 470 | clock-names = "rtc", "rtc_src"; |
| 471 | }; |
| 472 | |
| 473 | &usbdrd_dwc3_0 { |
| 474 | dr_mode = "host"; |
| 475 | }; |
| 476 | |
| 477 | &usbdrd_dwc3_1 { |
| 478 | dr_mode = "otg"; |
| 479 | }; |