blob: baa71e1febb8226eeb90cc261ea5e45ccd364bfd [file] [log] [blame]
Masahiro Yamada8e678e02015-05-08 13:07:13 +09001/*
2 * Device Tree Source for UniPhier PH1-sLD8 SoC
3 *
4 * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This file is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
15 *
16 * This file is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * Or, alternatively,
22 *
23 * b) Permission is hereby granted, free of charge, to any person
24 * obtaining a copy of this software and associated documentation
25 * files (the "Software"), to deal in the Software without
26 * restriction, including without limitation the rights to use,
27 * copy, modify, merge, publish, distribute, sublicense, and/or
28 * sell copies of the Software, and to permit persons to whom the
29 * Software is furnished to do so, subject to the following
30 * conditions:
31 *
32 * The above copyright notice and this permission notice shall be
33 * included in all copies or substantial portions of the Software.
34 *
35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
40 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42 * OTHER DEALINGS IN THE SOFTWARE.
43 */
44
45/include/ "skeleton.dtsi"
46
47/ {
48 compatible = "socionext,ph1-sld8";
49
50 cpus {
51 #address-cells = <1>;
52 #size-cells = <0>;
53
54 cpu@0 {
55 device_type = "cpu";
56 compatible = "arm,cortex-a9";
57 reg = <0>;
58 };
59 };
60
61 clocks {
62 arm_timer_clk: arm_timer_clk {
63 #clock-cells = <0>;
64 compatible = "fixed-clock";
65 clock-frequency = <50000000>;
66 };
67 };
68
69 soc {
70 compatible = "simple-bus";
71 #address-cells = <1>;
72 #size-cells = <1>;
73 ranges;
74 interrupt-parent = <&intc>;
75
76 extbus: extbus {
77 compatible = "simple-bus";
78 #address-cells = <2>;
79 #size-cells = <1>;
80 };
81
82 system-bus-controller-misc@59800000 {
83 compatible = "socionext,uniphier-system-bus-controller-misc",
84 "syscon";
85 reg = <0x59800000 0x2000>;
86 };
87
88 timer@60000200 {
89 compatible = "arm,cortex-a9-global-timer";
90 reg = <0x60000200 0x20>;
91 interrupts = <1 11 0x104>;
92 clocks = <&arm_timer_clk>;
93 };
94
95 timer@60000600 {
96 compatible = "arm,cortex-a9-twd-timer";
97 reg = <0x60000600 0x20>;
98 interrupts = <1 13 0x104>;
99 clocks = <&arm_timer_clk>;
100 };
101
102 intc: interrupt-controller@60001000 {
103 compatible = "arm,cortex-a9-gic";
104 #interrupt-cells = <3>;
105 interrupt-controller;
106 reg = <0x60001000 0x1000>,
107 <0x60000100 0x100>;
108 };
109 };
110};