| eric miao | 2c8086a | 2007-09-11 19:13:17 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/include/asm-arm/arch-pxa/pxa3xx-regs.h |
| 3 | * |
| 4 | * PXA3xx specific register definitions |
| 5 | * |
| 6 | * Copyright (C) 2007 Marvell International Ltd. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | */ |
| 12 | |
| 13 | #ifndef __ASM_ARCH_PXA3XX_REGS_H |
| 14 | #define __ASM_ARCH_PXA3XX_REGS_H |
| 15 | |
| 16 | /* |
| 17 | * Application Subsystem Clock |
| 18 | */ |
| 19 | #define ACCR __REG(0x41340000) /* Application Subsystem Clock Configuration Register */ |
| 20 | #define ACSR __REG(0x41340004) /* Application Subsystem Clock Status Register */ |
| 21 | #define AICSR __REG(0x41340008) /* Application Subsystem Interrupt Control/Status Register */ |
| 22 | #define CKENA __REG(0x4134000C) /* A Clock Enable Register */ |
| 23 | #define CKENB __REG(0x41340010) /* B Clock Enable Register */ |
| 24 | #define AC97_DIV __REG(0x41340014) /* AC97 clock divisor value register */ |
| 25 | |
| 26 | /* |
| 27 | * Clock Enable Bit |
| 28 | */ |
| 29 | #define CKEN_LCD 1 /* < LCD Clock Enable */ |
| 30 | #define CKEN_USBH 2 /* < USB host clock enable */ |
| 31 | #define CKEN_CAMERA 3 /* < Camera interface clock enable */ |
| 32 | #define CKEN_NAND 4 /* < NAND Flash Controller Clock Enable */ |
| 33 | #define CKEN_USB2 6 /* < USB 2.0 client clock enable. */ |
| 34 | #define CKEN_DMC 8 /* < Dynamic Memory Controller clock enable */ |
| 35 | #define CKEN_SMC 9 /* < Static Memory Controller clock enable */ |
| 36 | #define CKEN_ISC 10 /* < Internal SRAM Controller clock enable */ |
| 37 | #define CKEN_BOOT 11 /* < Boot rom clock enable */ |
| 38 | #define CKEN_MMC1 12 /* < MMC1 Clock enable */ |
| 39 | #define CKEN_MMC2 13 /* < MMC2 clock enable */ |
| 40 | #define CKEN_KEYPAD 14 /* < Keypand Controller Clock Enable */ |
| 41 | #define CKEN_CIR 15 /* < Consumer IR Clock Enable */ |
| 42 | #define CKEN_USIM0 17 /* < USIM[0] Clock Enable */ |
| 43 | #define CKEN_USIM1 18 /* < USIM[1] Clock Enable */ |
| 44 | #define CKEN_TPM 19 /* < TPM clock enable */ |
| 45 | #define CKEN_UDC 20 /* < UDC clock enable */ |
| 46 | #define CKEN_BTUART 21 /* < BTUART clock enable */ |
| 47 | #define CKEN_FFUART 22 /* < FFUART clock enable */ |
| 48 | #define CKEN_STUART 23 /* < STUART clock enable */ |
| 49 | #define CKEN_AC97 24 /* < AC97 clock enable */ |
| 50 | #define CKEN_TOUCH 25 /* < Touch screen Interface Clock Enable */ |
| 51 | #define CKEN_SSP1 26 /* < SSP1 clock enable */ |
| 52 | #define CKEN_SSP2 27 /* < SSP2 clock enable */ |
| 53 | #define CKEN_SSP3 28 /* < SSP3 clock enable */ |
| 54 | #define CKEN_SSP4 29 /* < SSP4 clock enable */ |
| 55 | #define CKEN_MSL0 30 /* < MSL0 clock enable */ |
| 56 | #define CKEN_PWM0 32 /* < PWM[0] clock enable */ |
| 57 | #define CKEN_PWM1 33 /* < PWM[1] clock enable */ |
| 58 | #define CKEN_I2C 36 /* < I2C clock enable */ |
| 59 | #define CKEN_INTC 38 /* < Interrupt controller clock enable */ |
| 60 | #define CKEN_GPIO 39 /* < GPIO clock enable */ |
| 61 | #define CKEN_1WIRE 40 /* < 1-wire clock enable */ |
| 62 | #define CKEN_HSIO2 41 /* < HSIO2 clock enable */ |
| 63 | #define CKEN_MINI_IM 48 /* < Mini-IM */ |
| 64 | #define CKEN_MINI_LCD 49 /* < Mini LCD */ |
| 65 | |
| 66 | #if defined(CONFIG_CPU_PXA310) |
| 67 | #define CKEN_MMC3 5 /* < MMC3 Clock Enable */ |
| 68 | #define CKEN_MVED 43 /* < MVED clock enable */ |
| 69 | #endif |
| 70 | |
| 71 | /* Note: GCU clock enable bit differs on PXA300/PXA310 and PXA320 */ |
| 72 | #define PXA300_CKEN_GRAPHICS 42 /* Graphics controller clock enable */ |
| 73 | #define PXA320_CKEN_GRAPHICS 7 /* Graphics controller clock enable */ |
| 74 | |
| 75 | #endif /* __ASM_ARCH_PXA3XX_REGS_H */ |