blob: 3819c1e915915b2ad79395ce97323fbaa52ae439 [file] [log] [blame]
Nishanth Menon1e633d72013-03-19 12:53:03 -05001/*
2 * Device Tree Source for OMAP34xx/OMAP35xx SoC
3 *
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
Florian Vaussard98ef79572013-05-31 14:32:55 +020011#include "omap3.dtsi"
Nishanth Menon1e633d72013-03-19 12:53:03 -050012
13/ {
14 cpus {
15 cpu@0 {
16 /* OMAP343x/OMAP35xx variants OPP1-5 */
17 operating-points = <
18 /* kHz uV */
19 125000 975000
20 250000 1075000
21 500000 1200000
22 550000 1270000
23 600000 1350000
24 >;
25 clock-latency = <300000>; /* From legacy driver */
26 };
27 };
Laurent Pinchart3d495382014-01-07 14:01:39 -080028
29 ocp {
30 omap3_pmx_core2: pinmux@480025d8 {
31 compatible = "ti,omap3-padconf", "pinctrl-single";
32 reg = <0x480025d8 0x24>;
33 #address-cells = <1>;
34 #size-cells = <0>;
35 #interrupt-cells = <1>;
36 interrupt-controller;
37 pinctrl-single,register-width = <16>;
38 pinctrl-single,function-mask = <0xff1f>;
39 };
40 };
Nishanth Menon1e633d72013-03-19 12:53:03 -050041};
Tero Kristo657fc112013-07-22 12:29:29 +030042
Sebastian Reichel782e25a2014-05-10 18:37:49 +020043&ssi {
44 status = "ok";
45
46 clocks = <&ssi_ssr_fck>,
47 <&ssi_sst_fck>,
48 <&ssi_ick>;
49 clock-names = "ssi_ssr_fck",
50 "ssi_sst_fck",
51 "ssi_ick";
52};
53
Tero Kristo657fc112013-07-22 12:29:29 +030054/include/ "omap34xx-omap36xx-clocks.dtsi"
55/include/ "omap36xx-omap3430es2plus-clocks.dtsi"
Linus Torvaldsd30492a2014-01-28 18:44:53 -080056/include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi"