blob: 8503b2ea570a0616234e409c524593f37a98648e [file] [log] [blame]
Ben Skeggs94580292012-07-06 12:14:00 +10001/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
Ben Skeggs77145f12012-07-31 16:16:21 +100025#include <linux/console.h>
Ben Skeggs94580292012-07-06 12:14:00 +100026#include <linux/module.h>
27#include <linux/pci.h>
28
29#include <core/device.h>
30#include <core/client.h>
Ben Skeggsebb945a2012-07-20 08:17:34 +100031#include <core/gpuobj.h>
Ben Skeggs94580292012-07-06 12:14:00 +100032#include <core/class.h>
33
34#include <subdev/device.h>
Ben Skeggsebb945a2012-07-20 08:17:34 +100035#include <subdev/vm.h>
Ben Skeggs94580292012-07-06 12:14:00 +100036
37#include "nouveau_drm.h"
Ben Skeggs77145f12012-07-31 16:16:21 +100038#include "nouveau_irq.h"
Ben Skeggsebb945a2012-07-20 08:17:34 +100039#include "nouveau_dma.h"
Ben Skeggs77145f12012-07-31 16:16:21 +100040#include "nouveau_ttm.h"
41#include "nouveau_gem.h"
Ben Skeggscb75d972012-07-11 10:44:20 +100042#include "nouveau_agp.h"
Ben Skeggs77145f12012-07-31 16:16:21 +100043#include "nouveau_vga.h"
44#include "nouveau_pm.h"
45#include "nouveau_acpi.h"
46#include "nouveau_bios.h"
47#include "nouveau_ioctl.h"
Ben Skeggsebb945a2012-07-20 08:17:34 +100048#include "nouveau_abi16.h"
49#include "nouveau_fbcon.h"
50#include "nouveau_fence.h"
51
52#include "nouveau_ttm.h"
Ben Skeggs94580292012-07-06 12:14:00 +100053
Ben Skeggs94580292012-07-06 12:14:00 +100054MODULE_PARM_DESC(config, "option string to pass to driver core");
55static char *nouveau_config;
56module_param_named(config, nouveau_config, charp, 0400);
57
58MODULE_PARM_DESC(debug, "debug string to pass to driver core");
59static char *nouveau_debug;
60module_param_named(debug, nouveau_debug, charp, 0400);
61
Ben Skeggsebb945a2012-07-20 08:17:34 +100062MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
63static int nouveau_noaccel = 0;
64module_param_named(noaccel, nouveau_noaccel, int, 0400);
65
Ben Skeggs94307382012-10-31 12:11:15 +100066MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
67 "0 = disabled, 1 = enabled, 2 = headless)");
68int nouveau_modeset = -1;
Ben Skeggs77145f12012-07-31 16:16:21 +100069module_param_named(modeset, nouveau_modeset, int, 0400);
70
71static struct drm_driver driver;
72
Ben Skeggs94580292012-07-06 12:14:00 +100073static u64
74nouveau_name(struct pci_dev *pdev)
75{
76 u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
77 name |= pdev->bus->number << 16;
78 name |= PCI_SLOT(pdev->devfn) << 8;
79 return name | PCI_FUNC(pdev->devfn);
80}
81
82static int
Ben Skeggsfa6df8c2012-09-12 13:09:23 +100083nouveau_cli_create(struct pci_dev *pdev, const char *name,
84 int size, void **pcli)
Ben Skeggs94580292012-07-06 12:14:00 +100085{
86 struct nouveau_cli *cli;
87 int ret;
88
89 ret = nouveau_client_create_(name, nouveau_name(pdev), nouveau_config,
90 nouveau_debug, size, pcli);
91 cli = *pcli;
92 if (ret)
93 return ret;
94
95 mutex_init(&cli->mutex);
96 return 0;
97}
98
99static void
100nouveau_cli_destroy(struct nouveau_cli *cli)
101{
102 struct nouveau_object *client = nv_object(cli);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000103 nouveau_vm_ref(NULL, &cli->base.vm, NULL);
Ben Skeggs94580292012-07-06 12:14:00 +1000104 nouveau_client_fini(&cli->base, false);
105 atomic_set(&client->refcount, 1);
106 nouveau_object_ref(NULL, &client);
107}
108
Ben Skeggsebb945a2012-07-20 08:17:34 +1000109static void
110nouveau_accel_fini(struct nouveau_drm *drm)
111{
112 nouveau_gpuobj_ref(NULL, &drm->notify);
113 nouveau_channel_del(&drm->channel);
Ben Skeggs49981042012-08-06 19:38:25 +1000114 nouveau_channel_del(&drm->cechan);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000115 if (drm->fence)
116 nouveau_fence(drm)->dtor(drm);
117}
118
119static void
120nouveau_accel_init(struct nouveau_drm *drm)
121{
122 struct nouveau_device *device = nv_device(drm->device);
123 struct nouveau_object *object;
Ben Skeggs49981042012-08-06 19:38:25 +1000124 u32 arg0, arg1;
Ben Skeggsebb945a2012-07-20 08:17:34 +1000125 int ret;
126
127 if (nouveau_noaccel)
128 return;
129
130 /* initialise synchronisation routines */
131 if (device->card_type < NV_10) ret = nv04_fence_create(drm);
Maarten Lankhorstace5a9b2012-11-21 13:21:12 +0100132 else if (device->card_type < NV_50) ret = nv10_fence_create(drm);
133 else if (device->chipset < 0x84) ret = nv50_fence_create(drm);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000134 else if (device->card_type < NV_C0) ret = nv84_fence_create(drm);
135 else ret = nvc0_fence_create(drm);
136 if (ret) {
137 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
138 nouveau_accel_fini(drm);
139 return;
140 }
141
Ben Skeggs49981042012-08-06 19:38:25 +1000142 if (device->card_type >= NV_E0) {
143 ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE,
144 NVDRM_CHAN + 1,
145 NVE0_CHANNEL_IND_ENGINE_CE0 |
146 NVE0_CHANNEL_IND_ENGINE_CE1, 0,
147 &drm->cechan);
148 if (ret)
149 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
150
151 arg0 = NVE0_CHANNEL_IND_ENGINE_GR;
152 arg1 = 0;
153 } else {
154 arg0 = NvDmaFB;
155 arg1 = NvDmaTT;
156 }
157
Ben Skeggsebb945a2012-07-20 08:17:34 +1000158 ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE, NVDRM_CHAN,
Ben Skeggs49981042012-08-06 19:38:25 +1000159 arg0, arg1, &drm->channel);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000160 if (ret) {
161 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
162 nouveau_accel_fini(drm);
163 return;
164 }
165
166 if (device->card_type < NV_C0) {
167 ret = nouveau_gpuobj_new(drm->device, NULL, 32, 0, 0,
168 &drm->notify);
169 if (ret) {
170 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
171 nouveau_accel_fini(drm);
172 return;
173 }
174
175 ret = nouveau_object_new(nv_object(drm),
176 drm->channel->handle, NvNotify0,
177 0x003d, &(struct nv_dma_class) {
178 .flags = NV_DMA_TARGET_VRAM |
179 NV_DMA_ACCESS_RDWR,
180 .start = drm->notify->addr,
181 .limit = drm->notify->addr + 31
182 }, sizeof(struct nv_dma_class),
183 &object);
184 if (ret) {
185 nouveau_accel_fini(drm);
186 return;
187 }
188 }
189
190
Ben Skeggs49981042012-08-06 19:38:25 +1000191 nouveau_bo_move_init(drm);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000192}
193
Ben Skeggs94580292012-07-06 12:14:00 +1000194static int __devinit
195nouveau_drm_probe(struct pci_dev *pdev, const struct pci_device_id *pent)
196{
197 struct nouveau_device *device;
Ben Skeggsebb945a2012-07-20 08:17:34 +1000198 struct apertures_struct *aper;
199 bool boot = false;
Ben Skeggs94580292012-07-06 12:14:00 +1000200 int ret;
201
Ben Skeggsebb945a2012-07-20 08:17:34 +1000202 /* remove conflicting drivers (vesafb, efifb etc) */
203 aper = alloc_apertures(3);
204 if (!aper)
205 return -ENOMEM;
206
207 aper->ranges[0].base = pci_resource_start(pdev, 1);
208 aper->ranges[0].size = pci_resource_len(pdev, 1);
209 aper->count = 1;
210
211 if (pci_resource_len(pdev, 2)) {
212 aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
213 aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
214 aper->count++;
215 }
216
217 if (pci_resource_len(pdev, 3)) {
218 aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
219 aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
220 aper->count++;
221 }
222
223#ifdef CONFIG_X86
224 boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
225#endif
226 remove_conflicting_framebuffers(aper, "nouveaufb", boot);
227
Ben Skeggs94580292012-07-06 12:14:00 +1000228 ret = nouveau_device_create(pdev, nouveau_name(pdev), pci_name(pdev),
229 nouveau_config, nouveau_debug, &device);
230 if (ret)
231 return ret;
232
233 pci_set_master(pdev);
234
Ben Skeggs77145f12012-07-31 16:16:21 +1000235 ret = drm_get_pci_dev(pdev, pent, &driver);
Ben Skeggs94580292012-07-06 12:14:00 +1000236 if (ret) {
Ben Skeggsebb945a2012-07-20 08:17:34 +1000237 nouveau_object_ref(NULL, (struct nouveau_object **)&device);
Ben Skeggs94580292012-07-06 12:14:00 +1000238 return ret;
239 }
240
241 return 0;
242}
243
Marcin Slusarz5b8a43a2012-08-19 23:00:00 +0200244static int
Ben Skeggs94580292012-07-06 12:14:00 +1000245nouveau_drm_load(struct drm_device *dev, unsigned long flags)
246{
247 struct pci_dev *pdev = dev->pdev;
Ben Skeggsebb945a2012-07-20 08:17:34 +1000248 struct nouveau_device *device;
Ben Skeggs94580292012-07-06 12:14:00 +1000249 struct nouveau_drm *drm;
250 int ret;
251
Ben Skeggsfa6df8c2012-09-12 13:09:23 +1000252 ret = nouveau_cli_create(pdev, "DRM", sizeof(*drm), (void**)&drm);
Ben Skeggs94580292012-07-06 12:14:00 +1000253 if (ret)
254 return ret;
255
Ben Skeggs77145f12012-07-31 16:16:21 +1000256 dev->dev_private = drm;
257 drm->dev = dev;
258
Ben Skeggs94580292012-07-06 12:14:00 +1000259 INIT_LIST_HEAD(&drm->clients);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000260 spin_lock_init(&drm->tile.lock);
Ben Skeggs94580292012-07-06 12:14:00 +1000261
Ben Skeggscb75d972012-07-11 10:44:20 +1000262 /* make sure AGP controller is in a consistent state before we
263 * (possibly) execute vbios init tables (see nouveau_agp.h)
264 */
265 if (drm_pci_device_is_agp(dev) && dev->agp) {
266 /* dummy device object, doesn't init anything, but allows
267 * agp code access to registers
268 */
269 ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT,
270 NVDRM_DEVICE, 0x0080,
271 &(struct nv_device_class) {
272 .device = ~0,
273 .disable =
274 ~(NV_DEVICE_DISABLE_MMIO |
275 NV_DEVICE_DISABLE_IDENTIFY),
276 .debug0 = ~0,
277 }, sizeof(struct nv_device_class),
278 &drm->device);
279 if (ret)
Ben Skeggsebb945a2012-07-20 08:17:34 +1000280 goto fail_device;
Ben Skeggscb75d972012-07-11 10:44:20 +1000281
282 nouveau_agp_reset(drm);
283 nouveau_object_del(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE);
284 }
285
Ben Skeggs94580292012-07-06 12:14:00 +1000286 ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE,
287 0x0080, &(struct nv_device_class) {
288 .device = ~0,
289 .disable = 0,
290 .debug0 = 0,
291 }, sizeof(struct nv_device_class),
292 &drm->device);
293 if (ret)
294 goto fail_device;
295
Ben Skeggs77145f12012-07-31 16:16:21 +1000296 /* workaround an odd issue on nvc1 by disabling the device's
297 * nosnoop capability. hopefully won't cause issues until a
298 * better fix is found - assuming there is one...
299 */
Ben Skeggsebb945a2012-07-20 08:17:34 +1000300 device = nv_device(drm->device);
Ben Skeggs77145f12012-07-31 16:16:21 +1000301 if (nv_device(drm->device)->chipset == 0xc1)
302 nv_mask(device, 0x00088080, 0x00000800, 0x00000000);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000303
Ben Skeggs77145f12012-07-31 16:16:21 +1000304 nouveau_vga_init(drm);
Ben Skeggscb75d972012-07-11 10:44:20 +1000305 nouveau_agp_init(drm);
306
Ben Skeggsebb945a2012-07-20 08:17:34 +1000307 if (device->card_type >= NV_50) {
308 ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
309 0x1000, &drm->client.base.vm);
310 if (ret)
311 goto fail_device;
312 }
313
314 ret = nouveau_ttm_init(drm);
Ben Skeggs94580292012-07-06 12:14:00 +1000315 if (ret)
Ben Skeggs77145f12012-07-31 16:16:21 +1000316 goto fail_ttm;
Ben Skeggs94580292012-07-06 12:14:00 +1000317
Ben Skeggs77145f12012-07-31 16:16:21 +1000318 ret = nouveau_bios_init(dev);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000319 if (ret)
Ben Skeggs77145f12012-07-31 16:16:21 +1000320 goto fail_bios;
321
322 ret = nouveau_irq_init(dev);
323 if (ret)
324 goto fail_irq;
325
326 ret = nouveau_display_create(dev);
327 if (ret)
328 goto fail_dispctor;
329
330 if (dev->mode_config.num_crtc) {
331 ret = nouveau_display_init(dev);
332 if (ret)
333 goto fail_dispinit;
334 }
335
336 nouveau_pm_init(dev);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000337
338 nouveau_accel_init(drm);
339 nouveau_fbcon_init(dev);
Ben Skeggs94580292012-07-06 12:14:00 +1000340 return 0;
341
Ben Skeggs77145f12012-07-31 16:16:21 +1000342fail_dispinit:
343 nouveau_display_destroy(dev);
344fail_dispctor:
345 nouveau_irq_fini(dev);
346fail_irq:
347 nouveau_bios_takedown(dev);
348fail_bios:
Ben Skeggsebb945a2012-07-20 08:17:34 +1000349 nouveau_ttm_fini(drm);
Ben Skeggs77145f12012-07-31 16:16:21 +1000350fail_ttm:
351 nouveau_agp_fini(drm);
352 nouveau_vga_fini(drm);
Ben Skeggs94580292012-07-06 12:14:00 +1000353fail_device:
354 nouveau_cli_destroy(&drm->client);
355 return ret;
356}
357
Marcin Slusarz5b8a43a2012-08-19 23:00:00 +0200358static int
Ben Skeggs94580292012-07-06 12:14:00 +1000359nouveau_drm_unload(struct drm_device *dev)
360{
Ben Skeggs77145f12012-07-31 16:16:21 +1000361 struct nouveau_drm *drm = nouveau_drm(dev);
Ben Skeggs94580292012-07-06 12:14:00 +1000362
Ben Skeggsebb945a2012-07-20 08:17:34 +1000363 nouveau_fbcon_fini(dev);
364 nouveau_accel_fini(drm);
365
Ben Skeggs77145f12012-07-31 16:16:21 +1000366 nouveau_pm_fini(dev);
367
Ben Skeggs94307382012-10-31 12:11:15 +1000368 if (dev->mode_config.num_crtc)
369 nouveau_display_fini(dev);
Ben Skeggs77145f12012-07-31 16:16:21 +1000370 nouveau_display_destroy(dev);
371
372 nouveau_irq_fini(dev);
373 nouveau_bios_takedown(dev);
Ben Skeggs94580292012-07-06 12:14:00 +1000374
Ben Skeggsebb945a2012-07-20 08:17:34 +1000375 nouveau_ttm_fini(drm);
Ben Skeggscb75d972012-07-11 10:44:20 +1000376 nouveau_agp_fini(drm);
Ben Skeggs77145f12012-07-31 16:16:21 +1000377 nouveau_vga_fini(drm);
Ben Skeggscb75d972012-07-11 10:44:20 +1000378
Ben Skeggs94580292012-07-06 12:14:00 +1000379 nouveau_cli_destroy(&drm->client);
380 return 0;
381}
382
383static void
384nouveau_drm_remove(struct pci_dev *pdev)
385{
Ben Skeggs77145f12012-07-31 16:16:21 +1000386 struct drm_device *dev = pci_get_drvdata(pdev);
387 struct nouveau_drm *drm = nouveau_drm(dev);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000388 struct nouveau_object *device;
Ben Skeggs77145f12012-07-31 16:16:21 +1000389
390 device = drm->client.base.device;
391 drm_put_dev(dev);
392
Ben Skeggsebb945a2012-07-20 08:17:34 +1000393 nouveau_object_ref(NULL, &device);
394 nouveau_object_debug();
Ben Skeggs94580292012-07-06 12:14:00 +1000395}
396
397int
398nouveau_drm_suspend(struct pci_dev *pdev, pm_message_t pm_state)
399{
400 struct drm_device *dev = pci_get_drvdata(pdev);
Ben Skeggs77145f12012-07-31 16:16:21 +1000401 struct nouveau_drm *drm = nouveau_drm(dev);
Ben Skeggs94580292012-07-06 12:14:00 +1000402 struct nouveau_cli *cli;
403 int ret;
404
405 if (dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
406 pm_state.event == PM_EVENT_PRETHAW)
407 return 0;
408
Ben Skeggs94307382012-10-31 12:11:15 +1000409 if (dev->mode_config.num_crtc) {
410 NV_INFO(drm, "suspending fbcon...\n");
411 nouveau_fbcon_set_suspend(dev, 1);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000412
Ben Skeggs94307382012-10-31 12:11:15 +1000413 NV_INFO(drm, "suspending display...\n");
414 ret = nouveau_display_suspend(dev);
415 if (ret)
416 return ret;
417 }
Ben Skeggs94580292012-07-06 12:14:00 +1000418
Ben Skeggsebb945a2012-07-20 08:17:34 +1000419 NV_INFO(drm, "evicting buffers...\n");
420 ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
421
422 if (drm->fence && nouveau_fence(drm)->suspend) {
423 if (!nouveau_fence(drm)->suspend(drm))
424 return -ENOMEM;
425 }
426
427 NV_INFO(drm, "suspending client object trees...\n");
Ben Skeggs94580292012-07-06 12:14:00 +1000428 list_for_each_entry(cli, &drm->clients, head) {
429 ret = nouveau_client_fini(&cli->base, true);
430 if (ret)
431 goto fail_client;
432 }
433
434 ret = nouveau_client_fini(&drm->client.base, true);
435 if (ret)
436 goto fail_client;
437
Ben Skeggscb75d972012-07-11 10:44:20 +1000438 nouveau_agp_fini(drm);
439
Ben Skeggs94580292012-07-06 12:14:00 +1000440 pci_save_state(pdev);
441 if (pm_state.event == PM_EVENT_SUSPEND) {
442 pci_disable_device(pdev);
443 pci_set_power_state(pdev, PCI_D3hot);
444 }
445
446 return 0;
447
448fail_client:
449 list_for_each_entry_continue_reverse(cli, &drm->clients, head) {
450 nouveau_client_init(&cli->base);
451 }
452
Ben Skeggs94307382012-10-31 12:11:15 +1000453 if (dev->mode_config.num_crtc) {
454 NV_INFO(drm, "resuming display...\n");
455 nouveau_display_resume(dev);
456 }
Ben Skeggs94580292012-07-06 12:14:00 +1000457 return ret;
458}
459
460int
461nouveau_drm_resume(struct pci_dev *pdev)
462{
463 struct drm_device *dev = pci_get_drvdata(pdev);
Ben Skeggs77145f12012-07-31 16:16:21 +1000464 struct nouveau_drm *drm = nouveau_drm(dev);
Ben Skeggs94580292012-07-06 12:14:00 +1000465 struct nouveau_cli *cli;
466 int ret;
467
468 if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
469 return 0;
470
Ben Skeggsebb945a2012-07-20 08:17:34 +1000471 NV_INFO(drm, "re-enabling device...\n");
Ben Skeggs94580292012-07-06 12:14:00 +1000472 pci_set_power_state(pdev, PCI_D0);
473 pci_restore_state(pdev);
474 ret = pci_enable_device(pdev);
475 if (ret)
476 return ret;
477 pci_set_master(pdev);
478
Ben Skeggscb75d972012-07-11 10:44:20 +1000479 nouveau_agp_reset(drm);
480
Ben Skeggsebb945a2012-07-20 08:17:34 +1000481 NV_INFO(drm, "resuming client object trees...\n");
Ben Skeggs94580292012-07-06 12:14:00 +1000482 nouveau_client_init(&drm->client.base);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000483 nouveau_agp_init(drm);
Ben Skeggs94580292012-07-06 12:14:00 +1000484
485 list_for_each_entry(cli, &drm->clients, head) {
486 nouveau_client_init(&cli->base);
487 }
488
Ben Skeggsebb945a2012-07-20 08:17:34 +1000489 if (drm->fence && nouveau_fence(drm)->resume)
490 nouveau_fence(drm)->resume(drm);
Ben Skeggscb75d972012-07-11 10:44:20 +1000491
Ben Skeggs77145f12012-07-31 16:16:21 +1000492 nouveau_run_vbios_init(dev);
493 nouveau_irq_postinstall(dev);
494 nouveau_pm_resume(dev);
495
Ben Skeggs94307382012-10-31 12:11:15 +1000496 if (dev->mode_config.num_crtc) {
497 NV_INFO(drm, "resuming display...\n");
498 nouveau_display_resume(dev);
499 }
Ben Skeggs77145f12012-07-31 16:16:21 +1000500 return 0;
Ben Skeggs94580292012-07-06 12:14:00 +1000501}
502
Marcin Slusarz5b8a43a2012-08-19 23:00:00 +0200503static int
Ben Skeggsebb945a2012-07-20 08:17:34 +1000504nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
505{
506 struct pci_dev *pdev = dev->pdev;
507 struct nouveau_drm *drm = nouveau_drm(dev);
508 struct nouveau_cli *cli;
Ben Skeggsfa6df8c2012-09-12 13:09:23 +1000509 char name[16];
Ben Skeggsebb945a2012-07-20 08:17:34 +1000510 int ret;
511
Linus Torvalds612a9aa2012-10-03 23:29:23 -0700512 snprintf(name, sizeof(name), "%d", pid_nr(fpriv->pid));
Ben Skeggsfa6df8c2012-09-12 13:09:23 +1000513
514 ret = nouveau_cli_create(pdev, name, sizeof(*cli), (void **)&cli);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000515 if (ret)
516 return ret;
517
518 if (nv_device(drm->device)->card_type >= NV_50) {
519 ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
520 0x1000, &cli->base.vm);
521 if (ret) {
522 nouveau_cli_destroy(cli);
523 return ret;
524 }
525 }
526
527 fpriv->driver_priv = cli;
528
529 mutex_lock(&drm->client.mutex);
530 list_add(&cli->head, &drm->clients);
531 mutex_unlock(&drm->client.mutex);
532 return 0;
533}
534
Marcin Slusarz5b8a43a2012-08-19 23:00:00 +0200535static void
Ben Skeggsebb945a2012-07-20 08:17:34 +1000536nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
537{
538 struct nouveau_cli *cli = nouveau_cli(fpriv);
539 struct nouveau_drm *drm = nouveau_drm(dev);
540
541 if (cli->abi16)
542 nouveau_abi16_fini(cli->abi16);
543
544 mutex_lock(&drm->client.mutex);
545 list_del(&cli->head);
546 mutex_unlock(&drm->client.mutex);
547}
548
Marcin Slusarz5b8a43a2012-08-19 23:00:00 +0200549static void
Ben Skeggsebb945a2012-07-20 08:17:34 +1000550nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
551{
552 struct nouveau_cli *cli = nouveau_cli(fpriv);
553 nouveau_cli_destroy(cli);
554}
555
Ben Skeggs77145f12012-07-31 16:16:21 +1000556static struct drm_ioctl_desc
557nouveau_ioctls[] = {
558 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH),
559 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
560 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH),
561 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH),
562 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH),
563 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH),
564 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH),
565 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH),
566 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH),
567 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH),
568 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH),
569 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH),
570};
571
572static const struct file_operations
573nouveau_driver_fops = {
574 .owner = THIS_MODULE,
575 .open = drm_open,
576 .release = drm_release,
577 .unlocked_ioctl = drm_ioctl,
578 .mmap = nouveau_ttm_mmap,
579 .poll = drm_poll,
580 .fasync = drm_fasync,
581 .read = drm_read,
582#if defined(CONFIG_COMPAT)
583 .compat_ioctl = nouveau_compat_ioctl,
584#endif
585 .llseek = noop_llseek,
586};
587
588static struct drm_driver
589driver = {
590 .driver_features =
591 DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
592 DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
593 DRIVER_MODESET | DRIVER_PRIME,
594
595 .load = nouveau_drm_load,
596 .unload = nouveau_drm_unload,
597 .open = nouveau_drm_open,
598 .preclose = nouveau_drm_preclose,
599 .postclose = nouveau_drm_postclose,
600 .lastclose = nouveau_vga_lastclose,
601
602 .irq_preinstall = nouveau_irq_preinstall,
603 .irq_postinstall = nouveau_irq_postinstall,
604 .irq_uninstall = nouveau_irq_uninstall,
605 .irq_handler = nouveau_irq_handler,
606
607 .get_vblank_counter = drm_vblank_count,
608 .enable_vblank = nouveau_vblank_enable,
609 .disable_vblank = nouveau_vblank_disable,
610
611 .ioctls = nouveau_ioctls,
612 .fops = &nouveau_driver_fops,
613
614 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
615 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
616 .gem_prime_export = nouveau_gem_prime_export,
617 .gem_prime_import = nouveau_gem_prime_import,
618
619 .gem_init_object = nouveau_gem_object_new,
620 .gem_free_object = nouveau_gem_object_del,
621 .gem_open_object = nouveau_gem_object_open,
622 .gem_close_object = nouveau_gem_object_close,
623
624 .dumb_create = nouveau_display_dumb_create,
625 .dumb_map_offset = nouveau_display_dumb_map_offset,
626 .dumb_destroy = nouveau_display_dumb_destroy,
627
628 .name = DRIVER_NAME,
629 .desc = DRIVER_DESC,
630#ifdef GIT_REVISION
631 .date = GIT_REVISION,
632#else
633 .date = DRIVER_DATE,
634#endif
635 .major = DRIVER_MAJOR,
636 .minor = DRIVER_MINOR,
637 .patchlevel = DRIVER_PATCHLEVEL,
638};
639
Ben Skeggs94580292012-07-06 12:14:00 +1000640static struct pci_device_id
641nouveau_drm_pci_table[] = {
642 {
643 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
644 .class = PCI_BASE_CLASS_DISPLAY << 16,
645 .class_mask = 0xff << 16,
646 },
647 {
648 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
649 .class = PCI_BASE_CLASS_DISPLAY << 16,
650 .class_mask = 0xff << 16,
651 },
652 {}
653};
654
655static struct pci_driver
656nouveau_drm_pci_driver = {
657 .name = "nouveau",
658 .id_table = nouveau_drm_pci_table,
659 .probe = nouveau_drm_probe,
660 .remove = nouveau_drm_remove,
661 .suspend = nouveau_drm_suspend,
662 .resume = nouveau_drm_resume,
663};
664
665static int __init
666nouveau_drm_init(void)
667{
Ben Skeggs77145f12012-07-31 16:16:21 +1000668 driver.num_ioctls = ARRAY_SIZE(nouveau_ioctls);
669
670 if (nouveau_modeset == -1) {
671#ifdef CONFIG_VGA_CONSOLE
672 if (vgacon_text_force())
673 nouveau_modeset = 0;
Ben Skeggs77145f12012-07-31 16:16:21 +1000674#endif
Ben Skeggs77145f12012-07-31 16:16:21 +1000675 }
676
677 if (!nouveau_modeset)
678 return 0;
679
680 nouveau_register_dsm_handler();
681 return drm_pci_init(&driver, &nouveau_drm_pci_driver);
Ben Skeggs94580292012-07-06 12:14:00 +1000682}
683
684static void __exit
685nouveau_drm_exit(void)
686{
Ben Skeggs77145f12012-07-31 16:16:21 +1000687 if (!nouveau_modeset)
688 return;
689
690 drm_pci_exit(&driver, &nouveau_drm_pci_driver);
691 nouveau_unregister_dsm_handler();
Ben Skeggs94580292012-07-06 12:14:00 +1000692}
693
694module_init(nouveau_drm_init);
695module_exit(nouveau_drm_exit);
696
697MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
Ben Skeggs77145f12012-07-31 16:16:21 +1000698MODULE_AUTHOR(DRIVER_AUTHOR);
699MODULE_DESCRIPTION(DRIVER_DESC);
Ben Skeggs94580292012-07-06 12:14:00 +1000700MODULE_LICENSE("GPL and additional rights");