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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * include/linux/fsl_devices.h
3 *
4 * Definitions for any platform device related flags or structures for
5 * Freescale processor devices
6 *
Kumar Gala4c8d3d92005-11-13 16:06:30 -08007 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
Linus Torvalds1da177e2005-04-16 15:20:36 -07008 *
Ramneek Mehresh58c559e2012-03-20 10:35:50 +05309 * Copyright 2004,2012 Freescale Semiconductor, Inc
Linus Torvalds1da177e2005-04-16 15:20:36 -070010 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
15 */
16
Linus Torvalds1da177e2005-04-16 15:20:36 -070017#ifndef _FSL_DEVICE_H_
18#define _FSL_DEVICE_H_
19
Ramneek Mehresh58c559e2012-03-20 10:35:50 +053020#define FSL_UTMI_PHY_DLY 10 /*As per P1010RM, delay for UTMI
21 PHY CLK to become stable - 10ms*/
22#define FSL_USB_VER_OLD 0
23#define FSL_USB_VER_1_6 1
24#define FSL_USB_VER_2_2 2
25
Linus Torvalds1da177e2005-04-16 15:20:36 -070026#include <linux/types.h>
27
28/*
29 * Some conventions on how we handle peripherals on Freescale chips
30 *
31 * unique device: a platform_device entry in fsl_plat_devs[] plus
32 * associated device information in its platform_data structure.
33 *
34 * A chip is described by a set of unique devices.
35 *
36 * Each sub-arch has its own master list of unique devices and
37 * enumerates them by enum fsl_devices in a sub-arch specific header
38 *
39 * The platform data structure is broken into two parts. The
40 * first is device specific information that help identify any
41 * unique features of a peripheral. The second is any
42 * information that may be defined by the board or how the device
43 * is connected externally of the chip.
44 *
45 * naming conventions:
46 * - platform data structures: <driver>_platform_data
47 * - platform data device flags: FSL_<driver>_DEV_<FLAG>
48 * - platform data board flags: FSL_<driver>_BRD_<FLAG>
49 *
50 */
51
Randy Vinson80cb9ae2006-01-20 13:53:38 -080052enum fsl_usb2_operating_modes {
53 FSL_USB2_MPH_HOST,
54 FSL_USB2_DR_HOST,
55 FSL_USB2_DR_DEVICE,
56 FSL_USB2_DR_OTG,
57};
58
59enum fsl_usb2_phy_modes {
60 FSL_USB2_PHY_NONE,
61 FSL_USB2_PHY_ULPI,
62 FSL_USB2_PHY_UTMI,
63 FSL_USB2_PHY_UTMI_WIDE,
64 FSL_USB2_PHY_SERIAL,
65};
66
Anatolij Gustschin230f7ed2010-09-28 20:55:21 +020067struct clk;
68struct platform_device;
69
Randy Vinson80cb9ae2006-01-20 13:53:38 -080070struct fsl_usb2_platform_data {
71 /* board specific information */
Ramneek Mehresh58c559e2012-03-20 10:35:50 +053072 int controller_ver;
Li Yang98658532006-10-03 23:10:46 -050073 enum fsl_usb2_operating_modes operating_mode;
74 enum fsl_usb2_phy_modes phy_mode;
75 unsigned int port_enables;
Eric Bénard69cb1ec2010-10-15 14:30:58 +020076 unsigned int workaround;
Anatolij Gustschin230f7ed2010-09-28 20:55:21 +020077
78 int (*init)(struct platform_device *);
79 void (*exit)(struct platform_device *);
80 void __iomem *regs; /* ioremap'd register base */
81 struct clk *clk;
Anatolij Gustschin83722bc2011-04-18 22:02:00 +020082 unsigned power_budget; /* hcd->power_budget */
Anatolij Gustschin230f7ed2010-09-28 20:55:21 +020083 unsigned big_endian_mmio:1;
84 unsigned big_endian_desc:1;
85 unsigned es:1; /* need USBMODE:ES */
86 unsigned le_setup_buf:1;
87 unsigned have_sysif_regs:1;
88 unsigned invert_drvvbus:1;
89 unsigned invert_pwr_fault:1;
Anatolij Gustschin13b7ee2a2011-04-18 22:01:55 +020090
91 unsigned suspended:1;
92 unsigned already_suspended:1;
93
94 /* register save area for suspend/resume */
95 u32 pm_command;
96 u32 pm_status;
97 u32 pm_intr_enable;
98 u32 pm_frame_index;
99 u32 pm_segment;
100 u32 pm_frame_list;
101 u32 pm_async_next;
102 u32 pm_configured_flag;
103 u32 pm_portsc;
104 u32 pm_usbgenctrl;
Randy Vinson80cb9ae2006-01-20 13:53:38 -0800105};
106
107/* Flags in fsl_usb2_mph_platform_data */
108#define FSL_USB2_PORT0_ENABLED 0x00000001
109#define FSL_USB2_PORT1_ENABLED 0x00000002
110
Eric Bénard69cb1ec2010-10-15 14:30:58 +0200111#define FLS_USB2_WORKAROUND_ENGCM09152 (1 << 0)
112
Anton Vorontsov364fdbc2009-03-31 15:24:36 -0700113struct spi_device;
114
Kumar Galaccf06992006-05-20 15:00:15 -0700115struct fsl_spi_platform_data {
116 u32 initial_spmode; /* initial SPMODE value */
Anton Vorontsov35b4b3c2009-03-31 15:24:37 -0700117 s16 bus_num;
Anton Vorontsov87ec0e92009-10-12 20:49:25 +0400118 unsigned int flags;
Benjamin Herrenschmidt7d6709a2009-11-24 16:06:48 +1100119#define SPI_QE_CPU_MODE (1 << 0) /* QE CPU ("PIO") mode */
120#define SPI_CPM_MODE (1 << 1) /* CPM/QE ("DMA") mode */
121#define SPI_CPM1 (1 << 2) /* SPI unit is in CPM1 block */
122#define SPI_CPM2 (1 << 3) /* SPI unit is in CPM2 block */
123#define SPI_QE (1 << 4) /* SPI unit is in QE block */
Kumar Galaccf06992006-05-20 15:00:15 -0700124 /* board specific information */
125 u16 max_chipselect;
Anton Vorontsov364fdbc2009-03-31 15:24:36 -0700126 void (*cs_control)(struct spi_device *spi, bool on);
Kumar Galaccf06992006-05-20 15:00:15 -0700127 u32 sysclk;
128};
129
Vitaly Bordug80128ff2007-07-09 11:37:35 -0700130struct mpc8xx_pcmcia_ops {
131 void(*hw_ctrl)(int slot, int enable);
132 int(*voltage_set)(int slot, int vcc, int vpp);
133};
134
Scott Woodd49747b2007-10-09 12:37:13 -0500135/* Returns non-zero if the current suspend operation would
136 * lead to a deep sleep (i.e. power removed from the core,
137 * instead of just the clock).
138 */
Anton Vorontsov2e9d5462009-09-23 22:52:38 +0400139#if defined(CONFIG_PPC_83xx) && defined(CONFIG_SUSPEND)
Scott Woodd49747b2007-10-09 12:37:13 -0500140int fsl_deep_sleep(void);
Anton Vorontsov2e9d5462009-09-23 22:52:38 +0400141#else
142static inline int fsl_deep_sleep(void) { return 0; }
143#endif
Scott Woodd49747b2007-10-09 12:37:13 -0500144
Li Yang98658532006-10-03 23:10:46 -0500145#endif /* _FSL_DEVICE_H_ */