Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * sound/sscape.c |
| 3 | * |
| 4 | * Low level driver for Ensoniq SoundScape |
| 5 | * |
| 6 | * |
| 7 | * Copyright (C) by Hannu Savolainen 1993-1997 |
| 8 | * |
| 9 | * OSS/Free for Linux is distributed under the GNU GENERAL PUBLIC LICENSE (GPL) |
| 10 | * Version 2 (June 1991). See the "COPYING" file distributed with this software |
| 11 | * for more info. |
| 12 | * |
| 13 | * |
| 14 | * Thomas Sailer : ioctl code reworked (vmalloc/vfree removed) |
| 15 | * Sergey Smitienko : ensoniq p'n'p support |
| 16 | * Christoph Hellwig : adapted to module_init/module_exit |
| 17 | * Bartlomiej Zolnierkiewicz : added __init to attach_sscape() |
| 18 | * Chris Rankin : Specify that this module owns the coprocessor |
| 19 | * Arnaldo C. de Melo : added missing restore_flags in sscape_pnp_upload_file |
| 20 | */ |
| 21 | |
| 22 | #include <linux/init.h> |
| 23 | #include <linux/module.h> |
| 24 | |
| 25 | #include "sound_config.h" |
| 26 | #include "sound_firmware.h" |
| 27 | |
| 28 | #include <linux/types.h> |
| 29 | #include <linux/errno.h> |
| 30 | #include <linux/signal.h> |
| 31 | #include <linux/fcntl.h> |
| 32 | #include <linux/ctype.h> |
| 33 | #include <linux/stddef.h> |
| 34 | #include <linux/kmod.h> |
| 35 | #include <asm/dma.h> |
| 36 | #include <asm/io.h> |
| 37 | #include <linux/wait.h> |
| 38 | #include <linux/slab.h> |
| 39 | #include <linux/ioport.h> |
| 40 | #include <linux/delay.h> |
| 41 | #include <linux/proc_fs.h> |
| 42 | #include <linux/spinlock.h> |
| 43 | |
| 44 | #include "coproc.h" |
| 45 | |
| 46 | #include "ad1848.h" |
| 47 | #include "mpu401.h" |
| 48 | |
| 49 | /* |
| 50 | * I/O ports |
| 51 | */ |
| 52 | #define MIDI_DATA 0 |
| 53 | #define MIDI_CTRL 1 |
| 54 | #define HOST_CTRL 2 |
| 55 | #define TX_READY 0x02 |
| 56 | #define RX_READY 0x01 |
| 57 | #define HOST_DATA 3 |
| 58 | #define ODIE_ADDR 4 |
| 59 | #define ODIE_DATA 5 |
| 60 | |
| 61 | /* |
| 62 | * Indirect registers |
| 63 | */ |
| 64 | |
| 65 | #define GA_INTSTAT_REG 0 |
| 66 | #define GA_INTENA_REG 1 |
| 67 | #define GA_DMAA_REG 2 |
| 68 | #define GA_DMAB_REG 3 |
| 69 | #define GA_INTCFG_REG 4 |
| 70 | #define GA_DMACFG_REG 5 |
| 71 | #define GA_CDCFG_REG 6 |
| 72 | #define GA_SMCFGA_REG 7 |
| 73 | #define GA_SMCFGB_REG 8 |
| 74 | #define GA_HMCTL_REG 9 |
| 75 | |
| 76 | /* |
| 77 | * DMA channel identifiers (A and B) |
| 78 | */ |
| 79 | |
| 80 | #define SSCAPE_DMA_A 0 |
| 81 | #define SSCAPE_DMA_B 1 |
| 82 | |
| 83 | #define PORT(name) (devc->base+name) |
| 84 | |
| 85 | /* |
| 86 | * Host commands recognized by the OBP microcode |
| 87 | */ |
| 88 | |
| 89 | #define CMD_GEN_HOST_ACK 0x80 |
| 90 | #define CMD_GEN_MPU_ACK 0x81 |
| 91 | #define CMD_GET_BOARD_TYPE 0x82 |
| 92 | #define CMD_SET_CONTROL 0x88 /* Old firmware only */ |
| 93 | #define CMD_GET_CONTROL 0x89 /* Old firmware only */ |
| 94 | #define CTL_MASTER_VOL 0 |
| 95 | #define CTL_MIC_MODE 2 |
| 96 | #define CTL_SYNTH_VOL 4 |
| 97 | #define CTL_WAVE_VOL 7 |
| 98 | #define CMD_SET_EXTMIDI 0x8a |
| 99 | #define CMD_GET_EXTMIDI 0x8b |
| 100 | #define CMD_SET_MT32 0x8c |
| 101 | #define CMD_GET_MT32 0x8d |
| 102 | |
| 103 | #define CMD_ACK 0x80 |
| 104 | |
| 105 | #define IC_ODIE 1 |
| 106 | #define IC_OPUS 2 |
| 107 | |
| 108 | typedef struct sscape_info |
| 109 | { |
| 110 | int base, irq, dma; |
| 111 | |
| 112 | int codec, codec_irq; /* required to setup pnp cards*/ |
| 113 | int codec_type; |
| 114 | int ic_type; |
| 115 | char* raw_buf; |
| 116 | unsigned long raw_buf_phys; |
| 117 | int buffsize; /* -------------------------- */ |
| 118 | spinlock_t lock; |
| 119 | int ok; /* Properly detected */ |
| 120 | int failed; |
| 121 | int dma_allocated; |
| 122 | int codec_audiodev; |
| 123 | int opened; |
| 124 | int *osp; |
| 125 | int my_audiodev; |
| 126 | } sscape_info; |
| 127 | |
| 128 | static struct sscape_info adev_info = { |
| 129 | 0 |
| 130 | }; |
| 131 | |
| 132 | static struct sscape_info *devc = &adev_info; |
| 133 | static int sscape_mididev = -1; |
| 134 | |
| 135 | /* Some older cards have assigned interrupt bits differently than new ones */ |
| 136 | static char valid_interrupts_old[] = { |
| 137 | 9, 7, 5, 15 |
| 138 | }; |
| 139 | |
| 140 | static char valid_interrupts_new[] = { |
| 141 | 9, 5, 7, 10 |
| 142 | }; |
| 143 | |
| 144 | static char *valid_interrupts = valid_interrupts_new; |
| 145 | |
| 146 | /* |
| 147 | * See the bottom of the driver. This can be set by spea =0/1. |
| 148 | */ |
| 149 | |
| 150 | #ifdef REVEAL_SPEA |
| 151 | static char old_hardware = 1; |
| 152 | #else |
| 153 | static char old_hardware; |
| 154 | #endif |
| 155 | |
| 156 | static void sleep(unsigned howlong) |
| 157 | { |
| 158 | current->state = TASK_INTERRUPTIBLE; |
| 159 | schedule_timeout(howlong); |
| 160 | } |
| 161 | |
| 162 | static unsigned char sscape_read(struct sscape_info *devc, int reg) |
| 163 | { |
| 164 | unsigned long flags; |
| 165 | unsigned char val; |
| 166 | |
| 167 | spin_lock_irqsave(&devc->lock,flags); |
| 168 | outb(reg, PORT(ODIE_ADDR)); |
| 169 | val = inb(PORT(ODIE_DATA)); |
| 170 | spin_unlock_irqrestore(&devc->lock,flags); |
| 171 | return val; |
| 172 | } |
| 173 | |
| 174 | static void __sscape_write(int reg, int data) |
| 175 | { |
| 176 | outb(reg, PORT(ODIE_ADDR)); |
| 177 | outb(data, PORT(ODIE_DATA)); |
| 178 | } |
| 179 | |
| 180 | static void sscape_write(struct sscape_info *devc, int reg, int data) |
| 181 | { |
| 182 | unsigned long flags; |
| 183 | |
| 184 | spin_lock_irqsave(&devc->lock,flags); |
| 185 | __sscape_write(reg, data); |
| 186 | spin_unlock_irqrestore(&devc->lock,flags); |
| 187 | } |
| 188 | |
| 189 | static unsigned char sscape_pnp_read_codec(sscape_info* devc, unsigned char reg) |
| 190 | { |
| 191 | unsigned char res; |
| 192 | unsigned long flags; |
| 193 | |
| 194 | spin_lock_irqsave(&devc->lock,flags); |
| 195 | outb( reg, devc -> codec); |
| 196 | res = inb (devc -> codec + 1); |
| 197 | spin_unlock_irqrestore(&devc->lock,flags); |
| 198 | return res; |
| 199 | |
| 200 | } |
| 201 | |
| 202 | static void sscape_pnp_write_codec(sscape_info* devc, unsigned char reg, unsigned char data) |
| 203 | { |
| 204 | unsigned long flags; |
| 205 | |
| 206 | spin_lock_irqsave(&devc->lock,flags); |
| 207 | outb( reg, devc -> codec); |
| 208 | outb( data, devc -> codec + 1); |
| 209 | spin_unlock_irqrestore(&devc->lock,flags); |
| 210 | } |
| 211 | |
| 212 | static void host_open(struct sscape_info *devc) |
| 213 | { |
| 214 | outb((0x00), PORT(HOST_CTRL)); /* Put the board to the host mode */ |
| 215 | } |
| 216 | |
| 217 | static void host_close(struct sscape_info *devc) |
| 218 | { |
| 219 | outb((0x03), PORT(HOST_CTRL)); /* Put the board to the MIDI mode */ |
| 220 | } |
| 221 | |
| 222 | static int host_write(struct sscape_info *devc, unsigned char *data, int count) |
| 223 | { |
| 224 | unsigned long flags; |
| 225 | int i, timeout_val; |
| 226 | |
| 227 | spin_lock_irqsave(&devc->lock,flags); |
| 228 | /* |
| 229 | * Send the command and data bytes |
| 230 | */ |
| 231 | |
| 232 | for (i = 0; i < count; i++) |
| 233 | { |
| 234 | for (timeout_val = 10000; timeout_val > 0; timeout_val--) |
| 235 | if (inb(PORT(HOST_CTRL)) & TX_READY) |
| 236 | break; |
| 237 | |
| 238 | if (timeout_val <= 0) |
| 239 | { |
| 240 | spin_unlock_irqrestore(&devc->lock,flags); |
| 241 | return 0; |
| 242 | } |
| 243 | outb(data[i], PORT(HOST_DATA)); |
| 244 | } |
| 245 | spin_unlock_irqrestore(&devc->lock,flags); |
| 246 | return 1; |
| 247 | } |
| 248 | |
| 249 | static int host_read(struct sscape_info *devc) |
| 250 | { |
| 251 | unsigned long flags; |
| 252 | int timeout_val; |
| 253 | unsigned char data; |
| 254 | |
| 255 | spin_lock_irqsave(&devc->lock,flags); |
| 256 | /* |
| 257 | * Read a byte |
| 258 | */ |
| 259 | |
| 260 | for (timeout_val = 10000; timeout_val > 0; timeout_val--) |
| 261 | if (inb(PORT(HOST_CTRL)) & RX_READY) |
| 262 | break; |
| 263 | |
| 264 | if (timeout_val <= 0) |
| 265 | { |
| 266 | spin_unlock_irqrestore(&devc->lock,flags); |
| 267 | return -1; |
| 268 | } |
| 269 | data = inb(PORT(HOST_DATA)); |
| 270 | spin_unlock_irqrestore(&devc->lock,flags); |
| 271 | return data; |
| 272 | } |
| 273 | |
| 274 | #if 0 /* unused */ |
| 275 | static int host_command1(struct sscape_info *devc, int cmd) |
| 276 | { |
| 277 | unsigned char buf[10]; |
| 278 | buf[0] = (unsigned char) (cmd & 0xff); |
| 279 | return host_write(devc, buf, 1); |
| 280 | } |
| 281 | #endif /* unused */ |
| 282 | |
| 283 | |
| 284 | static int host_command2(struct sscape_info *devc, int cmd, int parm1) |
| 285 | { |
| 286 | unsigned char buf[10]; |
| 287 | |
| 288 | buf[0] = (unsigned char) (cmd & 0xff); |
| 289 | buf[1] = (unsigned char) (parm1 & 0xff); |
| 290 | |
| 291 | return host_write(devc, buf, 2); |
| 292 | } |
| 293 | |
| 294 | static int host_command3(struct sscape_info *devc, int cmd, int parm1, int parm2) |
| 295 | { |
| 296 | unsigned char buf[10]; |
| 297 | |
| 298 | buf[0] = (unsigned char) (cmd & 0xff); |
| 299 | buf[1] = (unsigned char) (parm1 & 0xff); |
| 300 | buf[2] = (unsigned char) (parm2 & 0xff); |
| 301 | return host_write(devc, buf, 3); |
| 302 | } |
| 303 | |
| 304 | static void set_mt32(struct sscape_info *devc, int value) |
| 305 | { |
| 306 | host_open(devc); |
| 307 | host_command2(devc, CMD_SET_MT32, value ? 1 : 0); |
| 308 | if (host_read(devc) != CMD_ACK) |
| 309 | { |
| 310 | /* printk( "SNDSCAPE: Setting MT32 mode failed\n"); */ |
| 311 | } |
| 312 | host_close(devc); |
| 313 | } |
| 314 | |
| 315 | static void set_control(struct sscape_info *devc, int ctrl, int value) |
| 316 | { |
| 317 | host_open(devc); |
| 318 | host_command3(devc, CMD_SET_CONTROL, ctrl, value); |
| 319 | if (host_read(devc) != CMD_ACK) |
| 320 | { |
| 321 | /* printk( "SNDSCAPE: Setting control (%d) failed\n", ctrl); */ |
| 322 | } |
| 323 | host_close(devc); |
| 324 | } |
| 325 | |
| 326 | static void do_dma(struct sscape_info *devc, int dma_chan, unsigned long buf, int blk_size, int mode) |
| 327 | { |
| 328 | unsigned char temp; |
| 329 | |
| 330 | if (dma_chan != SSCAPE_DMA_A) |
| 331 | { |
| 332 | printk(KERN_WARNING "soundscape: Tried to use DMA channel != A. Why?\n"); |
| 333 | return; |
| 334 | } |
| 335 | audio_devs[devc->codec_audiodev]->flags &= ~DMA_AUTOMODE; |
| 336 | DMAbuf_start_dma(devc->codec_audiodev, buf, blk_size, mode); |
| 337 | audio_devs[devc->codec_audiodev]->flags |= DMA_AUTOMODE; |
| 338 | |
| 339 | temp = devc->dma << 4; /* Setup DMA channel select bits */ |
| 340 | if (devc->dma <= 3) |
| 341 | temp |= 0x80; /* 8 bit DMA channel */ |
| 342 | |
| 343 | temp |= 1; /* Trigger DMA */ |
| 344 | sscape_write(devc, GA_DMAA_REG, temp); |
| 345 | temp &= 0xfe; /* Clear DMA trigger */ |
| 346 | sscape_write(devc, GA_DMAA_REG, temp); |
| 347 | } |
| 348 | |
| 349 | static int verify_mpu(struct sscape_info *devc) |
| 350 | { |
| 351 | /* |
| 352 | * The SoundScape board could be in three modes (MPU, 8250 and host). |
| 353 | * If the card is not in the MPU mode, enabling the MPU driver will |
| 354 | * cause infinite loop (the driver believes that there is always some |
| 355 | * received data in the buffer. |
| 356 | * |
| 357 | * Detect this by looking if there are more than 10 received MIDI bytes |
| 358 | * (0x00) in the buffer. |
| 359 | */ |
| 360 | |
| 361 | int i; |
| 362 | |
| 363 | for (i = 0; i < 10; i++) |
| 364 | { |
| 365 | if (inb(devc->base + HOST_CTRL) & 0x80) |
| 366 | return 1; |
| 367 | |
| 368 | if (inb(devc->base) != 0x00) |
| 369 | return 1; |
| 370 | } |
| 371 | printk(KERN_WARNING "SoundScape: The device is not in the MPU-401 mode\n"); |
| 372 | return 0; |
| 373 | } |
| 374 | |
| 375 | static int sscape_coproc_open(void *dev_info, int sub_device) |
| 376 | { |
| 377 | if (sub_device == COPR_MIDI) |
| 378 | { |
| 379 | set_mt32(devc, 0); |
| 380 | if (!verify_mpu(devc)) |
| 381 | return -EIO; |
| 382 | } |
| 383 | return 0; |
| 384 | } |
| 385 | |
| 386 | static void sscape_coproc_close(void *dev_info, int sub_device) |
| 387 | { |
| 388 | struct sscape_info *devc = dev_info; |
| 389 | unsigned long flags; |
| 390 | |
| 391 | spin_lock_irqsave(&devc->lock,flags); |
| 392 | if (devc->dma_allocated) |
| 393 | { |
| 394 | __sscape_write(GA_DMAA_REG, 0x20); /* DMA channel disabled */ |
| 395 | devc->dma_allocated = 0; |
| 396 | } |
| 397 | spin_unlock_irqrestore(&devc->lock,flags); |
| 398 | return; |
| 399 | } |
| 400 | |
| 401 | static void sscape_coproc_reset(void *dev_info) |
| 402 | { |
| 403 | } |
| 404 | |
| 405 | static int sscape_download_boot(struct sscape_info *devc, unsigned char *block, int size, int flag) |
| 406 | { |
| 407 | unsigned long flags; |
| 408 | unsigned char temp; |
| 409 | volatile int done, timeout_val; |
| 410 | static unsigned char codec_dma_bits; |
| 411 | |
| 412 | if (flag & CPF_FIRST) |
| 413 | { |
| 414 | /* |
| 415 | * First block. Have to allocate DMA and to reset the board |
| 416 | * before continuing. |
| 417 | */ |
| 418 | |
| 419 | spin_lock_irqsave(&devc->lock,flags); |
| 420 | codec_dma_bits = sscape_read(devc, GA_CDCFG_REG); |
| 421 | |
| 422 | if (devc->dma_allocated == 0) |
| 423 | devc->dma_allocated = 1; |
| 424 | |
| 425 | spin_unlock_irqrestore(&devc->lock,flags); |
| 426 | |
| 427 | sscape_write(devc, GA_HMCTL_REG, |
| 428 | (temp = sscape_read(devc, GA_HMCTL_REG)) & 0x3f); /*Reset */ |
| 429 | |
| 430 | for (timeout_val = 10000; timeout_val > 0; timeout_val--) |
| 431 | sscape_read(devc, GA_HMCTL_REG); /* Delay */ |
| 432 | |
| 433 | /* Take board out of reset */ |
| 434 | sscape_write(devc, GA_HMCTL_REG, |
| 435 | (temp = sscape_read(devc, GA_HMCTL_REG)) | 0x80); |
| 436 | } |
| 437 | /* |
| 438 | * Transfer one code block using DMA |
| 439 | */ |
| 440 | if (audio_devs[devc->codec_audiodev]->dmap_out->raw_buf == NULL) |
| 441 | { |
| 442 | printk(KERN_WARNING "soundscape: DMA buffer not available\n"); |
| 443 | return 0; |
| 444 | } |
| 445 | memcpy(audio_devs[devc->codec_audiodev]->dmap_out->raw_buf, block, size); |
| 446 | |
| 447 | spin_lock_irqsave(&devc->lock,flags); |
| 448 | |
| 449 | /******** INTERRUPTS DISABLED NOW ********/ |
| 450 | |
| 451 | do_dma(devc, SSCAPE_DMA_A, |
| 452 | audio_devs[devc->codec_audiodev]->dmap_out->raw_buf_phys, |
| 453 | size, DMA_MODE_WRITE); |
| 454 | |
| 455 | /* |
| 456 | * Wait until transfer completes. |
| 457 | */ |
| 458 | |
| 459 | done = 0; |
| 460 | timeout_val = 30; |
| 461 | while (!done && timeout_val-- > 0) |
| 462 | { |
| 463 | int resid; |
| 464 | |
| 465 | if (HZ / 50) |
| 466 | sleep(HZ / 50); |
| 467 | clear_dma_ff(devc->dma); |
| 468 | if ((resid = get_dma_residue(devc->dma)) == 0) |
| 469 | done = 1; |
| 470 | } |
| 471 | |
| 472 | spin_unlock_irqrestore(&devc->lock,flags); |
| 473 | if (!done) |
| 474 | return 0; |
| 475 | |
| 476 | if (flag & CPF_LAST) |
| 477 | { |
| 478 | /* |
| 479 | * Take the board out of reset |
| 480 | */ |
| 481 | outb((0x00), PORT(HOST_CTRL)); |
| 482 | outb((0x00), PORT(MIDI_CTRL)); |
| 483 | |
| 484 | temp = sscape_read(devc, GA_HMCTL_REG); |
| 485 | temp |= 0x40; |
| 486 | sscape_write(devc, GA_HMCTL_REG, temp); /* Kickstart the board */ |
| 487 | |
| 488 | /* |
| 489 | * Wait until the ODB wakes up |
| 490 | */ |
| 491 | spin_lock_irqsave(&devc->lock,flags); |
| 492 | done = 0; |
| 493 | timeout_val = 5 * HZ; |
| 494 | while (!done && timeout_val-- > 0) |
| 495 | { |
| 496 | unsigned char x; |
| 497 | |
| 498 | sleep(1); |
| 499 | x = inb(PORT(HOST_DATA)); |
| 500 | if (x == 0xff || x == 0xfe) /* OBP startup acknowledge */ |
| 501 | { |
| 502 | DDB(printk("Soundscape: Acknowledge = %x\n", x)); |
| 503 | done = 1; |
| 504 | } |
| 505 | } |
| 506 | sscape_write(devc, GA_CDCFG_REG, codec_dma_bits); |
| 507 | |
| 508 | spin_unlock_irqrestore(&devc->lock,flags); |
| 509 | if (!done) |
| 510 | { |
| 511 | printk(KERN_ERR "soundscape: The OBP didn't respond after code download\n"); |
| 512 | return 0; |
| 513 | } |
| 514 | spin_lock_irqsave(&devc->lock,flags); |
| 515 | done = 0; |
| 516 | timeout_val = 5 * HZ; |
| 517 | while (!done && timeout_val-- > 0) |
| 518 | { |
| 519 | sleep(1); |
| 520 | if (inb(PORT(HOST_DATA)) == 0xfe) /* Host startup acknowledge */ |
| 521 | done = 1; |
| 522 | } |
| 523 | spin_unlock_irqrestore(&devc->lock,flags); |
| 524 | if (!done) |
| 525 | { |
| 526 | printk(KERN_ERR "soundscape: OBP Initialization failed.\n"); |
| 527 | return 0; |
| 528 | } |
| 529 | printk(KERN_INFO "SoundScape board initialized OK\n"); |
| 530 | set_control(devc, CTL_MASTER_VOL, 100); |
| 531 | set_control(devc, CTL_SYNTH_VOL, 100); |
| 532 | |
| 533 | #ifdef SSCAPE_DEBUG3 |
| 534 | /* |
| 535 | * Temporary debugging aid. Print contents of the registers after |
| 536 | * downloading the code. |
| 537 | */ |
| 538 | { |
| 539 | int i; |
| 540 | |
| 541 | for (i = 0; i < 13; i++) |
| 542 | printk("I%d = %02x (new value)\n", i, sscape_read(devc, i)); |
| 543 | } |
| 544 | #endif |
| 545 | |
| 546 | } |
| 547 | return 1; |
| 548 | } |
| 549 | |
| 550 | static int download_boot_block(void *dev_info, copr_buffer * buf) |
| 551 | { |
| 552 | if (buf->len <= 0 || buf->len > sizeof(buf->data)) |
| 553 | return -EINVAL; |
| 554 | |
| 555 | if (!sscape_download_boot(devc, buf->data, buf->len, buf->flags)) |
| 556 | { |
| 557 | printk(KERN_ERR "soundscape: Unable to load microcode block to the OBP.\n"); |
| 558 | return -EIO; |
| 559 | } |
| 560 | return 0; |
| 561 | } |
| 562 | |
| 563 | static int sscape_coproc_ioctl(void *dev_info, unsigned int cmd, void __user *arg, int local) |
| 564 | { |
| 565 | copr_buffer *buf; |
| 566 | int err; |
| 567 | |
| 568 | switch (cmd) |
| 569 | { |
| 570 | case SNDCTL_COPR_RESET: |
| 571 | sscape_coproc_reset(dev_info); |
| 572 | return 0; |
| 573 | |
| 574 | case SNDCTL_COPR_LOAD: |
| 575 | buf = (copr_buffer *) vmalloc(sizeof(copr_buffer)); |
| 576 | if (buf == NULL) |
| 577 | return -ENOSPC; |
| 578 | if (copy_from_user(buf, arg, sizeof(copr_buffer))) |
| 579 | { |
| 580 | vfree(buf); |
| 581 | return -EFAULT; |
| 582 | } |
| 583 | err = download_boot_block(dev_info, buf); |
| 584 | vfree(buf); |
| 585 | return err; |
| 586 | |
| 587 | default: |
| 588 | return -EINVAL; |
| 589 | } |
| 590 | } |
| 591 | |
| 592 | static coproc_operations sscape_coproc_operations = |
| 593 | { |
| 594 | "SoundScape M68K", |
| 595 | THIS_MODULE, |
| 596 | sscape_coproc_open, |
| 597 | sscape_coproc_close, |
| 598 | sscape_coproc_ioctl, |
| 599 | sscape_coproc_reset, |
| 600 | &adev_info |
| 601 | }; |
| 602 | |
| 603 | static struct resource *sscape_ports; |
| 604 | static int sscape_is_pnp; |
| 605 | |
| 606 | static void __init attach_sscape(struct address_info *hw_config) |
| 607 | { |
| 608 | #ifndef SSCAPE_REGS |
| 609 | /* |
| 610 | * Config register values for Spea/V7 Media FX and Ensoniq S-2000. |
| 611 | * These values are card |
| 612 | * dependent. If you have another SoundScape based card, you have to |
| 613 | * find the correct values. Do the following: |
| 614 | * - Compile this driver with SSCAPE_DEBUG1 defined. |
| 615 | * - Shut down and power off your machine. |
| 616 | * - Boot with DOS so that the SSINIT.EXE program is run. |
| 617 | * - Warm boot to {Linux|SYSV|BSD} and write down the lines displayed |
| 618 | * when detecting the SoundScape. |
| 619 | * - Modify the following list to use the values printed during boot. |
| 620 | * Undefine the SSCAPE_DEBUG1 |
| 621 | */ |
| 622 | #define SSCAPE_REGS { \ |
| 623 | /* I0 */ 0x00, \ |
| 624 | /* I1 */ 0xf0, /* Note! Ignored. Set always to 0xf0 */ \ |
| 625 | /* I2 */ 0x20, /* Note! Ignored. Set always to 0x20 */ \ |
| 626 | /* I3 */ 0x20, /* Note! Ignored. Set always to 0x20 */ \ |
| 627 | /* I4 */ 0xf5, /* Ignored */ \ |
| 628 | /* I5 */ 0x10, \ |
| 629 | /* I6 */ 0x00, \ |
| 630 | /* I7 */ 0x2e, /* I7 MEM config A. Likely to vary between models */ \ |
| 631 | /* I8 */ 0x00, /* I8 MEM config B. Likely to vary between models */ \ |
| 632 | /* I9 */ 0x40 /* Ignored */ \ |
| 633 | } |
| 634 | #endif |
| 635 | |
| 636 | unsigned long flags; |
| 637 | static unsigned char regs[10] = SSCAPE_REGS; |
| 638 | |
| 639 | int i, irq_bits = 0xff; |
| 640 | |
| 641 | if (old_hardware) |
| 642 | { |
| 643 | valid_interrupts = valid_interrupts_old; |
| 644 | conf_printf("Ensoniq SoundScape (old)", hw_config); |
| 645 | } |
| 646 | else |
| 647 | conf_printf("Ensoniq SoundScape", hw_config); |
| 648 | |
| 649 | for (i = 0; i < 4; i++) |
| 650 | { |
| 651 | if (hw_config->irq == valid_interrupts[i]) |
| 652 | { |
| 653 | irq_bits = i; |
| 654 | break; |
| 655 | } |
| 656 | } |
| 657 | if (hw_config->irq > 15 || (regs[4] = irq_bits == 0xff)) |
| 658 | { |
| 659 | printk(KERN_ERR "Invalid IRQ%d\n", hw_config->irq); |
| 660 | release_region(devc->base, 2); |
| 661 | release_region(devc->base + 2, 6); |
| 662 | if (sscape_is_pnp) |
| 663 | release_region(devc->codec, 2); |
| 664 | return; |
| 665 | } |
| 666 | |
| 667 | if (!sscape_is_pnp) { |
| 668 | |
| 669 | spin_lock_irqsave(&devc->lock,flags); |
| 670 | /* Host interrupt enable */ |
| 671 | sscape_write(devc, 1, 0xf0); /* All interrupts enabled */ |
| 672 | /* DMA A status/trigger register */ |
| 673 | sscape_write(devc, 2, 0x20); /* DMA channel disabled */ |
| 674 | /* DMA B status/trigger register */ |
| 675 | sscape_write(devc, 3, 0x20); /* DMA channel disabled */ |
| 676 | /* Host interrupt config reg */ |
| 677 | sscape_write(devc, 4, 0xf0 | (irq_bits << 2) | irq_bits); |
| 678 | /* Don't destroy CD-ROM DMA config bits (0xc0) */ |
| 679 | sscape_write(devc, 5, (regs[5] & 0x3f) | (sscape_read(devc, 5) & 0xc0)); |
| 680 | /* CD-ROM config (WSS codec actually) */ |
| 681 | sscape_write(devc, 6, regs[6]); |
| 682 | sscape_write(devc, 7, regs[7]); |
| 683 | sscape_write(devc, 8, regs[8]); |
| 684 | /* Master control reg. Don't modify CR-ROM bits. Disable SB emul */ |
| 685 | sscape_write(devc, 9, (sscape_read(devc, 9) & 0xf0) | 0x08); |
| 686 | spin_unlock_irqrestore(&devc->lock,flags); |
| 687 | } |
| 688 | #ifdef SSCAPE_DEBUG2 |
| 689 | /* |
| 690 | * Temporary debugging aid. Print contents of the registers after |
| 691 | * changing them. |
| 692 | */ |
| 693 | { |
| 694 | int i; |
| 695 | |
| 696 | for (i = 0; i < 13; i++) |
| 697 | printk("I%d = %02x (new value)\n", i, sscape_read(devc, i)); |
| 698 | } |
| 699 | #endif |
| 700 | |
| 701 | if (probe_mpu401(hw_config, sscape_ports)) |
| 702 | hw_config->always_detect = 1; |
| 703 | hw_config->name = "SoundScape"; |
| 704 | |
| 705 | hw_config->irq *= -1; /* Negative value signals IRQ sharing */ |
| 706 | attach_mpu401(hw_config, THIS_MODULE); |
| 707 | hw_config->irq *= -1; /* Restore it */ |
| 708 | |
| 709 | if (hw_config->slots[1] != -1) /* The MPU driver installed itself */ |
| 710 | { |
| 711 | sscape_mididev = hw_config->slots[1]; |
| 712 | midi_devs[hw_config->slots[1]]->coproc = &sscape_coproc_operations; |
| 713 | } |
| 714 | sscape_write(devc, GA_INTENA_REG, 0x80); /* Master IRQ enable */ |
| 715 | devc->ok = 1; |
| 716 | devc->failed = 0; |
| 717 | } |
| 718 | |
| 719 | static int detect_ga(sscape_info * devc) |
| 720 | { |
| 721 | unsigned char save; |
| 722 | |
| 723 | DDB(printk("Entered Soundscape detect_ga(%x)\n", devc->base)); |
| 724 | |
| 725 | /* |
| 726 | * First check that the address register of "ODIE" is |
| 727 | * there and that it has exactly 4 writable bits. |
| 728 | * First 4 bits |
| 729 | */ |
| 730 | |
| 731 | if ((save = inb(PORT(ODIE_ADDR))) & 0xf0) |
| 732 | { |
| 733 | DDB(printk("soundscape: Detect error A\n")); |
| 734 | return 0; |
| 735 | } |
| 736 | outb((0x00), PORT(ODIE_ADDR)); |
| 737 | if (inb(PORT(ODIE_ADDR)) != 0x00) |
| 738 | { |
| 739 | DDB(printk("soundscape: Detect error B\n")); |
| 740 | return 0; |
| 741 | } |
| 742 | outb((0xff), PORT(ODIE_ADDR)); |
| 743 | if (inb(PORT(ODIE_ADDR)) != 0x0f) |
| 744 | { |
| 745 | DDB(printk("soundscape: Detect error C\n")); |
| 746 | return 0; |
| 747 | } |
| 748 | outb((save), PORT(ODIE_ADDR)); |
| 749 | |
| 750 | /* |
| 751 | * Now verify that some indirect registers return zero on some bits. |
| 752 | * This may break the driver with some future revisions of "ODIE" but... |
| 753 | */ |
| 754 | |
| 755 | if (sscape_read(devc, 0) & 0x0c) |
| 756 | { |
| 757 | DDB(printk("soundscape: Detect error D (%x)\n", sscape_read(devc, 0))); |
| 758 | return 0; |
| 759 | } |
| 760 | if (sscape_read(devc, 1) & 0x0f) |
| 761 | { |
| 762 | DDB(printk("soundscape: Detect error E\n")); |
| 763 | return 0; |
| 764 | } |
| 765 | if (sscape_read(devc, 5) & 0x0f) |
| 766 | { |
| 767 | DDB(printk("soundscape: Detect error F\n")); |
| 768 | return 0; |
| 769 | } |
| 770 | return 1; |
| 771 | } |
| 772 | |
| 773 | static int sscape_read_host_ctrl(sscape_info* devc) |
| 774 | { |
| 775 | return host_read(devc); |
| 776 | } |
| 777 | |
| 778 | static void sscape_write_host_ctrl2(sscape_info *devc, int a, int b) |
| 779 | { |
| 780 | host_command2(devc, a, b); |
| 781 | } |
| 782 | |
| 783 | static int sscape_alloc_dma(sscape_info *devc) |
| 784 | { |
| 785 | char *start_addr, *end_addr; |
| 786 | int dma_pagesize; |
| 787 | int sz, size; |
| 788 | struct page *page; |
| 789 | |
| 790 | if (devc->raw_buf != NULL) return 0; /* Already done */ |
| 791 | dma_pagesize = (devc->dma < 4) ? (64 * 1024) : (128 * 1024); |
| 792 | devc->raw_buf = NULL; |
| 793 | devc->buffsize = 8192*4; |
| 794 | if (devc->buffsize > dma_pagesize) devc->buffsize = dma_pagesize; |
| 795 | start_addr = NULL; |
| 796 | /* |
| 797 | * Now loop until we get a free buffer. Try to get smaller buffer if |
| 798 | * it fails. Don't accept smaller than 8k buffer for performance |
| 799 | * reasons. |
| 800 | */ |
| 801 | while (start_addr == NULL && devc->buffsize > PAGE_SIZE) { |
| 802 | for (sz = 0, size = PAGE_SIZE; size < devc->buffsize; sz++, size <<= 1); |
| 803 | devc->buffsize = PAGE_SIZE * (1 << sz); |
| 804 | start_addr = (char *) __get_free_pages(GFP_ATOMIC|GFP_DMA, sz); |
| 805 | if (start_addr == NULL) devc->buffsize /= 2; |
| 806 | } |
| 807 | |
| 808 | if (start_addr == NULL) { |
| 809 | printk(KERN_ERR "sscape pnp init error: Couldn't allocate DMA buffer\n"); |
| 810 | return 0; |
| 811 | } else { |
| 812 | /* make some checks */ |
| 813 | end_addr = start_addr + devc->buffsize - 1; |
| 814 | /* now check if it fits into the same dma-pagesize */ |
| 815 | |
| 816 | if (((long) start_addr & ~(dma_pagesize - 1)) != ((long) end_addr & ~(dma_pagesize - 1)) |
| 817 | || end_addr >= (char *) (MAX_DMA_ADDRESS)) { |
| 818 | printk(KERN_ERR "sscape pnp: Got invalid address 0x%lx for %db DMA-buffer\n", (long) start_addr, devc->buffsize); |
| 819 | return 0; |
| 820 | } |
| 821 | } |
| 822 | devc->raw_buf = start_addr; |
| 823 | devc->raw_buf_phys = virt_to_bus(start_addr); |
| 824 | |
| 825 | for (page = virt_to_page(start_addr); page <= virt_to_page(end_addr); page++) |
| 826 | SetPageReserved(page); |
| 827 | return 1; |
| 828 | } |
| 829 | |
| 830 | static void sscape_free_dma(sscape_info *devc) |
| 831 | { |
| 832 | int sz, size; |
| 833 | unsigned long start_addr, end_addr; |
| 834 | struct page *page; |
| 835 | |
| 836 | if (devc->raw_buf == NULL) return; |
| 837 | for (sz = 0, size = PAGE_SIZE; size < devc->buffsize; sz++, size <<= 1); |
| 838 | start_addr = (unsigned long) devc->raw_buf; |
| 839 | end_addr = start_addr + devc->buffsize; |
| 840 | |
| 841 | for (page = virt_to_page(start_addr); page <= virt_to_page(end_addr); page++) |
| 842 | ClearPageReserved(page); |
| 843 | |
| 844 | free_pages((unsigned long) devc->raw_buf, sz); |
| 845 | devc->raw_buf = NULL; |
| 846 | } |
| 847 | |
| 848 | /* Intel version !!!!!!!!! */ |
| 849 | |
| 850 | static int sscape_start_dma(int chan, unsigned long physaddr, int count, int dma_mode) |
| 851 | { |
| 852 | unsigned long flags; |
| 853 | |
| 854 | flags = claim_dma_lock(); |
| 855 | disable_dma(chan); |
| 856 | clear_dma_ff(chan); |
| 857 | set_dma_mode(chan, dma_mode); |
| 858 | set_dma_addr(chan, physaddr); |
| 859 | set_dma_count(chan, count); |
| 860 | enable_dma(chan); |
| 861 | release_dma_lock(flags); |
| 862 | return 0; |
| 863 | } |
| 864 | |
| 865 | static void sscape_pnp_start_dma(sscape_info* devc, int arg ) |
| 866 | { |
| 867 | int reg; |
| 868 | if (arg == 0) reg = 2; |
| 869 | else reg = 3; |
| 870 | |
| 871 | sscape_write(devc, reg, sscape_read( devc, reg) | 0x01); |
| 872 | sscape_write(devc, reg, sscape_read( devc, reg) & 0xFE); |
| 873 | } |
| 874 | |
| 875 | static int sscape_pnp_wait_dma (sscape_info* devc, int arg ) |
| 876 | { |
| 877 | int reg; |
| 878 | unsigned long i; |
| 879 | unsigned char d; |
| 880 | |
| 881 | if (arg == 0) reg = 2; |
| 882 | else reg = 3; |
| 883 | |
| 884 | sleep ( 1 ); |
| 885 | i = 0; |
| 886 | do { |
| 887 | d = sscape_read(devc, reg) & 1; |
| 888 | if ( d == 1) break; |
| 889 | i++; |
| 890 | } while (i < 500000); |
| 891 | d = sscape_read(devc, reg) & 1; |
| 892 | return d; |
| 893 | } |
| 894 | |
| 895 | static int sscape_pnp_alloc_dma(sscape_info* devc) |
| 896 | { |
| 897 | /* printk(KERN_INFO "sscape: requesting dma\n"); */ |
| 898 | if (request_dma(devc -> dma, "sscape")) return 0; |
| 899 | /* printk(KERN_INFO "sscape: dma channel allocated\n"); */ |
| 900 | if (!sscape_alloc_dma(devc)) { |
| 901 | free_dma(devc -> dma); |
| 902 | return 0; |
| 903 | }; |
| 904 | return 1; |
| 905 | } |
| 906 | |
| 907 | static void sscape_pnp_free_dma(sscape_info* devc) |
| 908 | { |
| 909 | sscape_free_dma( devc); |
| 910 | free_dma(devc -> dma ); |
| 911 | /* printk(KERN_INFO "sscape: dma released\n"); */ |
| 912 | } |
| 913 | |
| 914 | static int sscape_pnp_upload_file(sscape_info* devc, char* fn) |
| 915 | { |
| 916 | int done = 0; |
| 917 | int timeout_val; |
| 918 | char* data,*dt; |
| 919 | int len,l; |
| 920 | unsigned long flags; |
| 921 | |
| 922 | sscape_write( devc, 9, sscape_read(devc, 9 ) & 0x3F ); |
| 923 | sscape_write( devc, 2, (devc -> dma << 4) | 0x80 ); |
| 924 | sscape_write( devc, 3, 0x20 ); |
| 925 | sscape_write( devc, 9, sscape_read( devc, 9 ) | 0x80 ); |
| 926 | |
| 927 | len = mod_firmware_load(fn, &data); |
| 928 | if (len == 0) { |
| 929 | printk(KERN_ERR "sscape: file not found: %s\n", fn); |
| 930 | return 0; |
| 931 | } |
| 932 | dt = data; |
| 933 | spin_lock_irqsave(&devc->lock,flags); |
| 934 | while ( len > 0 ) { |
| 935 | if (len > devc -> buffsize) l = devc->buffsize; |
| 936 | else l = len; |
| 937 | len -= l; |
| 938 | memcpy(devc->raw_buf, dt, l); dt += l; |
| 939 | sscape_start_dma(devc->dma, devc->raw_buf_phys, l, 0x48); |
| 940 | sscape_pnp_start_dma ( devc, 0 ); |
| 941 | if (sscape_pnp_wait_dma ( devc, 0 ) == 0) { |
| 942 | spin_unlock_irqrestore(&devc->lock,flags); |
| 943 | return 0; |
| 944 | } |
| 945 | } |
| 946 | |
| 947 | spin_unlock_irqrestore(&devc->lock,flags); |
| 948 | vfree(data); |
| 949 | |
| 950 | outb(0, devc -> base + 2); |
| 951 | outb(0, devc -> base); |
| 952 | |
| 953 | sscape_write ( devc, 9, sscape_read( devc, 9 ) | 0x40); |
| 954 | |
| 955 | timeout_val = 5 * HZ; |
| 956 | while (!done && timeout_val-- > 0) |
| 957 | { |
| 958 | unsigned char x; |
| 959 | sleep(1); |
| 960 | x = inb( devc -> base + 3); |
| 961 | if (x == 0xff || x == 0xfe) /* OBP startup acknowledge */ |
| 962 | { |
| 963 | //printk(KERN_ERR "Soundscape: Acknowledge = %x\n", x); |
| 964 | done = 1; |
| 965 | } |
| 966 | } |
| 967 | timeout_val = 5 * HZ; |
| 968 | done = 0; |
| 969 | while (!done && timeout_val-- > 0) |
| 970 | { |
| 971 | unsigned char x; |
| 972 | sleep(1); |
| 973 | x = inb( devc -> base + 3); |
| 974 | if (x == 0xfe) /* OBP startup acknowledge */ |
| 975 | { |
| 976 | //printk(KERN_ERR "Soundscape: Acknowledge = %x\n", x); |
| 977 | done = 1; |
| 978 | } |
| 979 | } |
| 980 | |
| 981 | if ( !done ) printk(KERN_ERR "soundscape: OBP Initialization failed.\n"); |
| 982 | |
| 983 | sscape_write( devc, 2, devc->ic_type == IC_ODIE ? 0x70 : 0x40); |
| 984 | sscape_write( devc, 3, (devc -> dma << 4) + 0x80); |
| 985 | return 1; |
| 986 | } |
| 987 | |
| 988 | static void __init sscape_pnp_init_hw(sscape_info* devc) |
| 989 | { |
| 990 | unsigned char midi_irq = 0, sb_irq = 0; |
| 991 | unsigned i; |
| 992 | static char code_file_name[23] = "/sndscape/sndscape.cox"; |
| 993 | |
| 994 | int sscape_sb_enable = 0; |
| 995 | int sscape_joystic_enable = 0x7f; |
| 996 | int sscape_mic_enable = 0; |
| 997 | int sscape_ext_midi = 0; |
| 998 | |
| 999 | if ( !sscape_pnp_alloc_dma(devc) ) { |
| 1000 | printk(KERN_ERR "sscape: faild to allocate dma\n"); |
| 1001 | return; |
| 1002 | } |
| 1003 | |
| 1004 | for (i = 0; i < 4; i++) { |
| 1005 | if ( devc -> irq == valid_interrupts[i] ) |
| 1006 | midi_irq = i; |
| 1007 | if ( devc -> codec_irq == valid_interrupts[i] ) |
| 1008 | sb_irq = i; |
| 1009 | } |
| 1010 | |
| 1011 | sscape_write( devc, 5, 0x50); |
| 1012 | sscape_write( devc, 7, 0x2e); |
| 1013 | sscape_write( devc, 8, 0x00); |
| 1014 | |
| 1015 | sscape_write( devc, 2, devc->ic_type == IC_ODIE ? 0x70 : 0x40); |
| 1016 | sscape_write( devc, 3, ( devc -> dma << 4) | 0x80); |
| 1017 | |
| 1018 | if ( sscape_sb_enable ) |
| 1019 | sscape_write (devc, 4, 0xF0 | (sb_irq << 2) | midi_irq); |
| 1020 | else |
| 1021 | sscape_write (devc, 4, 0xF0 | (midi_irq<<2) | midi_irq); |
| 1022 | |
| 1023 | i = 0x10; //sscape_read(devc, 9) & (devc->ic_type == IC_ODIE ? 0xf0 : 0xc0); |
| 1024 | if ( sscape_sb_enable ) |
| 1025 | i |= devc->ic_type == IC_ODIE ? 0x05 : 0x07; |
| 1026 | if (sscape_joystic_enable) i |= 8; |
| 1027 | |
| 1028 | sscape_write (devc, 9, i); |
| 1029 | sscape_write (devc, 6, 0x80); |
| 1030 | sscape_write (devc, 1, 0x80); |
| 1031 | |
| 1032 | if (devc -> codec_type == 2) { |
| 1033 | sscape_pnp_write_codec( devc, 0x0C, 0x50); |
| 1034 | sscape_pnp_write_codec( devc, 0x10, sscape_pnp_read_codec( devc, 0x10) & 0x3F); |
| 1035 | sscape_pnp_write_codec( devc, 0x11, sscape_pnp_read_codec( devc, 0x11) | 0xC0); |
| 1036 | sscape_pnp_write_codec( devc, 29, 0x20); |
| 1037 | } |
| 1038 | |
| 1039 | if (sscape_pnp_upload_file(devc, "/sndscape/scope.cod") == 0 ) { |
| 1040 | printk(KERN_ERR "sscape: faild to upload file /sndscape/scope.cod\n"); |
| 1041 | sscape_pnp_free_dma(devc); |
| 1042 | return; |
| 1043 | } |
| 1044 | |
| 1045 | i = sscape_read_host_ctrl( devc ); |
| 1046 | |
| 1047 | if ( (i & 0x0F) > 7 ) { |
| 1048 | printk(KERN_ERR "sscape: scope.cod faild\n"); |
| 1049 | sscape_pnp_free_dma(devc); |
| 1050 | return; |
| 1051 | } |
| 1052 | if ( i & 0x10 ) sscape_write( devc, 7, 0x2F); |
| 1053 | code_file_name[21] = (char) ( i & 0x0F) + 0x30; |
| 1054 | if (sscape_pnp_upload_file( devc, code_file_name) == 0) { |
| 1055 | printk(KERN_ERR "sscape: faild to upload file %s\n", code_file_name); |
| 1056 | sscape_pnp_free_dma(devc); |
| 1057 | return; |
| 1058 | } |
| 1059 | |
| 1060 | if (devc->ic_type != IC_ODIE) { |
| 1061 | sscape_pnp_write_codec( devc, 10, (sscape_pnp_read_codec(devc, 10) & 0x7f) | |
| 1062 | ( sscape_mic_enable == 0 ? 0x00 : 0x80) ); |
| 1063 | } |
| 1064 | sscape_write_host_ctrl2( devc, 0x84, 0x64 ); /* MIDI volume */ |
| 1065 | sscape_write_host_ctrl2( devc, 0x86, 0x64 ); /* MIDI volume?? */ |
| 1066 | sscape_write_host_ctrl2( devc, 0x8A, sscape_ext_midi); |
| 1067 | |
| 1068 | sscape_pnp_write_codec ( devc, 6, 0x3f ); //WAV_VOL |
| 1069 | sscape_pnp_write_codec ( devc, 7, 0x3f ); //WAV_VOL |
| 1070 | sscape_pnp_write_codec ( devc, 2, 0x1F ); //WD_CDXVOLL |
| 1071 | sscape_pnp_write_codec ( devc, 3, 0x1F ); //WD_CDXVOLR |
| 1072 | |
| 1073 | if (devc -> codec_type == 1) { |
| 1074 | sscape_pnp_write_codec ( devc, 4, 0x1F ); |
| 1075 | sscape_pnp_write_codec ( devc, 5, 0x1F ); |
| 1076 | sscape_write_host_ctrl2( devc, 0x88, sscape_mic_enable); |
| 1077 | } else { |
| 1078 | int t; |
| 1079 | sscape_pnp_write_codec ( devc, 0x10, 0x1F << 1); |
| 1080 | sscape_pnp_write_codec ( devc, 0x11, 0xC0 | (0x1F << 1)); |
| 1081 | |
| 1082 | t = sscape_pnp_read_codec( devc, 0x00) & 0xDF; |
| 1083 | if ( (sscape_mic_enable == 0)) t |= 0; |
| 1084 | else t |= 0x20; |
| 1085 | sscape_pnp_write_codec ( devc, 0x00, t); |
| 1086 | t = sscape_pnp_read_codec( devc, 0x01) & 0xDF; |
| 1087 | if ( (sscape_mic_enable == 0) ) t |= 0; |
| 1088 | else t |= 0x20; |
| 1089 | sscape_pnp_write_codec ( devc, 0x01, t); |
| 1090 | sscape_pnp_write_codec ( devc, 0x40 | 29 , 0x20); |
| 1091 | outb(0, devc -> codec); |
| 1092 | } |
| 1093 | if (devc -> ic_type == IC_OPUS ) { |
| 1094 | int i = sscape_read( devc, 9 ); |
| 1095 | sscape_write( devc, 9, i | 3 ); |
| 1096 | sscape_write( devc, 3, 0x40); |
| 1097 | |
| 1098 | if (request_region(0x228, 1, "sscape setup junk")) { |
| 1099 | outb(0, 0x228); |
| 1100 | release_region(0x228,1); |
| 1101 | } |
| 1102 | sscape_write( devc, 3, (devc -> dma << 4) | 0x80); |
| 1103 | sscape_write( devc, 9, i ); |
| 1104 | } |
| 1105 | |
| 1106 | host_close ( devc ); |
| 1107 | sscape_pnp_free_dma(devc); |
| 1108 | } |
| 1109 | |
| 1110 | static int __init detect_sscape_pnp(sscape_info* devc) |
| 1111 | { |
| 1112 | long i, irq_bits = 0xff; |
| 1113 | unsigned int d; |
| 1114 | |
| 1115 | DDB(printk("Entered detect_sscape_pnp(%x)\n", devc->base)); |
| 1116 | |
| 1117 | if (!request_region(devc->codec, 2, "sscape codec")) { |
| 1118 | printk(KERN_ERR "detect_sscape_pnp: port %x is not free\n", devc->codec); |
| 1119 | return 0; |
| 1120 | } |
| 1121 | |
| 1122 | if ((inb(devc->base + 2) & 0x78) != 0) |
| 1123 | goto fail; |
| 1124 | |
| 1125 | d = inb ( devc -> base + 4) & 0xF0; |
| 1126 | if (d & 0x80) |
| 1127 | goto fail; |
| 1128 | |
| 1129 | if (d == 0) { |
| 1130 | devc->codec_type = 1; |
| 1131 | devc->ic_type = IC_ODIE; |
| 1132 | } else if ( (d & 0x60) != 0) { |
| 1133 | devc->codec_type = 2; |
| 1134 | devc->ic_type = IC_OPUS; |
| 1135 | } else if ( (d & 0x40) != 0) { /* WTF? */ |
| 1136 | devc->codec_type = 2; |
| 1137 | devc->ic_type = IC_ODIE; |
| 1138 | } else |
| 1139 | goto fail; |
| 1140 | |
| 1141 | sscape_is_pnp = 1; |
| 1142 | |
| 1143 | outb(0xFA, devc -> base+4); |
| 1144 | if ((inb( devc -> base+4) & 0x9F) != 0x0A) |
| 1145 | goto fail; |
| 1146 | outb(0xFE, devc -> base+4); |
| 1147 | if ( (inb(devc -> base+4) & 0x9F) != 0x0E) |
| 1148 | goto fail; |
| 1149 | if ( (inb(devc -> base+5) & 0x9F) != 0x0E) |
| 1150 | goto fail; |
| 1151 | |
| 1152 | if (devc->codec_type == 2) { |
| 1153 | if (devc->codec != devc->base + 8) { |
| 1154 | printk("soundscape warning: incorrect codec port specified\n"); |
| 1155 | goto fail; |
| 1156 | } |
| 1157 | d = 0x10 | (sscape_read(devc, 9) & 0xCF); |
| 1158 | sscape_write(devc, 9, d); |
| 1159 | sscape_write(devc, 6, 0x80); |
| 1160 | } else { |
| 1161 | //todo: check codec is not base + 8 |
| 1162 | } |
| 1163 | |
| 1164 | d = (sscape_read(devc, 9) & 0x3F) | 0xC0; |
| 1165 | sscape_write(devc, 9, d); |
| 1166 | |
| 1167 | for (i = 0; i < 550000; i++) |
| 1168 | if ( !(inb(devc -> codec) & 0x80) ) break; |
| 1169 | |
| 1170 | d = inb(devc -> codec); |
| 1171 | if (d & 0x80) |
| 1172 | goto fail; |
| 1173 | if ( inb(devc -> codec + 2) == 0xFF) |
| 1174 | goto fail; |
| 1175 | |
| 1176 | sscape_write(devc, 9, sscape_read(devc, 9) & 0x3F ); |
| 1177 | |
| 1178 | d = inb(devc -> codec) & 0x80; |
| 1179 | if ( d == 0) { |
| 1180 | printk(KERN_INFO "soundscape: hardware detected\n"); |
| 1181 | valid_interrupts = valid_interrupts_new; |
| 1182 | } else { |
| 1183 | printk(KERN_INFO "soundscape: board looks like media fx\n"); |
| 1184 | valid_interrupts = valid_interrupts_old; |
| 1185 | old_hardware = 1; |
| 1186 | } |
| 1187 | |
| 1188 | sscape_write( devc, 9, 0xC0 | (sscape_read(devc, 9) & 0x3F) ); |
| 1189 | |
| 1190 | for (i = 0; i < 550000; i++) |
| 1191 | if ( !(inb(devc -> codec) & 0x80)) |
| 1192 | break; |
| 1193 | |
| 1194 | sscape_pnp_init_hw(devc); |
| 1195 | |
| 1196 | for (i = 0; i < 4; i++) |
| 1197 | { |
| 1198 | if (devc->codec_irq == valid_interrupts[i]) { |
| 1199 | irq_bits = i; |
| 1200 | break; |
| 1201 | } |
| 1202 | } |
| 1203 | sscape_write(devc, GA_INTENA_REG, 0x00); |
| 1204 | sscape_write(devc, GA_DMACFG_REG, 0x50); |
| 1205 | sscape_write(devc, GA_DMAA_REG, 0x70); |
| 1206 | sscape_write(devc, GA_DMAB_REG, 0x20); |
| 1207 | sscape_write(devc, GA_INTCFG_REG, 0xf0); |
| 1208 | sscape_write(devc, GA_CDCFG_REG, 0x89 | (devc->dma << 4) | (irq_bits << 1)); |
| 1209 | |
| 1210 | sscape_pnp_write_codec( devc, 0, sscape_pnp_read_codec( devc, 0) | 0x20); |
| 1211 | sscape_pnp_write_codec( devc, 0, sscape_pnp_read_codec( devc, 1) | 0x20); |
| 1212 | |
| 1213 | return 1; |
| 1214 | fail: |
| 1215 | release_region(devc->codec, 2); |
| 1216 | return 0; |
| 1217 | } |
| 1218 | |
| 1219 | static int __init probe_sscape(struct address_info *hw_config) |
| 1220 | { |
| 1221 | devc->base = hw_config->io_base; |
| 1222 | devc->irq = hw_config->irq; |
| 1223 | devc->dma = hw_config->dma; |
| 1224 | devc->osp = hw_config->osp; |
| 1225 | |
| 1226 | #ifdef SSCAPE_DEBUG1 |
| 1227 | /* |
| 1228 | * Temporary debugging aid. Print contents of the registers before |
| 1229 | * changing them. |
| 1230 | */ |
| 1231 | { |
| 1232 | int i; |
| 1233 | |
| 1234 | for (i = 0; i < 13; i++) |
| 1235 | printk("I%d = %02x (old value)\n", i, sscape_read(devc, i)); |
| 1236 | } |
| 1237 | #endif |
| 1238 | devc->failed = 1; |
| 1239 | |
| 1240 | sscape_ports = request_region(devc->base, 2, "mpu401"); |
| 1241 | if (!sscape_ports) |
| 1242 | return 0; |
| 1243 | |
| 1244 | if (!request_region(devc->base + 2, 6, "SoundScape")) { |
| 1245 | release_region(devc->base, 2); |
| 1246 | return 0; |
| 1247 | } |
| 1248 | |
| 1249 | if (!detect_ga(devc)) { |
| 1250 | if (detect_sscape_pnp(devc)) |
| 1251 | return 1; |
| 1252 | release_region(devc->base, 2); |
| 1253 | release_region(devc->base + 2, 6); |
| 1254 | return 0; |
| 1255 | } |
| 1256 | |
| 1257 | if (old_hardware) /* Check that it's really an old Spea/Reveal card. */ |
| 1258 | { |
| 1259 | unsigned char tmp; |
| 1260 | int cc; |
| 1261 | |
| 1262 | if (!((tmp = sscape_read(devc, GA_HMCTL_REG)) & 0xc0)) |
| 1263 | { |
| 1264 | sscape_write(devc, GA_HMCTL_REG, tmp | 0x80); |
| 1265 | for (cc = 0; cc < 200000; ++cc) |
| 1266 | inb(devc->base + ODIE_ADDR); |
| 1267 | } |
| 1268 | } |
| 1269 | return 1; |
| 1270 | } |
| 1271 | |
| 1272 | static int __init init_ss_ms_sound(struct address_info *hw_config) |
| 1273 | { |
| 1274 | int i, irq_bits = 0xff; |
| 1275 | int ad_flags = 0; |
| 1276 | struct resource *ports; |
| 1277 | |
| 1278 | if (devc->failed) |
| 1279 | { |
| 1280 | printk(KERN_ERR "soundscape: Card not detected\n"); |
| 1281 | return 0; |
| 1282 | } |
| 1283 | if (devc->ok == 0) |
| 1284 | { |
| 1285 | printk(KERN_ERR "soundscape: Invalid initialization order.\n"); |
| 1286 | return 0; |
| 1287 | } |
| 1288 | for (i = 0; i < 4; i++) |
| 1289 | { |
| 1290 | if (hw_config->irq == valid_interrupts[i]) |
| 1291 | { |
| 1292 | irq_bits = i; |
| 1293 | break; |
| 1294 | } |
| 1295 | } |
| 1296 | if (irq_bits == 0xff) { |
| 1297 | printk(KERN_ERR "soundscape: Invalid MSS IRQ%d\n", hw_config->irq); |
| 1298 | return 0; |
| 1299 | } |
| 1300 | |
| 1301 | if (old_hardware) |
| 1302 | ad_flags = 0x12345677; /* Tell that we may have a CS4248 chip (Spea-V7 Media FX) */ |
| 1303 | else if (sscape_is_pnp) |
| 1304 | ad_flags = 0x87654321; /* Tell that we have a soundscape pnp with 1845 chip */ |
| 1305 | |
| 1306 | ports = request_region(hw_config->io_base, 4, "ad1848"); |
| 1307 | if (!ports) { |
| 1308 | printk(KERN_ERR "soundscape: ports busy\n"); |
| 1309 | return 0; |
| 1310 | } |
| 1311 | |
| 1312 | if (!ad1848_detect(ports, &ad_flags, hw_config->osp)) { |
| 1313 | release_region(hw_config->io_base, 4); |
| 1314 | return 0; |
| 1315 | } |
| 1316 | |
| 1317 | if (!sscape_is_pnp) /*pnp is already setup*/ |
| 1318 | { |
| 1319 | /* |
| 1320 | * Setup the DMA polarity. |
| 1321 | */ |
| 1322 | sscape_write(devc, GA_DMACFG_REG, 0x50); |
| 1323 | |
| 1324 | /* |
| 1325 | * Take the gate-array off of the DMA channel. |
| 1326 | */ |
| 1327 | sscape_write(devc, GA_DMAB_REG, 0x20); |
| 1328 | |
| 1329 | /* |
| 1330 | * Init the AD1848 (CD-ROM) config reg. |
| 1331 | */ |
| 1332 | sscape_write(devc, GA_CDCFG_REG, 0x89 | (hw_config->dma << 4) | (irq_bits << 1)); |
| 1333 | } |
| 1334 | |
| 1335 | if (hw_config->irq == devc->irq) |
| 1336 | printk(KERN_WARNING "soundscape: Warning! The WSS mode can't share IRQ with MIDI\n"); |
| 1337 | |
| 1338 | hw_config->slots[0] = ad1848_init( |
| 1339 | sscape_is_pnp ? "SoundScape" : "SoundScape PNP", |
| 1340 | ports, |
| 1341 | hw_config->irq, |
| 1342 | hw_config->dma, |
| 1343 | hw_config->dma, |
| 1344 | 0, |
| 1345 | devc->osp, |
| 1346 | THIS_MODULE); |
| 1347 | |
| 1348 | |
| 1349 | if (hw_config->slots[0] != -1) /* The AD1848 driver installed itself */ |
| 1350 | { |
| 1351 | audio_devs[hw_config->slots[0]]->coproc = &sscape_coproc_operations; |
| 1352 | devc->codec_audiodev = hw_config->slots[0]; |
| 1353 | devc->my_audiodev = hw_config->slots[0]; |
| 1354 | |
| 1355 | /* Set proper routings here (what are they) */ |
| 1356 | AD1848_REROUTE(SOUND_MIXER_LINE1, SOUND_MIXER_LINE); |
| 1357 | } |
| 1358 | |
| 1359 | #ifdef SSCAPE_DEBUG5 |
| 1360 | /* |
| 1361 | * Temporary debugging aid. Print contents of the registers |
| 1362 | * after the AD1848 device has been initialized. |
| 1363 | */ |
| 1364 | { |
| 1365 | int i; |
| 1366 | |
| 1367 | for (i = 0; i < 13; i++) |
| 1368 | printk("I%d = %02x\n", i, sscape_read(devc, i)); |
| 1369 | } |
| 1370 | #endif |
| 1371 | return 1; |
| 1372 | } |
| 1373 | |
| 1374 | static void __exit unload_sscape(struct address_info *hw_config) |
| 1375 | { |
| 1376 | release_region(devc->base + 2, 6); |
| 1377 | unload_mpu401(hw_config); |
| 1378 | if (sscape_is_pnp) |
| 1379 | release_region(devc->codec, 2); |
| 1380 | } |
| 1381 | |
| 1382 | static void __exit unload_ss_ms_sound(struct address_info *hw_config) |
| 1383 | { |
| 1384 | ad1848_unload(hw_config->io_base, |
| 1385 | hw_config->irq, |
| 1386 | devc->dma, |
| 1387 | devc->dma, |
| 1388 | 0); |
| 1389 | sound_unload_audiodev(hw_config->slots[0]); |
| 1390 | } |
| 1391 | |
| 1392 | static struct address_info cfg; |
| 1393 | static struct address_info cfg_mpu; |
| 1394 | |
| 1395 | static int __initdata spea = -1; |
| 1396 | static int mss = 0; |
| 1397 | static int __initdata dma = -1; |
| 1398 | static int __initdata irq = -1; |
| 1399 | static int __initdata io = -1; |
| 1400 | static int __initdata mpu_irq = -1; |
| 1401 | static int __initdata mpu_io = -1; |
| 1402 | |
| 1403 | module_param(dma, int, 0); |
| 1404 | module_param(irq, int, 0); |
| 1405 | module_param(io, int, 0); |
| 1406 | module_param(spea, int, 0); /* spea=0/1 set the old_hardware */ |
| 1407 | module_param(mpu_irq, int, 0); |
| 1408 | module_param(mpu_io, int, 0); |
| 1409 | module_param(mss, int, 0); |
| 1410 | |
| 1411 | static int __init init_sscape(void) |
| 1412 | { |
| 1413 | printk(KERN_INFO "Soundscape driver Copyright (C) by Hannu Savolainen 1993-1996\n"); |
| 1414 | |
| 1415 | cfg.irq = irq; |
| 1416 | cfg.dma = dma; |
| 1417 | cfg.io_base = io; |
| 1418 | |
| 1419 | cfg_mpu.irq = mpu_irq; |
| 1420 | cfg_mpu.io_base = mpu_io; |
| 1421 | /* WEH - Try to get right dma channel */ |
| 1422 | cfg_mpu.dma = dma; |
| 1423 | |
| 1424 | devc->codec = cfg.io_base; |
| 1425 | devc->codec_irq = cfg.irq; |
| 1426 | devc->codec_type = 0; |
| 1427 | devc->ic_type = 0; |
| 1428 | devc->raw_buf = NULL; |
| 1429 | spin_lock_init(&devc->lock); |
| 1430 | |
| 1431 | if (cfg.dma == -1 || cfg.irq == -1 || cfg.io_base == -1) { |
| 1432 | printk(KERN_ERR "DMA, IRQ, and IO port must be specified.\n"); |
| 1433 | return -EINVAL; |
| 1434 | } |
| 1435 | |
| 1436 | if (cfg_mpu.irq == -1 && cfg_mpu.io_base != -1) { |
| 1437 | printk(KERN_ERR "MPU_IRQ must be specified if MPU_IO is set.\n"); |
| 1438 | return -EINVAL; |
| 1439 | } |
| 1440 | |
| 1441 | if(spea != -1) { |
| 1442 | old_hardware = spea; |
| 1443 | printk(KERN_INFO "Forcing %s hardware support.\n", |
| 1444 | spea?"new":"old"); |
| 1445 | } |
| 1446 | if (probe_sscape(&cfg_mpu) == 0) |
| 1447 | return -ENODEV; |
| 1448 | |
| 1449 | attach_sscape(&cfg_mpu); |
| 1450 | |
| 1451 | mss = init_ss_ms_sound(&cfg); |
| 1452 | |
| 1453 | return 0; |
| 1454 | } |
| 1455 | |
| 1456 | static void __exit cleanup_sscape(void) |
| 1457 | { |
| 1458 | if (mss) |
| 1459 | unload_ss_ms_sound(&cfg); |
| 1460 | unload_sscape(&cfg_mpu); |
| 1461 | } |
| 1462 | |
| 1463 | module_init(init_sscape); |
| 1464 | module_exit(cleanup_sscape); |
| 1465 | |
| 1466 | #ifndef MODULE |
| 1467 | static int __init setup_sscape(char *str) |
| 1468 | { |
| 1469 | /* io, irq, dma, mpu_io, mpu_irq */ |
| 1470 | int ints[6]; |
| 1471 | |
| 1472 | str = get_options(str, ARRAY_SIZE(ints), ints); |
| 1473 | |
| 1474 | io = ints[1]; |
| 1475 | irq = ints[2]; |
| 1476 | dma = ints[3]; |
| 1477 | mpu_io = ints[4]; |
| 1478 | mpu_irq = ints[5]; |
| 1479 | |
| 1480 | return 1; |
| 1481 | } |
| 1482 | |
| 1483 | __setup("sscape=", setup_sscape); |
| 1484 | #endif |
| 1485 | MODULE_LICENSE("GPL"); |