Alex Chiang | 78f1699 | 2009-12-20 12:19:09 -0700 | [diff] [blame] | 1 | #include <linux/dmi.h> |
| 2 | |
| 3 | #include <acpi/acpi_drivers.h> |
| 4 | #include <acpi/processor.h> |
| 5 | |
| 6 | #include "internal.h" |
| 7 | |
| 8 | #define PREFIX "ACPI: " |
| 9 | #define _COMPONENT ACPI_PROCESSOR_COMPONENT |
| 10 | ACPI_MODULE_NAME("processor_pdc"); |
| 11 | |
| 12 | static int set_no_mwait(const struct dmi_system_id *id) |
| 13 | { |
| 14 | printk(KERN_NOTICE PREFIX "%s detected - " |
| 15 | "disabling mwait for CPU C-states\n", id->ident); |
| 16 | idle_nomwait = 1; |
| 17 | return 0; |
| 18 | } |
| 19 | |
| 20 | static struct dmi_system_id __cpuinitdata processor_idle_dmi_table[] = { |
| 21 | { |
| 22 | set_no_mwait, "IFL91 board", { |
| 23 | DMI_MATCH(DMI_BIOS_VENDOR, "COMPAL"), |
| 24 | DMI_MATCH(DMI_SYS_VENDOR, "ZEPTO"), |
| 25 | DMI_MATCH(DMI_PRODUCT_VERSION, "3215W"), |
| 26 | DMI_MATCH(DMI_BOARD_NAME, "IFL91") }, NULL}, |
| 27 | { |
| 28 | set_no_mwait, "Extensa 5220", { |
| 29 | DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"), |
| 30 | DMI_MATCH(DMI_SYS_VENDOR, "Acer"), |
| 31 | DMI_MATCH(DMI_PRODUCT_VERSION, "0100"), |
| 32 | DMI_MATCH(DMI_BOARD_NAME, "Columbia") }, NULL}, |
| 33 | {}, |
| 34 | }; |
| 35 | |
| 36 | /* |
| 37 | * _PDC is required for a BIOS-OS handshake for most of the newer |
| 38 | * ACPI processor features. |
| 39 | */ |
| 40 | static int acpi_processor_eval_pdc(struct acpi_processor *pr) |
| 41 | { |
| 42 | struct acpi_object_list *pdc_in = pr->pdc; |
| 43 | acpi_status status = AE_OK; |
| 44 | |
| 45 | if (!pdc_in) |
| 46 | return status; |
| 47 | if (idle_nomwait) { |
| 48 | /* |
| 49 | * If mwait is disabled for CPU C-states, the C2C3_FFH access |
| 50 | * mode will be disabled in the parameter of _PDC object. |
| 51 | * Of course C1_FFH access mode will also be disabled. |
| 52 | */ |
| 53 | union acpi_object *obj; |
| 54 | u32 *buffer = NULL; |
| 55 | |
| 56 | obj = pdc_in->pointer; |
| 57 | buffer = (u32 *)(obj->buffer.pointer); |
| 58 | buffer[2] &= ~(ACPI_PDC_C_C2C3_FFH | ACPI_PDC_C_C1_FFH); |
| 59 | |
| 60 | } |
| 61 | status = acpi_evaluate_object(pr->handle, "_PDC", pdc_in, NULL); |
| 62 | |
| 63 | if (ACPI_FAILURE(status)) |
| 64 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
| 65 | "Could not evaluate _PDC, using legacy perf. control.\n")); |
| 66 | |
| 67 | return status; |
| 68 | } |
| 69 | |
| 70 | void acpi_processor_set_pdc(struct acpi_processor *pr) |
| 71 | { |
Alex Chiang | 1d9cb47 | 2009-12-20 12:19:14 -0700 | [diff] [blame^] | 72 | if (arch_has_acpi_pdc() == false) |
| 73 | return; |
| 74 | |
Alex Chiang | 78f1699 | 2009-12-20 12:19:09 -0700 | [diff] [blame] | 75 | arch_acpi_processor_init_pdc(pr); |
| 76 | acpi_processor_eval_pdc(pr); |
| 77 | arch_acpi_processor_cleanup_pdc(pr); |
| 78 | } |
| 79 | EXPORT_SYMBOL_GPL(acpi_processor_set_pdc); |
| 80 | |
| 81 | static acpi_status |
| 82 | early_init_pdc(acpi_handle handle, u32 lvl, void *context, void **rv) |
| 83 | { |
| 84 | struct acpi_processor pr; |
| 85 | |
| 86 | pr.handle = handle; |
| 87 | |
| 88 | /* x86 implementation looks at pr.id to determine some |
| 89 | * CPU capabilites. We can just hard code to 0 since we're |
| 90 | * assuming the CPUs in the system are homogenous and all |
| 91 | * have the same capabilities. |
| 92 | */ |
| 93 | pr.id = 0; |
| 94 | |
| 95 | acpi_processor_set_pdc(&pr); |
| 96 | |
| 97 | return AE_OK; |
| 98 | } |
| 99 | |
| 100 | void acpi_early_processor_set_pdc(void) |
| 101 | { |
| 102 | /* |
| 103 | * Check whether the system is DMI table. If yes, OSPM |
| 104 | * should not use mwait for CPU-states. |
| 105 | */ |
| 106 | dmi_check_system(processor_idle_dmi_table); |
| 107 | |
| 108 | acpi_walk_namespace(ACPI_TYPE_PROCESSOR, ACPI_ROOT_OBJECT, |
| 109 | ACPI_UINT32_MAX, |
| 110 | early_init_pdc, NULL, NULL, NULL); |
| 111 | } |