Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame^] | 1 | Kernel driver i2c-piix4 |
| 2 | |
| 3 | Supported adapters: |
| 4 | * Intel 82371AB PIIX4 and PIIX4E |
| 5 | * Intel 82443MX (440MX) |
| 6 | Datasheet: Publicly available at the Intel website |
| 7 | * ServerWorks OSB4, CSB5 and CSB6 southbridges |
| 8 | Datasheet: Only available via NDA from ServerWorks |
| 9 | * Standard Microsystems (SMSC) SLC90E66 (Victory66) southbridge |
| 10 | Datasheet: Publicly available at the SMSC website http://www.smsc.com |
| 11 | |
| 12 | Authors: |
| 13 | Frodo Looijaard <frodol@dds.nl> |
| 14 | Philip Edelbrock <phil@netroedge.com> |
| 15 | |
| 16 | |
| 17 | Module Parameters |
| 18 | ----------------- |
| 19 | |
| 20 | * force: int |
| 21 | Forcibly enable the PIIX4. DANGEROUS! |
| 22 | * force_addr: int |
| 23 | Forcibly enable the PIIX4 at the given address. EXTREMELY DANGEROUS! |
| 24 | * fix_hstcfg: int |
| 25 | Fix config register. Needed on some boards (Force CPCI735). |
| 26 | |
| 27 | |
| 28 | Description |
| 29 | ----------- |
| 30 | |
| 31 | The PIIX4 (properly known as the 82371AB) is an Intel chip with a lot of |
| 32 | functionality. Among other things, it implements the PCI bus. One of its |
| 33 | minor functions is implementing a System Management Bus. This is a true |
| 34 | SMBus - you can not access it on I2C levels. The good news is that it |
| 35 | natively understands SMBus commands and you do not have to worry about |
| 36 | timing problems. The bad news is that non-SMBus devices connected to it can |
| 37 | confuse it mightily. Yes, this is known to happen... |
| 38 | |
| 39 | Do 'lspci -v' and see whether it contains an entry like this: |
| 40 | |
| 41 | 0000:00:02.3 Bridge: Intel Corp. 82371AB/EB/MB PIIX4 ACPI (rev 02) |
| 42 | Flags: medium devsel, IRQ 9 |
| 43 | |
| 44 | Bus and device numbers may differ, but the function number must be |
| 45 | identical (like many PCI devices, the PIIX4 incorporates a number of |
| 46 | different 'functions', which can be considered as separate devices). If you |
| 47 | find such an entry, you have a PIIX4 SMBus controller. |
| 48 | |
| 49 | On some computers (most notably, some Dells), the SMBus is disabled by |
| 50 | default. If you use the insmod parameter 'force=1', the kernel module will |
| 51 | try to enable it. THIS IS VERY DANGEROUS! If the BIOS did not set up a |
| 52 | correct address for this module, you could get in big trouble (read: |
| 53 | crashes, data corruption, etc.). Try this only as a last resort (try BIOS |
| 54 | updates first, for example), and backup first! An even more dangerous |
| 55 | option is 'force_addr=<IOPORT>'. This will not only enable the PIIX4 like |
| 56 | 'force' foes, but it will also set a new base I/O port address. The SMBus |
| 57 | parts of the PIIX4 needs a range of 8 of these addresses to function |
| 58 | correctly. If these addresses are already reserved by some other device, |
| 59 | you will get into big trouble! DON'T USE THIS IF YOU ARE NOT VERY SURE |
| 60 | ABOUT WHAT YOU ARE DOING! |
| 61 | |
| 62 | The PIIX4E is just an new version of the PIIX4; it is supported as well. |
| 63 | The PIIX/PIIX3 does not implement an SMBus or I2C bus, so you can't use |
| 64 | this driver on those mainboards. |
| 65 | |
| 66 | The ServerWorks Southbridges, the Intel 440MX, and the Victory766 are |
| 67 | identical to the PIIX4 in I2C/SMBus support. |
| 68 | |
| 69 | A few OSB4 southbridges are known to be misconfigured by the BIOS. In this |
| 70 | case, you have you use the fix_hstcfg module parameter. Do not use it |
| 71 | unless you know you have to, because in some cases it also breaks |
| 72 | configuration on southbridges that don't need it. |