Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame^] | 1 | /* |
| 2 | * linux/arch/arm/mach-footbridge/dc21285-timer.c |
| 3 | * |
| 4 | * Copyright (C) 1998 Russell King. |
| 5 | * Copyright (C) 1998 Phil Blundell |
| 6 | */ |
| 7 | #include <linux/init.h> |
| 8 | #include <linux/interrupt.h> |
| 9 | |
| 10 | #include <asm/irq.h> |
| 11 | |
| 12 | #include <asm/hardware/dec21285.h> |
| 13 | #include <asm/mach/time.h> |
| 14 | |
| 15 | #include "common.h" |
| 16 | |
| 17 | /* |
| 18 | * Footbridge timer 1 support. |
| 19 | */ |
| 20 | static unsigned long timer1_latch; |
| 21 | |
| 22 | static unsigned long timer1_gettimeoffset (void) |
| 23 | { |
| 24 | unsigned long value = timer1_latch - *CSR_TIMER1_VALUE; |
| 25 | |
| 26 | return ((tick_nsec / 1000) * value) / timer1_latch; |
| 27 | } |
| 28 | |
| 29 | static irqreturn_t |
| 30 | timer1_interrupt(int irq, void *dev_id, struct pt_regs *regs) |
| 31 | { |
| 32 | write_seqlock(&xtime_lock); |
| 33 | |
| 34 | *CSR_TIMER1_CLR = 0; |
| 35 | |
| 36 | timer_tick(regs); |
| 37 | |
| 38 | write_sequnlock(&xtime_lock); |
| 39 | |
| 40 | return IRQ_HANDLED; |
| 41 | } |
| 42 | |
| 43 | static struct irqaction footbridge_timer_irq = { |
| 44 | .name = "Timer1 timer tick", |
| 45 | .handler = timer1_interrupt, |
| 46 | .flags = SA_INTERRUPT, |
| 47 | }; |
| 48 | |
| 49 | /* |
| 50 | * Set up timer interrupt. |
| 51 | */ |
| 52 | static void __init footbridge_timer_init(void) |
| 53 | { |
| 54 | isa_rtc_init(); |
| 55 | |
| 56 | timer1_latch = (mem_fclk_21285 + 8 * HZ) / (16 * HZ); |
| 57 | |
| 58 | *CSR_TIMER1_CLR = 0; |
| 59 | *CSR_TIMER1_LOAD = timer1_latch; |
| 60 | *CSR_TIMER1_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_AUTORELOAD | TIMER_CNTL_DIV16; |
| 61 | |
| 62 | setup_irq(IRQ_TIMER1, &footbridge_timer_irq); |
| 63 | } |
| 64 | |
| 65 | struct sys_timer footbridge_timer = { |
| 66 | .init = footbridge_timer_init, |
| 67 | .offset = timer1_gettimeoffset, |
| 68 | }; |