Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame^] | 1 | /* |
| 2 | * linux/include/asm-sh/irq_microdev.h |
| 3 | * |
| 4 | * Copyright (C) 2003 Sean McGoogan (Sean.McGoogan@superh.com) |
| 5 | * |
| 6 | * IRQ functions for the SuperH SH4-202 MicroDev board. |
| 7 | * |
| 8 | * May be copied or modified under the terms of the GNU General Public |
| 9 | * License. See linux/COPYING for more information. |
| 10 | * |
| 11 | */ |
| 12 | |
| 13 | |
| 14 | #ifndef _ASM_SH_IRQ_MICRODEV_H |
| 15 | #define _ASM_SH_IRQ_MICRODEV_H |
| 16 | |
| 17 | extern void init_microdev_irq(void); |
| 18 | extern void microdev_print_fpga_intc_status(void); |
| 19 | |
| 20 | |
| 21 | /* |
| 22 | * The following are useful macros for manipulating the |
| 23 | * interrupt controller (INTC) on the CPU-board FPGA. |
| 24 | * It should be noted that there is an INTC on the FPGA, |
| 25 | * and a seperate INTC on the SH4-202 core - these are |
| 26 | * two different things, both of which need to be prorammed |
| 27 | * to correctly route - unfortunately, they have the |
| 28 | * same name and abbreviations! |
| 29 | */ |
| 30 | #define MICRODEV_FPGA_INTC_BASE 0xa6110000ul /* INTC base address on CPU-board FPGA */ |
| 31 | #define MICRODEV_FPGA_INTENB_REG (MICRODEV_FPGA_INTC_BASE+0ul) /* Interrupt Enable Register on INTC on CPU-board FPGA */ |
| 32 | #define MICRODEV_FPGA_INTDSB_REG (MICRODEV_FPGA_INTC_BASE+8ul) /* Interrupt Disable Register on INTC on CPU-board FPGA */ |
| 33 | #define MICRODEV_FPGA_INTC_MASK(n) (1ul<<(n)) /* Interupt mask to enable/disable INTC in CPU-board FPGA */ |
| 34 | #define MICRODEV_FPGA_INTPRI_REG(n) (MICRODEV_FPGA_INTC_BASE+0x10+((n)/8)*8)/* Interrupt Priority Register on INTC on CPU-board FPGA */ |
| 35 | #define MICRODEV_FPGA_INTPRI_LEVEL(n,x) ((x)<<(((n)%8)*4)) /* MICRODEV_FPGA_INTPRI_LEVEL(int_number, int_level) */ |
| 36 | #define MICRODEV_FPGA_INTPRI_MASK(n) (MICRODEV_FPGA_INTPRI_LEVEL((n),0xful)) /* Interrupt Priority Mask on INTC on CPU-board FPGA */ |
| 37 | #define MICRODEV_FPGA_INTSRC_REG (MICRODEV_FPGA_INTC_BASE+0x30ul) /* Interrupt Source Register on INTC on CPU-board FPGA */ |
| 38 | #define MICRODEV_FPGA_INTREQ_REG (MICRODEV_FPGA_INTC_BASE+0x38ul) /* Interrupt Request Register on INTC on CPU-board FPGA */ |
| 39 | |
| 40 | |
| 41 | /* |
| 42 | * The following are the IRQ numbers for the Linux Kernel for external interrupts. |
| 43 | * i.e. the numbers seen by 'cat /proc/interrupt'. |
| 44 | */ |
| 45 | #define MICRODEV_LINUX_IRQ_KEYBOARD 1 /* SuperIO Keyboard */ |
| 46 | #define MICRODEV_LINUX_IRQ_SERIAL1 2 /* SuperIO Serial #1 */ |
| 47 | #define MICRODEV_LINUX_IRQ_ETHERNET 3 /* on-board Ethnernet */ |
| 48 | #define MICRODEV_LINUX_IRQ_SERIAL2 4 /* SuperIO Serial #2 */ |
| 49 | #define MICRODEV_LINUX_IRQ_USB_HC 7 /* on-board USB HC */ |
| 50 | #define MICRODEV_LINUX_IRQ_MOUSE 12 /* SuperIO PS/2 Mouse */ |
| 51 | #define MICRODEV_LINUX_IRQ_IDE2 13 /* SuperIO IDE #2 */ |
| 52 | #define MICRODEV_LINUX_IRQ_IDE1 14 /* SuperIO IDE #1 */ |
| 53 | |
| 54 | /* |
| 55 | * The following are the IRQ numbers for the INTC on the FPGA for external interrupts. |
| 56 | * i.e. the bits in the INTC registers in the FPGA. |
| 57 | */ |
| 58 | #define MICRODEV_FPGA_IRQ_KEYBOARD 1 /* SuperIO Keyboard */ |
| 59 | #define MICRODEV_FPGA_IRQ_SERIAL1 3 /* SuperIO Serial #1 */ |
| 60 | #define MICRODEV_FPGA_IRQ_SERIAL2 4 /* SuperIO Serial #2 */ |
| 61 | #define MICRODEV_FPGA_IRQ_MOUSE 12 /* SuperIO PS/2 Mouse */ |
| 62 | #define MICRODEV_FPGA_IRQ_IDE1 14 /* SuperIO IDE #1 */ |
| 63 | #define MICRODEV_FPGA_IRQ_IDE2 15 /* SuperIO IDE #2 */ |
| 64 | #define MICRODEV_FPGA_IRQ_USB_HC 16 /* on-board USB HC */ |
| 65 | #define MICRODEV_FPGA_IRQ_ETHERNET 18 /* on-board Ethnernet */ |
| 66 | |
| 67 | #define MICRODEV_IRQ_PCI_INTA 8 |
| 68 | #define MICRODEV_IRQ_PCI_INTB 9 |
| 69 | #define MICRODEV_IRQ_PCI_INTC 10 |
| 70 | #define MICRODEV_IRQ_PCI_INTD 11 |
| 71 | |
| 72 | #endif /* _ASM_SH_IRQ_MICRODEV_H */ |