blob: 22c1eee9b07a28e27cd1a2d66e89100065a3ce7b [file] [log] [blame]
Nishanth Menon4b791972013-03-19 12:53:07 -05001/*
2 * Copyright (C) 2011-2013 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
Florian Vaussard98ef79572013-05-31 14:32:55 +02008#include "elpida_ecb240abacn.dtsi"
Nishanth Menon4b791972013-03-19 12:53:07 -05009
10/ {
Javier Martinez Canillas742ae1f2016-08-31 12:35:28 +020011 memory@80000000 {
Nishanth Menon4b791972013-03-19 12:53:07 -050012 device_type = "memory";
13 reg = <0x80000000 0x40000000>; /* 1 GB */
14 };
15
Tony Lindgren1ed25e12017-09-20 07:43:23 -070016 chosen {
17 stdout-path = &uart3;
18 };
19
Tomi Valkeinen661637c2012-08-20 17:07:23 +030020 aliases {
21 display0 = &dvi0;
22 display1 = &hdmi0;
Tony Lindgren879a29e2017-01-05 08:37:01 -080023 ethernet = &ethernet;
Tomi Valkeinen661637c2012-08-20 17:07:23 +030024 };
25
Dan Murphy3818d7c2013-05-31 10:44:55 -050026 leds: leds {
Nishanth Menon4b791972013-03-19 12:53:07 -050027 compatible = "gpio-leds";
Dan Murphy3818d7c2013-05-31 10:44:55 -050028 pinctrl-names = "default";
29 pinctrl-0 = <
30 &led_wkgpio_pins
31 >;
32
Nishanth Menon4b791972013-03-19 12:53:07 -050033 heartbeat {
34 label = "pandaboard::status1";
Florian Vaussard6d624ea2013-05-31 14:32:56 +020035 gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
Nishanth Menon4b791972013-03-19 12:53:07 -050036 linux,default-trigger = "heartbeat";
37 };
38
39 mmc {
40 label = "pandaboard::status2";
Florian Vaussard6d624ea2013-05-31 14:32:56 +020041 gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
Nishanth Menon4b791972013-03-19 12:53:07 -050042 linux,default-trigger = "mmc0";
43 };
44 };
45
46 sound: sound {
47 compatible = "ti,abe-twl6040";
48 ti,model = "PandaBoard";
49
50 ti,mclk-freq = <38400000>;
51
52 ti,mcpdm = <&mcpdm>;
53
54 ti,twl6040 = <&twl6040>;
55
56 /* Audio routing */
57 ti,audio-routing =
58 "Headset Stereophone", "HSOL",
59 "Headset Stereophone", "HSOR",
60 "Ext Spk", "HFL",
61 "Ext Spk", "HFR",
62 "Line Out", "AUXL",
63 "Line Out", "AUXR",
64 "HSMIC", "Headset Mic",
65 "Headset Mic", "Headset Mic Bias",
66 "AFML", "Line In",
67 "AFMR", "Line In";
68 };
Roger Quadros5bd2100e2013-06-18 19:04:44 +030069
Roger Quadros5bd2100e2013-06-18 19:04:44 +030070 /* HS USB Port 1 Power */
71 hsusb1_power: hsusb1_power_reg {
72 compatible = "regulator-fixed";
73 regulator-name = "hsusb1_vbus";
74 regulator-min-microvolt = <3300000>;
75 regulator-max-microvolt = <3300000>;
Javier Martinez Canillas3a637e02015-10-06 11:03:39 +020076 gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>; /* gpio_1 */
Roger Quadros5bd2100e2013-06-18 19:04:44 +030077 startup-delay-us = <70000>;
78 enable-active-high;
Roger Quadros6f569292013-06-18 19:04:45 +030079 /*
80 * boot-on is required along with always-on as the
81 * regulator framework doesn't enable the regulator
82 * if boot-on is not there.
83 */
84 regulator-always-on;
85 regulator-boot-on;
Roger Quadros5bd2100e2013-06-18 19:04:44 +030086 };
87
88 /* HS USB Host PHY on PORT 1 */
89 hsusb1_phy: hsusb1_phy {
90 compatible = "usb-nop-xceiv";
Roger Quadros4cbdc862013-09-24 11:53:52 +030091 reset-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>; /* gpio_62 */
Roger Quadros5bd2100e2013-06-18 19:04:44 +030092 vcc-supply = <&hsusb1_power>;
Roger Quadros2ecf8aa2014-02-27 16:18:29 +020093 clocks = <&auxclk3_ck>;
94 clock-names = "main_clk";
Roger Quadros5bd2100e2013-06-18 19:04:44 +030095 clock-frequency = <19200000>;
96 };
Tony Lindgren851320e2013-09-13 12:09:53 -070097
98 /* regulator for wl12xx on sdio5 */
99 wl12xx_vmmc: wl12xx_vmmc {
100 pinctrl-names = "default";
101 pinctrl-0 = <&wl12xx_gpio>;
102 compatible = "regulator-fixed";
103 regulator-name = "vwl1271";
104 regulator-min-microvolt = <1800000>;
105 regulator-max-microvolt = <1800000>;
Javier Martinez Canillas3a637e02015-10-06 11:03:39 +0200106 gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
Tony Lindgren851320e2013-09-13 12:09:53 -0700107 startup-delay-us = <70000>;
108 enable-active-high;
109 };
Tomi Valkeinen661637c2012-08-20 17:07:23 +0300110
Javier Martinez Canillas9e19d0d2016-06-27 15:21:00 -0400111 tfp410: encoder0 {
Tomi Valkeinen661637c2012-08-20 17:07:23 +0300112 compatible = "ti,tfp410";
113 powerdown-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; /* gpio_0 */
114
115 ports {
116 #address-cells = <1>;
117 #size-cells = <0>;
118
119 port@0 {
120 reg = <0>;
121
Javier Martinez Canillas9e19d0d2016-06-27 15:21:00 -0400122 tfp410_in: endpoint {
Tomi Valkeinen661637c2012-08-20 17:07:23 +0300123 remote-endpoint = <&dpi_out>;
124 };
125 };
126
127 port@1 {
128 reg = <1>;
129
Javier Martinez Canillas9e19d0d2016-06-27 15:21:00 -0400130 tfp410_out: endpoint {
Tomi Valkeinen661637c2012-08-20 17:07:23 +0300131 remote-endpoint = <&dvi_connector_in>;
132 };
133 };
134 };
135 };
136
Javier Martinez Canillas9e19d0d2016-06-27 15:21:00 -0400137 dvi0: connector0 {
Tomi Valkeinen661637c2012-08-20 17:07:23 +0300138 compatible = "dvi-connector";
139 label = "dvi";
140
141 digital;
142
143 ddc-i2c-bus = <&i2c3>;
144
145 port {
146 dvi_connector_in: endpoint {
147 remote-endpoint = <&tfp410_out>;
148 };
149 };
150 };
151
Javier Martinez Canillas9e19d0d2016-06-27 15:21:00 -0400152 tpd12s015: encoder1 {
Tomi Valkeinen661637c2012-08-20 17:07:23 +0300153 compatible = "ti,tpd12s015";
154
155 gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>, /* 60, CT CP HPD */
156 <&gpio2 9 GPIO_ACTIVE_HIGH>, /* 41, LS OE */
157 <&gpio2 31 GPIO_ACTIVE_HIGH>; /* 63, HPD */
158
159 ports {
160 #address-cells = <1>;
161 #size-cells = <0>;
162
163 port@0 {
164 reg = <0>;
165
Javier Martinez Canillas9e19d0d2016-06-27 15:21:00 -0400166 tpd12s015_in: endpoint {
Tomi Valkeinen661637c2012-08-20 17:07:23 +0300167 remote-endpoint = <&hdmi_out>;
168 };
169 };
170
171 port@1 {
172 reg = <1>;
173
Javier Martinez Canillas9e19d0d2016-06-27 15:21:00 -0400174 tpd12s015_out: endpoint {
Tomi Valkeinen661637c2012-08-20 17:07:23 +0300175 remote-endpoint = <&hdmi_connector_in>;
176 };
177 };
178 };
179 };
180
Javier Martinez Canillas9e19d0d2016-06-27 15:21:00 -0400181 hdmi0: connector1 {
Tomi Valkeinen661637c2012-08-20 17:07:23 +0300182 compatible = "hdmi-connector";
183 label = "hdmi";
184
185 type = "a";
186
187 port {
188 hdmi_connector_in: endpoint {
189 remote-endpoint = <&tpd12s015_out>;
190 };
191 };
192 };
Nishanth Menon4b791972013-03-19 12:53:07 -0500193};
194
195&omap4_pmx_core {
196 pinctrl-names = "default";
197 pinctrl-0 = <
Tomi Valkeinen0352bd12013-10-25 13:07:36 +0300198 &dss_dpi_pins
199 &tfp410_pins
Nishanth Menon4b791972013-03-19 12:53:07 -0500200 &dss_hdmi_pins
201 &tpd12s015_pins
Roger Quadros5bd2100e2013-06-18 19:04:44 +0300202 &hsusbb1_pins
Nishanth Menon4b791972013-03-19 12:53:07 -0500203 >;
204
Nishanth Menon4b791972013-03-19 12:53:07 -0500205 twl6040_pins: pinmux_twl6040_pins {
206 pinctrl-single,pins = <
Javier Martinez Canillas0e3ae322015-11-13 01:54:10 -0300207 OMAP4_IOPAD(0x120, PIN_OUTPUT | MUX_MODE3) /* hdq_sio.gpio_127 */
208 OMAP4_IOPAD(0x1a0, PIN_INPUT | MUX_MODE0) /* sys_nirq2.sys_nirq2 */
Nishanth Menon4b791972013-03-19 12:53:07 -0500209 >;
210 };
211
212 mcpdm_pins: pinmux_mcpdm_pins {
213 pinctrl-single,pins = <
Javier Martinez Canillas0e3ae322015-11-13 01:54:10 -0300214 OMAP4_IOPAD(0x106, PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_ul_data.abe_pdm_ul_data */
215 OMAP4_IOPAD(0x108, PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_dl_data.abe_pdm_dl_data */
216 OMAP4_IOPAD(0x10a, PIN_INPUT_PULLUP | MUX_MODE0) /* abe_pdm_frame.abe_pdm_frame */
217 OMAP4_IOPAD(0x10c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_lb_clk.abe_pdm_lb_clk */
218 OMAP4_IOPAD(0x10e, PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_clks.abe_clks */
Nishanth Menon4b791972013-03-19 12:53:07 -0500219 >;
220 };
221
222 mcbsp1_pins: pinmux_mcbsp1_pins {
223 pinctrl-single,pins = <
Javier Martinez Canillas0e3ae322015-11-13 01:54:10 -0300224 OMAP4_IOPAD(0x0fe, PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_clkx.abe_mcbsp1_clkx */
225 OMAP4_IOPAD(0x100, PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dr.abe_mcbsp1_dr */
226 OMAP4_IOPAD(0x102, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dx.abe_mcbsp1_dx */
227 OMAP4_IOPAD(0x104, PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_fsx.abe_mcbsp1_fsx */
Nishanth Menon4b791972013-03-19 12:53:07 -0500228 >;
229 };
230
Tomi Valkeinen0352bd12013-10-25 13:07:36 +0300231 dss_dpi_pins: pinmux_dss_dpi_pins {
232 pinctrl-single,pins = <
Javier Martinez Canillas0e3ae322015-11-13 01:54:10 -0300233 OMAP4_IOPAD(0x162, PIN_OUTPUT | MUX_MODE5) /* dispc2_data23 */
234 OMAP4_IOPAD(0x164, PIN_OUTPUT | MUX_MODE5) /* dispc2_data22 */
235 OMAP4_IOPAD(0x166, PIN_OUTPUT | MUX_MODE5) /* dispc2_data21 */
236 OMAP4_IOPAD(0x168, PIN_OUTPUT | MUX_MODE5) /* dispc2_data20 */
237 OMAP4_IOPAD(0x16a, PIN_OUTPUT | MUX_MODE5) /* dispc2_data19 */
238 OMAP4_IOPAD(0x16c, PIN_OUTPUT | MUX_MODE5) /* dispc2_data18 */
239 OMAP4_IOPAD(0x16e, PIN_OUTPUT | MUX_MODE5) /* dispc2_data15 */
240 OMAP4_IOPAD(0x170, PIN_OUTPUT | MUX_MODE5) /* dispc2_data14 */
241 OMAP4_IOPAD(0x172, PIN_OUTPUT | MUX_MODE5) /* dispc2_data13 */
242 OMAP4_IOPAD(0x174, PIN_OUTPUT | MUX_MODE5) /* dispc2_data12 */
243 OMAP4_IOPAD(0x176, PIN_OUTPUT | MUX_MODE5) /* dispc2_data11 */
Tomi Valkeinen0352bd12013-10-25 13:07:36 +0300244
Javier Martinez Canillas0e3ae322015-11-13 01:54:10 -0300245 OMAP4_IOPAD(0x1b4, PIN_OUTPUT | MUX_MODE5) /* dispc2_data10 */
246 OMAP4_IOPAD(0x1b6, PIN_OUTPUT | MUX_MODE5) /* dispc2_data9 */
247 OMAP4_IOPAD(0x1b8, PIN_OUTPUT | MUX_MODE5) /* dispc2_data16 */
248 OMAP4_IOPAD(0x1ba, PIN_OUTPUT | MUX_MODE5) /* dispc2_data17 */
249 OMAP4_IOPAD(0x1bc, PIN_OUTPUT | MUX_MODE5) /* dispc2_hsync */
250 OMAP4_IOPAD(0x1be, PIN_OUTPUT | MUX_MODE5) /* dispc2_pclk */
251 OMAP4_IOPAD(0x1c0, PIN_OUTPUT | MUX_MODE5) /* dispc2_vsync */
252 OMAP4_IOPAD(0x1c2, PIN_OUTPUT | MUX_MODE5) /* dispc2_de */
253 OMAP4_IOPAD(0x1c4, PIN_OUTPUT | MUX_MODE5) /* dispc2_data8 */
254 OMAP4_IOPAD(0x1c6, PIN_OUTPUT | MUX_MODE5) /* dispc2_data7 */
255 OMAP4_IOPAD(0x1c8, PIN_OUTPUT | MUX_MODE5) /* dispc2_data6 */
256 OMAP4_IOPAD(0x1ca, PIN_OUTPUT | MUX_MODE5) /* dispc2_data5 */
257 OMAP4_IOPAD(0x1cc, PIN_OUTPUT | MUX_MODE5) /* dispc2_data4 */
258 OMAP4_IOPAD(0x1ce, PIN_OUTPUT | MUX_MODE5) /* dispc2_data3 */
Tomi Valkeinen0352bd12013-10-25 13:07:36 +0300259
Javier Martinez Canillas0e3ae322015-11-13 01:54:10 -0300260 OMAP4_IOPAD(0x1d0, PIN_OUTPUT | MUX_MODE5) /* dispc2_data2 */
261 OMAP4_IOPAD(0x1d2, PIN_OUTPUT | MUX_MODE5) /* dispc2_data1 */
262 OMAP4_IOPAD(0x1d4, PIN_OUTPUT | MUX_MODE5) /* dispc2_data0 */
Tomi Valkeinen0352bd12013-10-25 13:07:36 +0300263 >;
264 };
265
266 tfp410_pins: pinmux_tfp410_pins {
267 pinctrl-single,pins = <
Javier Martinez Canillas0e3ae322015-11-13 01:54:10 -0300268 OMAP4_IOPAD(0x184, PIN_OUTPUT | MUX_MODE3) /* gpio_0 */
Tomi Valkeinen0352bd12013-10-25 13:07:36 +0300269 >;
270 };
271
Nishanth Menon4b791972013-03-19 12:53:07 -0500272 dss_hdmi_pins: pinmux_dss_hdmi_pins {
273 pinctrl-single,pins = <
Tony Lindgren3a8ed202017-06-27 01:58:32 -0700274 OMAP4_IOPAD(0x09a, PIN_INPUT | MUX_MODE0) /* hdmi_cec.hdmi_cec */
Javier Martinez Canillas0e3ae322015-11-13 01:54:10 -0300275 OMAP4_IOPAD(0x09c, PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_scl.hdmi_scl */
276 OMAP4_IOPAD(0x09e, PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_sda.hdmi_sda */
Nishanth Menon4b791972013-03-19 12:53:07 -0500277 >;
278 };
279
280 tpd12s015_pins: pinmux_tpd12s015_pins {
281 pinctrl-single,pins = <
Javier Martinez Canillas0e3ae322015-11-13 01:54:10 -0300282 OMAP4_IOPAD(0x062, PIN_OUTPUT | MUX_MODE3) /* gpmc_a17.gpio_41 */
283 OMAP4_IOPAD(0x088, PIN_OUTPUT | MUX_MODE3) /* gpmc_nbe1.gpio_60 */
284 OMAP4_IOPAD(0x098, PIN_INPUT_PULLDOWN | MUX_MODE3) /* hdmi_hpd.gpio_63 */
Nishanth Menon4b791972013-03-19 12:53:07 -0500285 >;
286 };
287
Roger Quadros5bd2100e2013-06-18 19:04:44 +0300288 hsusbb1_pins: pinmux_hsusbb1_pins {
289 pinctrl-single,pins = <
Javier Martinez Canillas0e3ae322015-11-13 01:54:10 -0300290 OMAP4_IOPAD(0x0c2, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_clk.usbb1_ulpiphy_clk */
291 OMAP4_IOPAD(0x0c4, PIN_OUTPUT | MUX_MODE4) /* usbb1_ulpitll_stp.usbb1_ulpiphy_stp */
292 OMAP4_IOPAD(0x0c6, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dir.usbb1_ulpiphy_dir */
293 OMAP4_IOPAD(0x0c8, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_nxt.usbb1_ulpiphy_nxt */
294 OMAP4_IOPAD(0x0ca, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat0.usbb1_ulpiphy_dat0 */
295 OMAP4_IOPAD(0x0cc, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat1.usbb1_ulpiphy_dat1 */
296 OMAP4_IOPAD(0x0ce, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat2.usbb1_ulpiphy_dat2 */
297 OMAP4_IOPAD(0x0d0, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat3.usbb1_ulpiphy_dat3 */
298 OMAP4_IOPAD(0x0d2, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat4.usbb1_ulpiphy_dat4 */
299 OMAP4_IOPAD(0x0d4, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat5.usbb1_ulpiphy_dat5 */
300 OMAP4_IOPAD(0x0d6, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat6.usbb1_ulpiphy_dat6 */
301 OMAP4_IOPAD(0x0d8, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat7.usbb1_ulpiphy_dat7 */
Roger Quadros5bd2100e2013-06-18 19:04:44 +0300302 >;
303 };
304
Nishanth Menon4b791972013-03-19 12:53:07 -0500305 i2c1_pins: pinmux_i2c1_pins {
306 pinctrl-single,pins = <
Javier Martinez Canillas0e3ae322015-11-13 01:54:10 -0300307 OMAP4_IOPAD(0x122, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
308 OMAP4_IOPAD(0x124, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
Nishanth Menon4b791972013-03-19 12:53:07 -0500309 >;
310 };
311
312 i2c2_pins: pinmux_i2c2_pins {
313 pinctrl-single,pins = <
Javier Martinez Canillas0e3ae322015-11-13 01:54:10 -0300314 OMAP4_IOPAD(0x126, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */
315 OMAP4_IOPAD(0x128, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */
Nishanth Menon4b791972013-03-19 12:53:07 -0500316 >;
317 };
318
319 i2c3_pins: pinmux_i2c3_pins {
320 pinctrl-single,pins = <
Javier Martinez Canillas0e3ae322015-11-13 01:54:10 -0300321 OMAP4_IOPAD(0x12a, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */
322 OMAP4_IOPAD(0x12c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */
Nishanth Menon4b791972013-03-19 12:53:07 -0500323 >;
324 };
325
326 i2c4_pins: pinmux_i2c4_pins {
327 pinctrl-single,pins = <
Javier Martinez Canillas0e3ae322015-11-13 01:54:10 -0300328 OMAP4_IOPAD(0x12e, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_scl */
329 OMAP4_IOPAD(0x130, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */
Nishanth Menon4b791972013-03-19 12:53:07 -0500330 >;
331 };
Tony Lindgren851320e2013-09-13 12:09:53 -0700332
333 /*
334 * wl12xx GPIO outputs for WLAN_EN, BT_EN, FM_EN, BT_WAKEUP
335 * REVISIT: Are the pull-ups needed for GPIO 48 and 49?
336 */
337 wl12xx_gpio: pinmux_wl12xx_gpio {
338 pinctrl-single,pins = <
Javier Martinez Canillas0e3ae322015-11-13 01:54:10 -0300339 OMAP4_IOPAD(0x066, PIN_OUTPUT | MUX_MODE3) /* gpmc_a19.gpio_43 */
340 OMAP4_IOPAD(0x06c, PIN_OUTPUT | MUX_MODE3) /* gpmc_a22.gpio_46 */
341 OMAP4_IOPAD(0x070, PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_a24.gpio_48 */
342 OMAP4_IOPAD(0x072, PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_a25.gpio_49 */
Tony Lindgren851320e2013-09-13 12:09:53 -0700343 >;
344 };
345
346 /* wl12xx GPIO inputs and SDIO pins */
347 wl12xx_pins: pinmux_wl12xx_pins {
348 pinctrl-single,pins = <
Javier Martinez Canillas0e3ae322015-11-13 01:54:10 -0300349 OMAP4_IOPAD(0x078, PIN_INPUT | MUX_MODE3) /* gpmc_ncs2.gpio_52 */
350 OMAP4_IOPAD(0x07a, PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */
351 OMAP4_IOPAD(0x148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_clk.sdmmc5_clk */
352 OMAP4_IOPAD(0x14a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_cmd.sdmmc5_cmd */
353 OMAP4_IOPAD(0x14c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat0.sdmmc5_dat0 */
354 OMAP4_IOPAD(0x14e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat1.sdmmc5_dat1 */
355 OMAP4_IOPAD(0x150, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat2.sdmmc5_dat2 */
356 OMAP4_IOPAD(0x152, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat3.sdmmc5_dat3 */
Tony Lindgren851320e2013-09-13 12:09:53 -0700357 >;
358 };
Dan Murphy3818d7c2013-05-31 10:44:55 -0500359};
360
Balaji T K2ba28662013-12-02 11:38:13 -0800361&omap4_pmx_wkup {
362 led_wkgpio_pins: pinmux_leds_wkpins {
363 pinctrl-single,pins = <
Javier Martinez Canillas0e3ae322015-11-13 01:54:10 -0300364 OMAP4_IOPAD(0x05a, PIN_OUTPUT | MUX_MODE3) /* gpio_wk7 */
365 OMAP4_IOPAD(0x05c, PIN_OUTPUT | MUX_MODE3) /* gpio_wk8 */
Balaji T K2ba28662013-12-02 11:38:13 -0800366 >;
367 };
368};
369
Nishanth Menon4b791972013-03-19 12:53:07 -0500370&i2c1 {
371 pinctrl-names = "default";
372 pinctrl-0 = <&i2c1_pins>;
373
374 clock-frequency = <400000>;
375
376 twl: twl@48 {
377 reg = <0x48>;
Florian Vaussard8fea7d52013-05-31 14:32:57 +0200378 /* IRQ# = 7 */
379 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */
Nishanth Menon4b791972013-03-19 12:53:07 -0500380 };
381
382 twl6040: twl@4b {
383 compatible = "ti,twl6040";
Peter Ujfalusi2ab60a32016-05-30 11:55:15 +0300384 #clock-cells = <0>;
Nishanth Menon4b791972013-03-19 12:53:07 -0500385 reg = <0x4b>;
Peter Ujfalusiaa986452014-01-24 10:18:59 +0200386
387 pinctrl-names = "default";
388 pinctrl-0 = <&twl6040_pins>;
389
Florian Vaussard8fea7d52013-05-31 14:32:57 +0200390 /* IRQ# = 119 */
391 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */
Dan Murphy78eb9382013-05-31 10:45:22 -0500392 ti,audpwron-gpio = <&gpio4 31 GPIO_ACTIVE_HIGH>; /* gpio line 127 */
Nishanth Menon4b791972013-03-19 12:53:07 -0500393
394 vio-supply = <&v1v8>;
395 v2v1-supply = <&v2v1>;
396 enable-active-high;
397 };
398};
399
Florian Vaussard98ef79572013-05-31 14:32:55 +0200400#include "twl6030.dtsi"
Ruslan Bilovol06a9ea52013-08-14 11:35:47 +0300401#include "twl6030_omap4.dtsi"
Nishanth Menon4b791972013-03-19 12:53:07 -0500402
403&i2c2 {
404 pinctrl-names = "default";
405 pinctrl-0 = <&i2c2_pins>;
406
407 clock-frequency = <400000>;
408};
409
410&i2c3 {
411 pinctrl-names = "default";
412 pinctrl-0 = <&i2c3_pins>;
413
414 clock-frequency = <100000>;
415
416 /*
417 * Display monitor features are burnt in their EEPROM as EDID data.
418 * The EEPROM is connected as I2C slave device.
419 */
420 eeprom@50 {
421 compatible = "ti,eeprom";
422 reg = <0x50>;
423 };
424};
425
426&i2c4 {
427 pinctrl-names = "default";
428 pinctrl-0 = <&i2c4_pins>;
429
430 clock-frequency = <400000>;
431};
432
433&mmc1 {
434 vmmc-supply = <&vmmc>;
435 bus-width = <8>;
436};
437
438&mmc2 {
439 status = "disabled";
440};
441
442&mmc3 {
443 status = "disabled";
444};
445
446&mmc4 {
447 status = "disabled";
448};
449
450&mmc5 {
Tony Lindgren851320e2013-09-13 12:09:53 -0700451 pinctrl-names = "default";
452 pinctrl-0 = <&wl12xx_pins>;
453 vmmc-supply = <&wl12xx_vmmc>;
Tony Lindgren84ae4972016-09-09 14:00:37 -0700454 interrupts-extended = <&wakeupgen GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH
455 &omap4_pmx_core 0x10e>;
Tony Lindgren851320e2013-09-13 12:09:53 -0700456 non-removable;
Nishanth Menon4b791972013-03-19 12:53:07 -0500457 bus-width = <4>;
Tony Lindgren851320e2013-09-13 12:09:53 -0700458 cap-power-off-card;
Eliad Peller99f84ca2015-03-18 18:38:29 +0200459
460 #address-cells = <1>;
461 #size-cells = <0>;
462 wlcore: wlcore@2 {
463 compatible = "ti,wl1271";
464 reg = <2>;
465 interrupt-parent = <&gpio2>;
466 interrupts = <21 IRQ_TYPE_LEVEL_HIGH>; /* gpio 53 */
467 ref-clock-frequency = <38400000>;
468 };
Nishanth Menon4b791972013-03-19 12:53:07 -0500469};
470
471&emif1 {
472 cs1-used;
473 device-handle = <&elpida_ECB240ABACN>;
474};
475
476&emif2 {
477 cs1-used;
478 device-handle = <&elpida_ECB240ABACN>;
479};
480
Peter Ujfalusiaa986452014-01-24 10:18:59 +0200481&mcbsp1 {
482 pinctrl-names = "default";
483 pinctrl-0 = <&mcbsp1_pins>;
484 status = "okay";
485};
486
Peter Ujfalusiaa986452014-01-24 10:18:59 +0200487&mcpdm {
488 pinctrl-names = "default";
489 pinctrl-0 = <&mcpdm_pins>;
Peter Ujfalusi2ab60a32016-05-30 11:55:15 +0300490
491 clocks = <&twl6040>;
492 clock-names = "pdmclk";
493
Peter Ujfalusiaa986452014-01-24 10:18:59 +0200494 status = "okay";
495};
496
Nishanth Menon4b791972013-03-19 12:53:07 -0500497&twl_usb_comparator {
498 usb-supply = <&vusb>;
499};
500
Tony Lindgren31f08202014-05-05 17:27:39 -0700501&uart2 {
Marc Zyngier7136d452015-03-11 15:43:49 +0000502 interrupts-extended = <&wakeupgen GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH
Tony Lindgren31f08202014-05-05 17:27:39 -0700503 &omap4_pmx_core OMAP4_UART2_RX>;
504};
505
506&uart3 {
Marc Zyngier7136d452015-03-11 15:43:49 +0000507 interrupts-extended = <&wakeupgen GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH
Tony Lindgren31f08202014-05-05 17:27:39 -0700508 &omap4_pmx_core OMAP4_UART3_RX>;
509};
510
511&uart4 {
Marc Zyngier7136d452015-03-11 15:43:49 +0000512 interrupts-extended = <&wakeupgen GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH
Tony Lindgren31f08202014-05-05 17:27:39 -0700513 &omap4_pmx_core OMAP4_UART4_RX>;
514};
515
Nishanth Menon4b791972013-03-19 12:53:07 -0500516&usb_otg_hs {
517 interface-type = <1>;
518 mode = <3>;
519 power = <50>;
520};
Roger Quadros5bd2100e2013-06-18 19:04:44 +0300521
522&usbhshost {
523 port1-mode = "ehci-phy";
524};
525
526&usbhsehci {
527 phys = <&hsusb1_phy>;
Tony Lindgren879a29e2017-01-05 08:37:01 -0800528
529 #address-cells = <1>;
530 #size-cells = <0>;
531
532 hub@1 {
533 compatible = "usb424,9514";
534 reg = <1>;
535 #address-cells = <1>;
536 #size-cells = <0>;
537
538 ethernet: usbether@1 {
539 compatible = "usb424,ec00";
540 reg = <1>;
541 };
542 };
Roger Quadros5bd2100e2013-06-18 19:04:44 +0300543};
Tomi Valkeinen661637c2012-08-20 17:07:23 +0300544
545&dss {
546 status = "ok";
547
548 port {
549 dpi_out: endpoint {
550 remote-endpoint = <&tfp410_in>;
551 data-lines = <24>;
552 };
553 };
554};
555
556&dsi2 {
557 status = "ok";
558 vdd-supply = <&vcxio>;
559};
560
561&hdmi {
562 status = "ok";
563 vdda-supply = <&vdac>;
564
565 port {
566 hdmi_out: endpoint {
567 remote-endpoint = <&tpd12s015_in>;
568 };
569 };
570};