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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * File Name:
3 * defxx.c
4 *
5 * Copyright Information:
6 * Copyright Digital Equipment Corporation 1996.
7 *
8 * This software may be used and distributed according to the terms of
9 * the GNU General Public License, incorporated herein by reference.
10 *
11 * Abstract:
12 * A Linux device driver supporting the Digital Equipment Corporation
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -080013 * FDDI TURBOchannel, EISA and PCI controller families. Supported
14 * adapters include:
Linus Torvalds1da177e2005-04-16 15:20:36 -070015 *
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -080016 * DEC FDDIcontroller/TURBOchannel (DEFTA)
17 * DEC FDDIcontroller/EISA (DEFEA)
18 * DEC FDDIcontroller/PCI (DEFPA)
Linus Torvalds1da177e2005-04-16 15:20:36 -070019 *
20 * The original author:
21 * LVS Lawrence V. Stefani <lstefani@yahoo.com>
22 *
23 * Maintainers:
24 * macro Maciej W. Rozycki <macro@linux-mips.org>
25 *
26 * Credits:
27 * I'd like to thank Patricia Cross for helping me get started with
28 * Linux, David Davies for a lot of help upgrading and configuring
29 * my development system and for answering many OS and driver
30 * development questions, and Alan Cox for recommendations and
31 * integration help on getting FDDI support into Linux. LVS
32 *
33 * Driver Architecture:
34 * The driver architecture is largely based on previous driver work
35 * for other operating systems. The upper edge interface and
36 * functions were largely taken from existing Linux device drivers
37 * such as David Davies' DE4X5.C driver and Donald Becker's TULIP.C
38 * driver.
39 *
40 * Adapter Probe -
41 * The driver scans for supported EISA adapters by reading the
42 * SLOT ID register for each EISA slot and making a match
43 * against the expected value.
44 *
45 * Bus-Specific Initialization -
46 * This driver currently supports both EISA and PCI controller
47 * families. While the custom DMA chip and FDDI logic is similar
48 * or identical, the bus logic is very different. After
49 * initialization, the only bus-specific differences is in how the
50 * driver enables and disables interrupts. Other than that, the
51 * run-time critical code behaves the same on both families.
52 * It's important to note that both adapter families are configured
53 * to I/O map, rather than memory map, the adapter registers.
54 *
55 * Driver Open/Close -
56 * In the driver open routine, the driver ISR (interrupt service
57 * routine) is registered and the adapter is brought to an
58 * operational state. In the driver close routine, the opposite
59 * occurs; the driver ISR is deregistered and the adapter is
60 * brought to a safe, but closed state. Users may use consecutive
61 * commands to bring the adapter up and down as in the following
62 * example:
63 * ifconfig fddi0 up
64 * ifconfig fddi0 down
65 * ifconfig fddi0 up
66 *
67 * Driver Shutdown -
68 * Apparently, there is no shutdown or halt routine support under
69 * Linux. This routine would be called during "reboot" or
70 * "shutdown" to allow the driver to place the adapter in a safe
71 * state before a warm reboot occurs. To be really safe, the user
72 * should close the adapter before shutdown (eg. ifconfig fddi0 down)
73 * to ensure that the adapter DMA engine is taken off-line. However,
74 * the current driver code anticipates this problem and always issues
75 * a soft reset of the adapter at the beginning of driver initialization.
76 * A future driver enhancement in this area may occur in 2.1.X where
77 * Alan indicated that a shutdown handler may be implemented.
78 *
79 * Interrupt Service Routine -
80 * The driver supports shared interrupts, so the ISR is registered for
81 * each board with the appropriate flag and the pointer to that board's
82 * device structure. This provides the context during interrupt
83 * processing to support shared interrupts and multiple boards.
84 *
85 * Interrupt enabling/disabling can occur at many levels. At the host
86 * end, you can disable system interrupts, or disable interrupts at the
87 * PIC (on Intel systems). Across the bus, both EISA and PCI adapters
88 * have a bus-logic chip interrupt enable/disable as well as a DMA
89 * controller interrupt enable/disable.
90 *
91 * The driver currently enables and disables adapter interrupts at the
92 * bus-logic chip and assumes that Linux will take care of clearing or
93 * acknowledging any host-based interrupt chips.
94 *
95 * Control Functions -
96 * Control functions are those used to support functions such as adding
97 * or deleting multicast addresses, enabling or disabling packet
98 * reception filters, or other custom/proprietary commands. Presently,
99 * the driver supports the "get statistics", "set multicast list", and
100 * "set mac address" functions defined by Linux. A list of possible
101 * enhancements include:
102 *
103 * - Custom ioctl interface for executing port interface commands
104 * - Custom ioctl interface for adding unicast addresses to
105 * adapter CAM (to support bridge functions).
106 * - Custom ioctl interface for supporting firmware upgrades.
107 *
108 * Hardware (port interface) Support Routines -
109 * The driver function names that start with "dfx_hw_" represent
110 * low-level port interface routines that are called frequently. They
111 * include issuing a DMA or port control command to the adapter,
112 * resetting the adapter, or reading the adapter state. Since the
113 * driver initialization and run-time code must make calls into the
114 * port interface, these routines were written to be as generic and
115 * usable as possible.
116 *
117 * Receive Path -
118 * The adapter DMA engine supports a 256 entry receive descriptor block
119 * of which up to 255 entries can be used at any given time. The
120 * architecture is a standard producer, consumer, completion model in
121 * which the driver "produces" receive buffers to the adapter, the
122 * adapter "consumes" the receive buffers by DMAing incoming packet data,
123 * and the driver "completes" the receive buffers by servicing the
124 * incoming packet, then "produces" a new buffer and starts the cycle
125 * again. Receive buffers can be fragmented in up to 16 fragments
126 * (descriptor entries). For simplicity, this driver posts
127 * single-fragment receive buffers of 4608 bytes, then allocates a
128 * sk_buff, copies the data, then reposts the buffer. To reduce CPU
129 * utilization, a better approach would be to pass up the receive
130 * buffer (no extra copy) then allocate and post a replacement buffer.
131 * This is a performance enhancement that should be looked into at
132 * some point.
133 *
134 * Transmit Path -
135 * Like the receive path, the adapter DMA engine supports a 256 entry
136 * transmit descriptor block of which up to 255 entries can be used at
137 * any given time. Transmit buffers can be fragmented in up to 255
138 * fragments (descriptor entries). This driver always posts one
139 * fragment per transmit packet request.
140 *
141 * The fragment contains the entire packet from FC to end of data.
142 * Before posting the buffer to the adapter, the driver sets a three-byte
143 * packet request header (PRH) which is required by the Motorola MAC chip
144 * used on the adapters. The PRH tells the MAC the type of token to
145 * receive/send, whether or not to generate and append the CRC, whether
146 * synchronous or asynchronous framing is used, etc. Since the PRH
147 * definition is not necessarily consistent across all FDDI chipsets,
148 * the driver, rather than the common FDDI packet handler routines,
149 * sets these bytes.
150 *
151 * To reduce the amount of descriptor fetches needed per transmit request,
152 * the driver takes advantage of the fact that there are at least three
153 * bytes available before the skb->data field on the outgoing transmit
154 * request. This is guaranteed by having fddi_setup() in net_init.c set
155 * dev->hard_header_len to 24 bytes. 21 bytes accounts for the largest
156 * header in an 802.2 SNAP frame. The other 3 bytes are the extra "pad"
157 * bytes which we'll use to store the PRH.
158 *
159 * There's a subtle advantage to adding these pad bytes to the
160 * hard_header_len, it ensures that the data portion of the packet for
161 * an 802.2 SNAP frame is longword aligned. Other FDDI driver
162 * implementations may not need the extra padding and can start copying
163 * or DMAing directly from the FC byte which starts at skb->data. Should
164 * another driver implementation need ADDITIONAL padding, the net_init.c
165 * module should be updated and dev->hard_header_len should be increased.
166 * NOTE: To maintain the alignment on the data portion of the packet,
167 * dev->hard_header_len should always be evenly divisible by 4 and at
168 * least 24 bytes in size.
169 *
170 * Modification History:
171 * Date Name Description
172 * 16-Aug-96 LVS Created.
173 * 20-Aug-96 LVS Updated dfx_probe so that version information
174 * string is only displayed if 1 or more cards are
175 * found. Changed dfx_rcv_queue_process to copy
176 * 3 NULL bytes before FC to ensure that data is
177 * longword aligned in receive buffer.
178 * 09-Sep-96 LVS Updated dfx_ctl_set_multicast_list to enable
179 * LLC group promiscuous mode if multicast list
180 * is too large. LLC individual/group promiscuous
181 * mode is now disabled if IFF_PROMISC flag not set.
182 * dfx_xmt_queue_pkt no longer checks for NULL skb
183 * on Alan Cox recommendation. Added node address
184 * override support.
185 * 12-Sep-96 LVS Reset current address to factory address during
186 * device open. Updated transmit path to post a
187 * single fragment which includes PRH->end of data.
188 * Mar 2000 AC Did various cleanups for 2.3.x
189 * Jun 2000 jgarzik PCI and resource alloc cleanups
190 * Jul 2000 tjeerd Much cleanup and some bug fixes
191 * Sep 2000 tjeerd Fix leak on unload, cosmetic code cleanup
192 * Feb 2001 Skb allocation fixes
193 * Feb 2001 davej PCI enable cleanups.
194 * 04 Aug 2003 macro Converted to the DMA API.
195 * 14 Aug 2004 macro Fix device names reported.
Maciej W. Rozyckifeea1db2005-06-20 15:33:03 -0700196 * 14 Jun 2005 macro Use irqreturn_t.
Maciej W. Rozyckib2e68aa2006-10-23 13:53:17 +0100197 * 23 Oct 2006 macro Big-endian host support.
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800198 * 14 Dec 2006 macro TURBOchannel support.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700199 */
200
201/* Include files */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700202#include <linux/bitops.h>
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800203#include <linux/delay.h>
204#include <linux/dma-mapping.h>
205#include <linux/eisa.h>
206#include <linux/errno.h>
207#include <linux/fddidevice.h>
208#include <linux/init.h>
209#include <linux/interrupt.h>
210#include <linux/ioport.h>
211#include <linux/kernel.h>
212#include <linux/module.h>
213#include <linux/netdevice.h>
214#include <linux/pci.h>
215#include <linux/skbuff.h>
216#include <linux/slab.h>
217#include <linux/string.h>
218#include <linux/tc.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -0700219
220#include <asm/byteorder.h>
221#include <asm/io.h>
222
223#include "defxx.h"
224
225/* Version information string should be updated prior to each new release! */
226#define DRV_NAME "defxx"
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800227#define DRV_VERSION "v1.10"
228#define DRV_RELDATE "2006/12/14"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700229
230static char version[] __devinitdata =
231 DRV_NAME ": " DRV_VERSION " " DRV_RELDATE
232 " Lawrence V. Stefani and others\n";
233
234#define DYNAMIC_BUFFERS 1
235
236#define SKBUFF_RX_COPYBREAK 200
237/*
238 * NEW_SKB_SIZE = PI_RCV_DATA_K_SIZE_MAX+128 to allow 128 byte
239 * alignment for compatibility with old EISA boards.
240 */
241#define NEW_SKB_SIZE (PI_RCV_DATA_K_SIZE_MAX+128)
242
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800243#define __unused __attribute__ ((unused))
244
245#ifdef CONFIG_PCI
246#define DFX_BUS_PCI(dev) (dev->bus == &pci_bus_type)
247#else
248#define DFX_BUS_PCI(dev) 0
249#endif
250
251#ifdef CONFIG_EISA
252#define DFX_BUS_EISA(dev) (dev->bus == &eisa_bus_type)
253#else
254#define DFX_BUS_EISA(dev) 0
255#endif
256
257#ifdef CONFIG_TC
258#define DFX_BUS_TC(dev) (dev->bus == &tc_bus_type)
259#else
260#define DFX_BUS_TC(dev) 0
261#endif
262
263#ifdef CONFIG_DEFXX_MMIO
264#define DFX_MMIO 1
265#else
266#define DFX_MMIO 0
267#endif
268
Linus Torvalds1da177e2005-04-16 15:20:36 -0700269/* Define module-wide (static) routines */
270
271static void dfx_bus_init(struct net_device *dev);
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800272static void dfx_bus_uninit(struct net_device *dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700273static void dfx_bus_config_check(DFX_board_t *bp);
274
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800275static int dfx_driver_init(struct net_device *dev,
276 const char *print_name,
277 resource_size_t bar_start);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700278static int dfx_adap_init(DFX_board_t *bp, int get_buffers);
279
280static int dfx_open(struct net_device *dev);
281static int dfx_close(struct net_device *dev);
282
283static void dfx_int_pr_halt_id(DFX_board_t *bp);
284static void dfx_int_type_0_process(DFX_board_t *bp);
285static void dfx_int_common(struct net_device *dev);
David Howells7d12e782006-10-05 14:55:46 +0100286static irqreturn_t dfx_interrupt(int irq, void *dev_id);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700287
288static struct net_device_stats *dfx_ctl_get_stats(struct net_device *dev);
289static void dfx_ctl_set_multicast_list(struct net_device *dev);
290static int dfx_ctl_set_mac_address(struct net_device *dev, void *addr);
291static int dfx_ctl_update_cam(DFX_board_t *bp);
292static int dfx_ctl_update_filters(DFX_board_t *bp);
293
294static int dfx_hw_dma_cmd_req(DFX_board_t *bp);
295static int dfx_hw_port_ctrl_req(DFX_board_t *bp, PI_UINT32 command, PI_UINT32 data_a, PI_UINT32 data_b, PI_UINT32 *host_data);
296static void dfx_hw_adap_reset(DFX_board_t *bp, PI_UINT32 type);
297static int dfx_hw_adap_state_rd(DFX_board_t *bp);
298static int dfx_hw_dma_uninit(DFX_board_t *bp, PI_UINT32 type);
299
300static int dfx_rcv_init(DFX_board_t *bp, int get_buffers);
301static void dfx_rcv_queue_process(DFX_board_t *bp);
302static void dfx_rcv_flush(DFX_board_t *bp);
303
304static int dfx_xmt_queue_pkt(struct sk_buff *skb, struct net_device *dev);
305static int dfx_xmt_done(DFX_board_t *bp);
306static void dfx_xmt_flush(DFX_board_t *bp);
307
308/* Define module-wide (static) variables */
309
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800310static struct pci_driver dfx_pci_driver;
311static struct eisa_driver dfx_eisa_driver;
312static struct tc_driver dfx_tc_driver;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700313
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400314
Linus Torvalds1da177e2005-04-16 15:20:36 -0700315/*
316 * =======================
Linus Torvalds1da177e2005-04-16 15:20:36 -0700317 * = dfx_port_write_long =
318 * = dfx_port_read_long =
319 * =======================
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400320 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700321 * Overview:
322 * Routines for reading and writing values from/to adapter
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400323 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700324 * Returns:
325 * None
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400326 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700327 * Arguments:
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800328 * bp - pointer to board information
329 * offset - register offset from base I/O address
330 * data - for dfx_port_write_long, this is a value to write;
331 * for dfx_port_read_long, this is a pointer to store
332 * the read value
Linus Torvalds1da177e2005-04-16 15:20:36 -0700333 *
334 * Functional Description:
335 * These routines perform the correct operation to read or write
336 * the adapter register.
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400337 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700338 * EISA port block base addresses are based on the slot number in which the
339 * controller is installed. For example, if the EISA controller is installed
340 * in slot 4, the port block base address is 0x4000. If the controller is
341 * installed in slot 2, the port block base address is 0x2000, and so on.
342 * This port block can be used to access PDQ, ESIC, and DEFEA on-board
343 * registers using the register offsets defined in DEFXX.H.
344 *
345 * PCI port block base addresses are assigned by the PCI BIOS or system
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800346 * firmware. There is one 128 byte port block which can be accessed. It
Linus Torvalds1da177e2005-04-16 15:20:36 -0700347 * allows for I/O mapping of both PDQ and PFI registers using the register
348 * offsets defined in DEFXX.H.
349 *
350 * Return Codes:
351 * None
352 *
353 * Assumptions:
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800354 * bp->base is a valid base I/O address for this adapter.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700355 * offset is a valid register offset for this adapter.
356 *
357 * Side Effects:
358 * Rather than produce macros for these functions, these routines
359 * are defined using "inline" to ensure that the compiler will
360 * generate inline code and not waste a procedure call and return.
361 * This provides all the benefits of macros, but with the
362 * advantage of strict data type checking.
363 */
364
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800365static inline void dfx_writel(DFX_board_t *bp, int offset, u32 data)
366{
367 writel(data, bp->base.mem + offset);
368 mb();
369}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700370
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800371static inline void dfx_outl(DFX_board_t *bp, int offset, u32 data)
372{
373 outl(data, bp->base.port + offset);
374}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700375
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800376static void dfx_port_write_long(DFX_board_t *bp, int offset, u32 data)
377{
378 struct device __unused *bdev = bp->bus_dev;
379 int dfx_bus_tc = DFX_BUS_TC(bdev);
380 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700381
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800382 if (dfx_use_mmio)
383 dfx_writel(bp, offset, data);
384 else
385 dfx_outl(bp, offset, data);
386}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700387
Linus Torvalds1da177e2005-04-16 15:20:36 -0700388
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800389static inline void dfx_readl(DFX_board_t *bp, int offset, u32 *data)
390{
391 mb();
392 *data = readl(bp->base.mem + offset);
393}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700394
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800395static inline void dfx_inl(DFX_board_t *bp, int offset, u32 *data)
396{
397 *data = inl(bp->base.port + offset);
398}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700399
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800400static void dfx_port_read_long(DFX_board_t *bp, int offset, u32 *data)
401{
402 struct device __unused *bdev = bp->bus_dev;
403 int dfx_bus_tc = DFX_BUS_TC(bdev);
404 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700405
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800406 if (dfx_use_mmio)
407 dfx_readl(bp, offset, data);
408 else
409 dfx_inl(bp, offset, data);
410}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700411
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400412
Linus Torvalds1da177e2005-04-16 15:20:36 -0700413/*
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800414 * ================
415 * = dfx_get_bars =
416 * ================
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400417 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700418 * Overview:
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800419 * Retrieves the address range used to access control and status
420 * registers.
421 *
422 * Returns:
423 * None
424 *
425 * Arguments:
426 * bdev - pointer to device information
427 * bar_start - pointer to store the start address
428 * bar_len - pointer to store the length of the area
429 *
430 * Assumptions:
431 * I am sure there are some.
432 *
433 * Side Effects:
434 * None
435 */
436static void dfx_get_bars(struct device *bdev,
437 resource_size_t *bar_start, resource_size_t *bar_len)
438{
439 int dfx_bus_pci = DFX_BUS_PCI(bdev);
440 int dfx_bus_eisa = DFX_BUS_EISA(bdev);
441 int dfx_bus_tc = DFX_BUS_TC(bdev);
442 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
443
444 if (dfx_bus_pci) {
445 int num = dfx_use_mmio ? 0 : 1;
446
447 *bar_start = pci_resource_start(to_pci_dev(bdev), num);
448 *bar_len = pci_resource_len(to_pci_dev(bdev), num);
449 }
450 if (dfx_bus_eisa) {
451 unsigned long base_addr = to_eisa_device(bdev)->base_addr;
452 resource_size_t bar;
453
454 if (dfx_use_mmio) {
455 bar = inb(base_addr + PI_ESIC_K_MEM_ADD_CMP_2);
456 bar <<= 8;
457 bar |= inb(base_addr + PI_ESIC_K_MEM_ADD_CMP_1);
458 bar <<= 8;
459 bar |= inb(base_addr + PI_ESIC_K_MEM_ADD_CMP_0);
460 bar <<= 16;
461 *bar_start = bar;
462 bar = inb(base_addr + PI_ESIC_K_MEM_ADD_MASK_2);
463 bar <<= 8;
464 bar |= inb(base_addr + PI_ESIC_K_MEM_ADD_MASK_1);
465 bar <<= 8;
466 bar |= inb(base_addr + PI_ESIC_K_MEM_ADD_MASK_0);
467 bar <<= 16;
468 *bar_len = (bar | PI_MEM_ADD_MASK_M) + 1;
469 } else {
470 *bar_start = base_addr;
471 *bar_len = PI_ESIC_K_CSR_IO_LEN;
472 }
473 }
474 if (dfx_bus_tc) {
475 *bar_start = to_tc_dev(bdev)->resource.start +
476 PI_TC_K_CSR_OFFSET;
477 *bar_len = PI_TC_K_CSR_LEN;
478 }
479}
480
481/*
482 * ================
483 * = dfx_register =
484 * ================
485 *
486 * Overview:
487 * Initializes a supported FDDI controller
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400488 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700489 * Returns:
490 * Condition code
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400491 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700492 * Arguments:
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800493 * bdev - pointer to device information
Linus Torvalds1da177e2005-04-16 15:20:36 -0700494 *
495 * Functional Description:
496 *
497 * Return Codes:
498 * 0 - This device (fddi0, fddi1, etc) configured successfully
499 * -EBUSY - Failed to get resources, or dfx_driver_init failed.
500 *
501 * Assumptions:
502 * It compiles so it should work :-( (PCI cards do :-)
503 *
504 * Side Effects:
505 * Device structures for FDDI adapters (fddi0, fddi1, etc) are
506 * initialized and the board resources are read and stored in
507 * the device structure.
508 */
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800509static int __devinit dfx_register(struct device *bdev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700510{
511 static int version_disp;
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800512 int dfx_bus_pci = DFX_BUS_PCI(bdev);
513 int dfx_bus_tc = DFX_BUS_TC(bdev);
514 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
515 char *print_name = bdev->bus_id;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700516 struct net_device *dev;
517 DFX_board_t *bp; /* board pointer */
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800518 resource_size_t bar_start = 0; /* pointer to port */
519 resource_size_t bar_len = 0; /* resource length */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700520 int alloc_size; /* total buffer size used */
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800521 struct resource *region;
522 int err = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700523
524 if (!version_disp) { /* display version info if adapter is found */
525 version_disp = 1; /* set display flag to TRUE so that */
526 printk(version); /* we only display this string ONCE */
527 }
528
Linus Torvalds1da177e2005-04-16 15:20:36 -0700529 dev = alloc_fddidev(sizeof(*bp));
530 if (!dev) {
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800531 printk(KERN_ERR "%s: Unable to allocate fddidev, aborting\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700532 print_name);
533 return -ENOMEM;
534 }
535
536 /* Enable PCI device. */
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800537 if (dfx_bus_pci && pci_enable_device(to_pci_dev(bdev))) {
538 printk(KERN_ERR "%s: Cannot enable PCI device, aborting\n",
539 print_name);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700540 goto err_out;
541 }
542
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800543 SET_MODULE_OWNER(dev);
544 SET_NETDEV_DEV(dev, bdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700545
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800546 bp = netdev_priv(dev);
547 bp->bus_dev = bdev;
548 dev_set_drvdata(bdev, dev);
549
550 dfx_get_bars(bdev, &bar_start, &bar_len);
551
552 if (dfx_use_mmio)
553 region = request_mem_region(bar_start, bar_len, print_name);
554 else
555 region = request_region(bar_start, bar_len, print_name);
556 if (!region) {
557 printk(KERN_ERR "%s: Cannot reserve I/O resource "
558 "0x%lx @ 0x%lx, aborting\n",
559 print_name, (long)bar_len, (long)bar_start);
560 err = -EBUSY;
561 goto err_out_disable;
562 }
563
564 /* Set up I/O base address. */
565 if (dfx_use_mmio) {
566 bp->base.mem = ioremap_nocache(bar_start, bar_len);
567 if (!bp->base.mem) {
568 printk(KERN_ERR "%s: Cannot map MMIO\n", print_name);
569 goto err_out_region;
570 }
571 } else {
572 bp->base.port = bar_start;
573 dev->base_addr = bar_start;
574 }
575
576 /* Initialize new device structure */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700577
578 dev->get_stats = dfx_ctl_get_stats;
579 dev->open = dfx_open;
580 dev->stop = dfx_close;
581 dev->hard_start_xmit = dfx_xmt_queue_pkt;
582 dev->set_multicast_list = dfx_ctl_set_multicast_list;
583 dev->set_mac_address = dfx_ctl_set_mac_address;
584
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800585 if (dfx_bus_pci)
586 pci_set_master(to_pci_dev(bdev));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700587
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800588 if (dfx_driver_init(dev, print_name, bar_start) != DFX_K_SUCCESS) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700589 err = -ENODEV;
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800590 goto err_out_unmap;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700591 }
592
593 err = register_netdev(dev);
594 if (err)
595 goto err_out_kfree;
596
597 printk("%s: registered as %s\n", print_name, dev->name);
598 return 0;
599
600err_out_kfree:
601 alloc_size = sizeof(PI_DESCR_BLOCK) +
602 PI_CMD_REQ_K_SIZE_MAX + PI_CMD_RSP_K_SIZE_MAX +
603#ifndef DYNAMIC_BUFFERS
604 (bp->rcv_bufs_to_post * PI_RCV_DATA_K_SIZE_MAX) +
605#endif
606 sizeof(PI_CONSUMER_BLOCK) +
607 (PI_ALIGN_K_DESC_BLK - 1);
608 if (bp->kmalloced)
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800609 dma_free_coherent(bdev, alloc_size,
610 bp->kmalloced, bp->kmalloced_dma);
611
612err_out_unmap:
613 if (dfx_use_mmio)
614 iounmap(bp->base.mem);
615
Linus Torvalds1da177e2005-04-16 15:20:36 -0700616err_out_region:
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800617 if (dfx_use_mmio)
618 release_mem_region(bar_start, bar_len);
619 else
620 release_region(bar_start, bar_len);
621
622err_out_disable:
623 if (dfx_bus_pci)
624 pci_disable_device(to_pci_dev(bdev));
625
Linus Torvalds1da177e2005-04-16 15:20:36 -0700626err_out:
627 free_netdev(dev);
628 return err;
629}
630
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400631
Linus Torvalds1da177e2005-04-16 15:20:36 -0700632/*
633 * ================
634 * = dfx_bus_init =
635 * ================
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400636 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700637 * Overview:
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800638 * Initializes the bus-specific controller logic.
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400639 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700640 * Returns:
641 * None
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400642 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700643 * Arguments:
644 * dev - pointer to device information
645 *
646 * Functional Description:
647 * Determine and save adapter IRQ in device table,
648 * then perform bus-specific logic initialization.
649 *
650 * Return Codes:
651 * None
652 *
653 * Assumptions:
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800654 * bp->base has already been set with the proper
Linus Torvalds1da177e2005-04-16 15:20:36 -0700655 * base I/O address for this device.
656 *
657 * Side Effects:
658 * Interrupts are enabled at the adapter bus-specific logic.
659 * Note: Interrupts at the DMA engine (PDQ chip) are not
660 * enabled yet.
661 */
662
663static void __devinit dfx_bus_init(struct net_device *dev)
664{
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800665 DFX_board_t *bp = netdev_priv(dev);
666 struct device *bdev = bp->bus_dev;
667 int dfx_bus_pci = DFX_BUS_PCI(bdev);
668 int dfx_bus_eisa = DFX_BUS_EISA(bdev);
669 int dfx_bus_tc = DFX_BUS_TC(bdev);
670 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
671 u8 val;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700672
673 DBG_printk("In dfx_bus_init...\n");
674
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800675 /* Initialize a pointer back to the net_device struct */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700676 bp->dev = dev;
677
678 /* Initialize adapter based on bus type */
679
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800680 if (dfx_bus_tc)
681 dev->irq = to_tc_dev(bdev)->interrupt;
682 if (dfx_bus_eisa) {
683 unsigned long base_addr = to_eisa_device(bdev)->base_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700684
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800685 /* Get the interrupt level from the ESIC chip. */
686 val = inb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0);
687 val &= PI_CONFIG_STAT_0_M_IRQ;
688 val >>= PI_CONFIG_STAT_0_V_IRQ;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700689
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800690 switch (val) {
691 case PI_CONFIG_STAT_0_IRQ_K_9:
692 dev->irq = 9;
693 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700694
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800695 case PI_CONFIG_STAT_0_IRQ_K_10:
696 dev->irq = 10;
697 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700698
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800699 case PI_CONFIG_STAT_0_IRQ_K_11:
700 dev->irq = 11;
701 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700702
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800703 case PI_CONFIG_STAT_0_IRQ_K_15:
704 dev->irq = 15;
705 break;
706 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700707
708 /*
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800709 * Enable memory decoding (MEMCS0) and/or port decoding
710 * (IOCS1/IOCS0) as appropriate in Function Control
711 * Register. One of the port chip selects seems to be
712 * used for the Burst Holdoff register, but this bit of
713 * documentation is missing and as yet it has not been
714 * determined which of the two. This is also the reason
715 * the size of the decoded port range is twice as large
716 * as one required by the PDQ.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700717 */
718
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800719 /* Set the decode range of the board. */
720 val = ((bp->base.port >> 12) << PI_IO_CMP_V_SLOT);
721 outb(base_addr + PI_ESIC_K_IO_ADD_CMP_0_1, val);
722 outb(base_addr + PI_ESIC_K_IO_ADD_CMP_0_0, 0);
723 outb(base_addr + PI_ESIC_K_IO_ADD_CMP_1_1, val);
724 outb(base_addr + PI_ESIC_K_IO_ADD_CMP_1_0, 0);
725 val = PI_ESIC_K_CSR_IO_LEN - 1;
726 outb(base_addr + PI_ESIC_K_IO_ADD_MASK_0_1, (val >> 8) & 0xff);
727 outb(base_addr + PI_ESIC_K_IO_ADD_MASK_0_0, val & 0xff);
728 outb(base_addr + PI_ESIC_K_IO_ADD_MASK_1_1, (val >> 8) & 0xff);
729 outb(base_addr + PI_ESIC_K_IO_ADD_MASK_1_0, val & 0xff);
730
731 /* Enable the decoders. */
732 val = PI_FUNCTION_CNTRL_M_IOCS1 | PI_FUNCTION_CNTRL_M_IOCS0;
733 if (dfx_use_mmio)
734 val |= PI_FUNCTION_CNTRL_M_MEMCS0;
735 outb(base_addr + PI_ESIC_K_FUNCTION_CNTRL, val);
736
737 /*
738 * Enable access to the rest of the module
739 * (including PDQ and packet memory).
740 */
741 val = PI_SLOT_CNTRL_M_ENB;
742 outb(base_addr + PI_ESIC_K_SLOT_CNTRL, val);
743
744 /*
745 * Map PDQ registers into memory or port space. This is
746 * done with a bit in the Burst Holdoff register.
747 */
748 val = inb(base_addr + PI_DEFEA_K_BURST_HOLDOFF);
749 if (dfx_use_mmio)
750 val |= PI_BURST_HOLDOFF_V_MEM_MAP;
751 else
752 val &= ~PI_BURST_HOLDOFF_V_MEM_MAP;
753 outb(base_addr + PI_DEFEA_K_BURST_HOLDOFF, val);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700754
755 /* Enable interrupts at EISA bus interface chip (ESIC) */
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800756 val = inb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0);
757 val |= PI_CONFIG_STAT_0_M_INT_ENB;
758 outb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0, val);
759 }
760 if (dfx_bus_pci) {
761 struct pci_dev *pdev = to_pci_dev(bdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700762
763 /* Get the interrupt level from the PCI Configuration Table */
764
765 dev->irq = pdev->irq;
766
767 /* Check Latency Timer and set if less than minimal */
768
769 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &val);
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800770 if (val < PFI_K_LAT_TIMER_MIN) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700771 val = PFI_K_LAT_TIMER_DEF;
772 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, val);
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800773 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700774
775 /* Enable interrupts at PCI bus interface chip (PFI) */
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800776 val = PFI_MODE_M_PDQ_INT_ENB | PFI_MODE_M_DMA_ENB;
777 dfx_port_write_long(bp, PFI_K_REG_MODE_CTRL, val);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700778 }
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800779}
780
781/*
782 * ==================
783 * = dfx_bus_uninit =
784 * ==================
785 *
786 * Overview:
787 * Uninitializes the bus-specific controller logic.
788 *
789 * Returns:
790 * None
791 *
792 * Arguments:
793 * dev - pointer to device information
794 *
795 * Functional Description:
796 * Perform bus-specific logic uninitialization.
797 *
798 * Return Codes:
799 * None
800 *
801 * Assumptions:
802 * bp->base has already been set with the proper
803 * base I/O address for this device.
804 *
805 * Side Effects:
806 * Interrupts are disabled at the adapter bus-specific logic.
807 */
808
809static void __devinit dfx_bus_uninit(struct net_device *dev)
810{
811 DFX_board_t *bp = netdev_priv(dev);
812 struct device *bdev = bp->bus_dev;
813 int dfx_bus_pci = DFX_BUS_PCI(bdev);
814 int dfx_bus_eisa = DFX_BUS_EISA(bdev);
815 u8 val;
816
817 DBG_printk("In dfx_bus_uninit...\n");
818
819 /* Uninitialize adapter based on bus type */
820
821 if (dfx_bus_eisa) {
822 unsigned long base_addr = to_eisa_device(bdev)->base_addr;
823
824 /* Disable interrupts at EISA bus interface chip (ESIC) */
825 val = inb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0);
826 val &= ~PI_CONFIG_STAT_0_M_INT_ENB;
827 outb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0, val);
828 }
829 if (dfx_bus_pci) {
830 /* Disable interrupts at PCI bus interface chip (PFI) */
831 dfx_port_write_long(bp, PFI_K_REG_MODE_CTRL, 0);
832 }
833}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700834
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400835
Linus Torvalds1da177e2005-04-16 15:20:36 -0700836/*
837 * ========================
838 * = dfx_bus_config_check =
839 * ========================
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400840 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700841 * Overview:
842 * Checks the configuration (burst size, full-duplex, etc.) If any parameters
843 * are illegal, then this routine will set new defaults.
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400844 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700845 * Returns:
846 * None
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400847 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700848 * Arguments:
849 * bp - pointer to board information
850 *
851 * Functional Description:
852 * For Revision 1 FDDI EISA, Revision 2 or later FDDI EISA with rev E or later
853 * PDQ, and all FDDI PCI controllers, all values are legal.
854 *
855 * Return Codes:
856 * None
857 *
858 * Assumptions:
859 * dfx_adap_init has NOT been called yet so burst size and other items have
860 * not been set.
861 *
862 * Side Effects:
863 * None
864 */
865
866static void __devinit dfx_bus_config_check(DFX_board_t *bp)
867{
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800868 struct device __unused *bdev = bp->bus_dev;
869 int dfx_bus_eisa = DFX_BUS_EISA(bdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700870 int status; /* return code from adapter port control call */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700871 u32 host_data; /* LW data returned from port control call */
872
873 DBG_printk("In dfx_bus_config_check...\n");
874
875 /* Configuration check only valid for EISA adapter */
876
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800877 if (dfx_bus_eisa) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700878 /*
879 * First check if revision 2 EISA controller. Rev. 1 cards used
880 * PDQ revision B, so no workaround needed in this case. Rev. 3
881 * cards used PDQ revision E, so no workaround needed in this
882 * case, either. Only Rev. 2 cards used either Rev. D or E
883 * chips, so we must verify the chip revision on Rev. 2 cards.
884 */
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800885 if (to_eisa_device(bdev)->id.driver_data == DEFEA_PROD_ID_2) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700886 /*
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800887 * Revision 2 FDDI EISA controller found,
888 * so let's check PDQ revision of adapter.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700889 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700890 status = dfx_hw_port_ctrl_req(bp,
891 PI_PCTRL_M_SUB_CMD,
892 PI_SUB_CMD_K_PDQ_REV_GET,
893 0,
894 &host_data);
895 if ((status != DFX_K_SUCCESS) || (host_data == 2))
896 {
897 /*
898 * Either we couldn't determine the PDQ revision, or
899 * we determined that it is at revision D. In either case,
900 * we need to implement the workaround.
901 */
902
903 /* Ensure that the burst size is set to 8 longwords or less */
904
905 switch (bp->burst_size)
906 {
907 case PI_PDATA_B_DMA_BURST_SIZE_32:
908 case PI_PDATA_B_DMA_BURST_SIZE_16:
909 bp->burst_size = PI_PDATA_B_DMA_BURST_SIZE_8;
910 break;
911
912 default:
913 break;
914 }
915
916 /* Ensure that full-duplex mode is not enabled */
917
918 bp->full_duplex_enb = PI_SNMP_K_FALSE;
919 }
920 }
921 }
922 }
923
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400924
Linus Torvalds1da177e2005-04-16 15:20:36 -0700925/*
926 * ===================
927 * = dfx_driver_init =
928 * ===================
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400929 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700930 * Overview:
931 * Initializes remaining adapter board structure information
932 * and makes sure adapter is in a safe state prior to dfx_open().
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400933 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700934 * Returns:
935 * Condition code
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400936 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700937 * Arguments:
938 * dev - pointer to device information
939 * print_name - printable device name
940 *
941 * Functional Description:
942 * This function allocates additional resources such as the host memory
943 * blocks needed by the adapter (eg. descriptor and consumer blocks).
944 * Remaining bus initialization steps are also completed. The adapter
945 * is also reset so that it is in the DMA_UNAVAILABLE state. The OS
946 * must call dfx_open() to open the adapter and bring it on-line.
947 *
948 * Return Codes:
949 * DFX_K_SUCCESS - initialization succeeded
950 * DFX_K_FAILURE - initialization failed - could not allocate memory
951 * or read adapter MAC address
952 *
953 * Assumptions:
954 * Memory allocated from pci_alloc_consistent() call is physically
955 * contiguous, locked memory.
956 *
957 * Side Effects:
958 * Adapter is reset and should be in DMA_UNAVAILABLE state before
959 * returning from this routine.
960 */
961
962static int __devinit dfx_driver_init(struct net_device *dev,
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800963 const char *print_name,
964 resource_size_t bar_start)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700965{
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -0800966 DFX_board_t *bp = netdev_priv(dev);
967 struct device *bdev = bp->bus_dev;
968 int dfx_bus_pci = DFX_BUS_PCI(bdev);
969 int dfx_bus_eisa = DFX_BUS_EISA(bdev);
970 int dfx_bus_tc = DFX_BUS_TC(bdev);
971 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
972 int alloc_size; /* total buffer size needed */
973 char *top_v, *curr_v; /* virtual addrs into memory block */
974 dma_addr_t top_p, curr_p; /* physical addrs into memory block */
975 u32 data, le32; /* host data register value */
976 char *board_name = NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700977
978 DBG_printk("In dfx_driver_init...\n");
979
980 /* Initialize bus-specific hardware registers */
981
982 dfx_bus_init(dev);
983
984 /*
985 * Initialize default values for configurable parameters
986 *
987 * Note: All of these parameters are ones that a user may
988 * want to customize. It'd be nice to break these
989 * out into Space.c or someplace else that's more
990 * accessible/understandable than this file.
991 */
992
993 bp->full_duplex_enb = PI_SNMP_K_FALSE;
994 bp->req_ttrt = 8 * 12500; /* 8ms in 80 nanosec units */
995 bp->burst_size = PI_PDATA_B_DMA_BURST_SIZE_DEF;
996 bp->rcv_bufs_to_post = RCV_BUFS_DEF;
997
998 /*
999 * Ensure that HW configuration is OK
1000 *
1001 * Note: Depending on the hardware revision, we may need to modify
1002 * some of the configurable parameters to workaround hardware
1003 * limitations. We'll perform this configuration check AFTER
1004 * setting the parameters to their default values.
1005 */
1006
1007 dfx_bus_config_check(bp);
1008
1009 /* Disable PDQ interrupts first */
1010
1011 dfx_port_write_long(bp, PI_PDQ_K_REG_HOST_INT_ENB, PI_HOST_INT_K_DISABLE_ALL_INTS);
1012
1013 /* Place adapter in DMA_UNAVAILABLE state by resetting adapter */
1014
1015 (void) dfx_hw_dma_uninit(bp, PI_PDATA_A_RESET_M_SKIP_ST);
1016
1017 /* Read the factory MAC address from the adapter then save it */
1018
1019 if (dfx_hw_port_ctrl_req(bp, PI_PCTRL_M_MLA, PI_PDATA_A_MLA_K_LO, 0,
1020 &data) != DFX_K_SUCCESS) {
1021 printk("%s: Could not read adapter factory MAC address!\n",
1022 print_name);
1023 return(DFX_K_FAILURE);
1024 }
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08001025 le32 = cpu_to_le32(data);
1026 memcpy(&bp->factory_mac_addr[0], &le32, sizeof(u32));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001027
1028 if (dfx_hw_port_ctrl_req(bp, PI_PCTRL_M_MLA, PI_PDATA_A_MLA_K_HI, 0,
1029 &data) != DFX_K_SUCCESS) {
1030 printk("%s: Could not read adapter factory MAC address!\n",
1031 print_name);
1032 return(DFX_K_FAILURE);
1033 }
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08001034 le32 = cpu_to_le32(data);
1035 memcpy(&bp->factory_mac_addr[4], &le32, sizeof(u16));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001036
1037 /*
1038 * Set current address to factory address
1039 *
1040 * Note: Node address override support is handled through
1041 * dfx_ctl_set_mac_address.
1042 */
1043
1044 memcpy(dev->dev_addr, bp->factory_mac_addr, FDDI_K_ALEN);
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08001045 if (dfx_bus_tc)
1046 board_name = "DEFTA";
1047 if (dfx_bus_eisa)
1048 board_name = "DEFEA";
1049 if (dfx_bus_pci)
1050 board_name = "DEFPA";
1051 pr_info("%s: %s at %saddr = 0x%llx, IRQ = %d, "
1052 "Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n",
1053 print_name, board_name, dfx_use_mmio ? "" : "I/O ",
1054 (long long)bar_start, dev->irq,
1055 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
1056 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001057
1058 /*
1059 * Get memory for descriptor block, consumer block, and other buffers
1060 * that need to be DMA read or written to by the adapter.
1061 */
1062
1063 alloc_size = sizeof(PI_DESCR_BLOCK) +
1064 PI_CMD_REQ_K_SIZE_MAX +
1065 PI_CMD_RSP_K_SIZE_MAX +
1066#ifndef DYNAMIC_BUFFERS
1067 (bp->rcv_bufs_to_post * PI_RCV_DATA_K_SIZE_MAX) +
1068#endif
1069 sizeof(PI_CONSUMER_BLOCK) +
1070 (PI_ALIGN_K_DESC_BLK - 1);
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08001071 bp->kmalloced = top_v = dma_alloc_coherent(bp->bus_dev, alloc_size,
1072 &bp->kmalloced_dma,
1073 GFP_ATOMIC);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001074 if (top_v == NULL) {
1075 printk("%s: Could not allocate memory for host buffers "
1076 "and structures!\n", print_name);
1077 return(DFX_K_FAILURE);
1078 }
1079 memset(top_v, 0, alloc_size); /* zero out memory before continuing */
1080 top_p = bp->kmalloced_dma; /* get physical address of buffer */
1081
1082 /*
1083 * To guarantee the 8K alignment required for the descriptor block, 8K - 1
1084 * plus the amount of memory needed was allocated. The physical address
1085 * is now 8K aligned. By carving up the memory in a specific order,
1086 * we'll guarantee the alignment requirements for all other structures.
1087 *
1088 * Note: If the assumptions change regarding the non-paged, non-cached,
1089 * physically contiguous nature of the memory block or the address
1090 * alignments, then we'll need to implement a different algorithm
1091 * for allocating the needed memory.
1092 */
1093
1094 curr_p = ALIGN(top_p, PI_ALIGN_K_DESC_BLK);
1095 curr_v = top_v + (curr_p - top_p);
1096
1097 /* Reserve space for descriptor block */
1098
1099 bp->descr_block_virt = (PI_DESCR_BLOCK *) curr_v;
1100 bp->descr_block_phys = curr_p;
1101 curr_v += sizeof(PI_DESCR_BLOCK);
1102 curr_p += sizeof(PI_DESCR_BLOCK);
1103
1104 /* Reserve space for command request buffer */
1105
1106 bp->cmd_req_virt = (PI_DMA_CMD_REQ *) curr_v;
1107 bp->cmd_req_phys = curr_p;
1108 curr_v += PI_CMD_REQ_K_SIZE_MAX;
1109 curr_p += PI_CMD_REQ_K_SIZE_MAX;
1110
1111 /* Reserve space for command response buffer */
1112
1113 bp->cmd_rsp_virt = (PI_DMA_CMD_RSP *) curr_v;
1114 bp->cmd_rsp_phys = curr_p;
1115 curr_v += PI_CMD_RSP_K_SIZE_MAX;
1116 curr_p += PI_CMD_RSP_K_SIZE_MAX;
1117
1118 /* Reserve space for the LLC host receive queue buffers */
1119
1120 bp->rcv_block_virt = curr_v;
1121 bp->rcv_block_phys = curr_p;
1122
1123#ifndef DYNAMIC_BUFFERS
1124 curr_v += (bp->rcv_bufs_to_post * PI_RCV_DATA_K_SIZE_MAX);
1125 curr_p += (bp->rcv_bufs_to_post * PI_RCV_DATA_K_SIZE_MAX);
1126#endif
1127
1128 /* Reserve space for the consumer block */
1129
1130 bp->cons_block_virt = (PI_CONSUMER_BLOCK *) curr_v;
1131 bp->cons_block_phys = curr_p;
1132
1133 /* Display virtual and physical addresses if debug driver */
1134
1135 DBG_printk("%s: Descriptor block virt = %0lX, phys = %0X\n",
1136 print_name,
1137 (long)bp->descr_block_virt, bp->descr_block_phys);
1138 DBG_printk("%s: Command Request buffer virt = %0lX, phys = %0X\n",
1139 print_name, (long)bp->cmd_req_virt, bp->cmd_req_phys);
1140 DBG_printk("%s: Command Response buffer virt = %0lX, phys = %0X\n",
1141 print_name, (long)bp->cmd_rsp_virt, bp->cmd_rsp_phys);
1142 DBG_printk("%s: Receive buffer block virt = %0lX, phys = %0X\n",
1143 print_name, (long)bp->rcv_block_virt, bp->rcv_block_phys);
1144 DBG_printk("%s: Consumer block virt = %0lX, phys = %0X\n",
1145 print_name, (long)bp->cons_block_virt, bp->cons_block_phys);
1146
1147 return(DFX_K_SUCCESS);
1148}
1149
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001150
Linus Torvalds1da177e2005-04-16 15:20:36 -07001151/*
1152 * =================
1153 * = dfx_adap_init =
1154 * =================
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001155 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001156 * Overview:
1157 * Brings the adapter to the link avail/link unavailable state.
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001158 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001159 * Returns:
1160 * Condition code
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001161 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001162 * Arguments:
1163 * bp - pointer to board information
1164 * get_buffers - non-zero if buffers to be allocated
1165 *
1166 * Functional Description:
1167 * Issues the low-level firmware/hardware calls necessary to bring
1168 * the adapter up, or to properly reset and restore adapter during
1169 * run-time.
1170 *
1171 * Return Codes:
1172 * DFX_K_SUCCESS - Adapter brought up successfully
1173 * DFX_K_FAILURE - Adapter initialization failed
1174 *
1175 * Assumptions:
1176 * bp->reset_type should be set to a valid reset type value before
1177 * calling this routine.
1178 *
1179 * Side Effects:
1180 * Adapter should be in LINK_AVAILABLE or LINK_UNAVAILABLE state
1181 * upon a successful return of this routine.
1182 */
1183
1184static int dfx_adap_init(DFX_board_t *bp, int get_buffers)
1185 {
1186 DBG_printk("In dfx_adap_init...\n");
1187
1188 /* Disable PDQ interrupts first */
1189
1190 dfx_port_write_long(bp, PI_PDQ_K_REG_HOST_INT_ENB, PI_HOST_INT_K_DISABLE_ALL_INTS);
1191
1192 /* Place adapter in DMA_UNAVAILABLE state by resetting adapter */
1193
1194 if (dfx_hw_dma_uninit(bp, bp->reset_type) != DFX_K_SUCCESS)
1195 {
1196 printk("%s: Could not uninitialize/reset adapter!\n", bp->dev->name);
1197 return(DFX_K_FAILURE);
1198 }
1199
1200 /*
1201 * When the PDQ is reset, some false Type 0 interrupts may be pending,
1202 * so we'll acknowledge all Type 0 interrupts now before continuing.
1203 */
1204
1205 dfx_port_write_long(bp, PI_PDQ_K_REG_TYPE_0_STATUS, PI_HOST_INT_K_ACK_ALL_TYPE_0);
1206
1207 /*
1208 * Clear Type 1 and Type 2 registers before going to DMA_AVAILABLE state
1209 *
1210 * Note: We only need to clear host copies of these registers. The PDQ reset
1211 * takes care of the on-board register values.
1212 */
1213
1214 bp->cmd_req_reg.lword = 0;
1215 bp->cmd_rsp_reg.lword = 0;
1216 bp->rcv_xmt_reg.lword = 0;
1217
1218 /* Clear consumer block before going to DMA_AVAILABLE state */
1219
1220 memset(bp->cons_block_virt, 0, sizeof(PI_CONSUMER_BLOCK));
1221
1222 /* Initialize the DMA Burst Size */
1223
1224 if (dfx_hw_port_ctrl_req(bp,
1225 PI_PCTRL_M_SUB_CMD,
1226 PI_SUB_CMD_K_BURST_SIZE_SET,
1227 bp->burst_size,
1228 NULL) != DFX_K_SUCCESS)
1229 {
1230 printk("%s: Could not set adapter burst size!\n", bp->dev->name);
1231 return(DFX_K_FAILURE);
1232 }
1233
1234 /*
1235 * Set base address of Consumer Block
1236 *
1237 * Assumption: 32-bit physical address of consumer block is 64 byte
1238 * aligned. That is, bits 0-5 of the address must be zero.
1239 */
1240
1241 if (dfx_hw_port_ctrl_req(bp,
1242 PI_PCTRL_M_CONS_BLOCK,
1243 bp->cons_block_phys,
1244 0,
1245 NULL) != DFX_K_SUCCESS)
1246 {
1247 printk("%s: Could not set consumer block address!\n", bp->dev->name);
1248 return(DFX_K_FAILURE);
1249 }
1250
1251 /*
Maciej W. Rozyckib2e68aa2006-10-23 13:53:17 +01001252 * Set the base address of Descriptor Block and bring adapter
1253 * to DMA_AVAILABLE state.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001254 *
Maciej W. Rozyckib2e68aa2006-10-23 13:53:17 +01001255 * Note: We also set the literal and data swapping requirements
1256 * in this command.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001257 *
Maciej W. Rozyckib2e68aa2006-10-23 13:53:17 +01001258 * Assumption: 32-bit physical address of descriptor block
1259 * is 8Kbyte aligned.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001260 */
Maciej W. Rozyckib2e68aa2006-10-23 13:53:17 +01001261 if (dfx_hw_port_ctrl_req(bp, PI_PCTRL_M_INIT,
1262 (u32)(bp->descr_block_phys |
1263 PI_PDATA_A_INIT_M_BSWAP_INIT),
1264 0, NULL) != DFX_K_SUCCESS) {
1265 printk("%s: Could not set descriptor block address!\n",
1266 bp->dev->name);
1267 return DFX_K_FAILURE;
1268 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001269
1270 /* Set transmit flush timeout value */
1271
1272 bp->cmd_req_virt->cmd_type = PI_CMD_K_CHARS_SET;
1273 bp->cmd_req_virt->char_set.item[0].item_code = PI_ITEM_K_FLUSH_TIME;
1274 bp->cmd_req_virt->char_set.item[0].value = 3; /* 3 seconds */
1275 bp->cmd_req_virt->char_set.item[0].item_index = 0;
1276 bp->cmd_req_virt->char_set.item[1].item_code = PI_ITEM_K_EOL;
1277 if (dfx_hw_dma_cmd_req(bp) != DFX_K_SUCCESS)
1278 {
1279 printk("%s: DMA command request failed!\n", bp->dev->name);
1280 return(DFX_K_FAILURE);
1281 }
1282
1283 /* Set the initial values for eFDXEnable and MACTReq MIB objects */
1284
1285 bp->cmd_req_virt->cmd_type = PI_CMD_K_SNMP_SET;
1286 bp->cmd_req_virt->snmp_set.item[0].item_code = PI_ITEM_K_FDX_ENB_DIS;
1287 bp->cmd_req_virt->snmp_set.item[0].value = bp->full_duplex_enb;
1288 bp->cmd_req_virt->snmp_set.item[0].item_index = 0;
1289 bp->cmd_req_virt->snmp_set.item[1].item_code = PI_ITEM_K_MAC_T_REQ;
1290 bp->cmd_req_virt->snmp_set.item[1].value = bp->req_ttrt;
1291 bp->cmd_req_virt->snmp_set.item[1].item_index = 0;
1292 bp->cmd_req_virt->snmp_set.item[2].item_code = PI_ITEM_K_EOL;
1293 if (dfx_hw_dma_cmd_req(bp) != DFX_K_SUCCESS)
1294 {
1295 printk("%s: DMA command request failed!\n", bp->dev->name);
1296 return(DFX_K_FAILURE);
1297 }
1298
1299 /* Initialize adapter CAM */
1300
1301 if (dfx_ctl_update_cam(bp) != DFX_K_SUCCESS)
1302 {
1303 printk("%s: Adapter CAM update failed!\n", bp->dev->name);
1304 return(DFX_K_FAILURE);
1305 }
1306
1307 /* Initialize adapter filters */
1308
1309 if (dfx_ctl_update_filters(bp) != DFX_K_SUCCESS)
1310 {
1311 printk("%s: Adapter filters update failed!\n", bp->dev->name);
1312 return(DFX_K_FAILURE);
1313 }
1314
1315 /*
1316 * Remove any existing dynamic buffers (i.e. if the adapter is being
1317 * reinitialized)
1318 */
1319
1320 if (get_buffers)
1321 dfx_rcv_flush(bp);
1322
1323 /* Initialize receive descriptor block and produce buffers */
1324
1325 if (dfx_rcv_init(bp, get_buffers))
1326 {
1327 printk("%s: Receive buffer allocation failed\n", bp->dev->name);
1328 if (get_buffers)
1329 dfx_rcv_flush(bp);
1330 return(DFX_K_FAILURE);
1331 }
1332
1333 /* Issue START command and bring adapter to LINK_(UN)AVAILABLE state */
1334
1335 bp->cmd_req_virt->cmd_type = PI_CMD_K_START;
1336 if (dfx_hw_dma_cmd_req(bp) != DFX_K_SUCCESS)
1337 {
1338 printk("%s: Start command failed\n", bp->dev->name);
1339 if (get_buffers)
1340 dfx_rcv_flush(bp);
1341 return(DFX_K_FAILURE);
1342 }
1343
1344 /* Initialization succeeded, reenable PDQ interrupts */
1345
1346 dfx_port_write_long(bp, PI_PDQ_K_REG_HOST_INT_ENB, PI_HOST_INT_K_ENABLE_DEF_INTS);
1347 return(DFX_K_SUCCESS);
1348 }
1349
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001350
Linus Torvalds1da177e2005-04-16 15:20:36 -07001351/*
1352 * ============
1353 * = dfx_open =
1354 * ============
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001355 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001356 * Overview:
1357 * Opens the adapter
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001358 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001359 * Returns:
1360 * Condition code
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001361 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001362 * Arguments:
1363 * dev - pointer to device information
1364 *
1365 * Functional Description:
1366 * This function brings the adapter to an operational state.
1367 *
1368 * Return Codes:
1369 * 0 - Adapter was successfully opened
1370 * -EAGAIN - Could not register IRQ or adapter initialization failed
1371 *
1372 * Assumptions:
1373 * This routine should only be called for a device that was
1374 * initialized successfully.
1375 *
1376 * Side Effects:
1377 * Adapter should be in LINK_AVAILABLE or LINK_UNAVAILABLE state
1378 * if the open is successful.
1379 */
1380
1381static int dfx_open(struct net_device *dev)
1382{
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08001383 DFX_board_t *bp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001384 int ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001385
1386 DBG_printk("In dfx_open...\n");
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001387
Linus Torvalds1da177e2005-04-16 15:20:36 -07001388 /* Register IRQ - support shared interrupts by passing device ptr */
1389
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08001390 ret = request_irq(dev->irq, dfx_interrupt, IRQF_SHARED, dev->name,
1391 dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001392 if (ret) {
1393 printk(KERN_ERR "%s: Requested IRQ %d is busy\n", dev->name, dev->irq);
1394 return ret;
1395 }
1396
1397 /*
1398 * Set current address to factory MAC address
1399 *
1400 * Note: We've already done this step in dfx_driver_init.
1401 * However, it's possible that a user has set a node
1402 * address override, then closed and reopened the
1403 * adapter. Unless we reset the device address field
1404 * now, we'll continue to use the existing modified
1405 * address.
1406 */
1407
1408 memcpy(dev->dev_addr, bp->factory_mac_addr, FDDI_K_ALEN);
1409
1410 /* Clear local unicast/multicast address tables and counts */
1411
1412 memset(bp->uc_table, 0, sizeof(bp->uc_table));
1413 memset(bp->mc_table, 0, sizeof(bp->mc_table));
1414 bp->uc_count = 0;
1415 bp->mc_count = 0;
1416
1417 /* Disable promiscuous filter settings */
1418
1419 bp->ind_group_prom = PI_FSTATE_K_BLOCK;
1420 bp->group_prom = PI_FSTATE_K_BLOCK;
1421
1422 spin_lock_init(&bp->lock);
1423
1424 /* Reset and initialize adapter */
1425
1426 bp->reset_type = PI_PDATA_A_RESET_M_SKIP_ST; /* skip self-test */
1427 if (dfx_adap_init(bp, 1) != DFX_K_SUCCESS)
1428 {
1429 printk(KERN_ERR "%s: Adapter open failed!\n", dev->name);
1430 free_irq(dev->irq, dev);
1431 return -EAGAIN;
1432 }
1433
1434 /* Set device structure info */
1435 netif_start_queue(dev);
1436 return(0);
1437}
1438
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001439
Linus Torvalds1da177e2005-04-16 15:20:36 -07001440/*
1441 * =============
1442 * = dfx_close =
1443 * =============
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001444 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001445 * Overview:
1446 * Closes the device/module.
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001447 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001448 * Returns:
1449 * Condition code
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001450 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001451 * Arguments:
1452 * dev - pointer to device information
1453 *
1454 * Functional Description:
1455 * This routine closes the adapter and brings it to a safe state.
1456 * The interrupt service routine is deregistered with the OS.
1457 * The adapter can be opened again with another call to dfx_open().
1458 *
1459 * Return Codes:
1460 * Always return 0.
1461 *
1462 * Assumptions:
1463 * No further requests for this adapter are made after this routine is
1464 * called. dfx_open() can be called to reset and reinitialize the
1465 * adapter.
1466 *
1467 * Side Effects:
1468 * Adapter should be in DMA_UNAVAILABLE state upon completion of this
1469 * routine.
1470 */
1471
1472static int dfx_close(struct net_device *dev)
1473{
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08001474 DFX_board_t *bp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001475
1476 DBG_printk("In dfx_close...\n");
1477
1478 /* Disable PDQ interrupts first */
1479
1480 dfx_port_write_long(bp, PI_PDQ_K_REG_HOST_INT_ENB, PI_HOST_INT_K_DISABLE_ALL_INTS);
1481
1482 /* Place adapter in DMA_UNAVAILABLE state by resetting adapter */
1483
1484 (void) dfx_hw_dma_uninit(bp, PI_PDATA_A_RESET_M_SKIP_ST);
1485
1486 /*
1487 * Flush any pending transmit buffers
1488 *
1489 * Note: It's important that we flush the transmit buffers
1490 * BEFORE we clear our copy of the Type 2 register.
1491 * Otherwise, we'll have no idea how many buffers
1492 * we need to free.
1493 */
1494
1495 dfx_xmt_flush(bp);
1496
1497 /*
1498 * Clear Type 1 and Type 2 registers after adapter reset
1499 *
1500 * Note: Even though we're closing the adapter, it's
1501 * possible that an interrupt will occur after
1502 * dfx_close is called. Without some assurance to
1503 * the contrary we want to make sure that we don't
1504 * process receive and transmit LLC frames and update
1505 * the Type 2 register with bad information.
1506 */
1507
1508 bp->cmd_req_reg.lword = 0;
1509 bp->cmd_rsp_reg.lword = 0;
1510 bp->rcv_xmt_reg.lword = 0;
1511
1512 /* Clear consumer block for the same reason given above */
1513
1514 memset(bp->cons_block_virt, 0, sizeof(PI_CONSUMER_BLOCK));
1515
1516 /* Release all dynamically allocate skb in the receive ring. */
1517
1518 dfx_rcv_flush(bp);
1519
1520 /* Clear device structure flags */
1521
1522 netif_stop_queue(dev);
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001523
Linus Torvalds1da177e2005-04-16 15:20:36 -07001524 /* Deregister (free) IRQ */
1525
1526 free_irq(dev->irq, dev);
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001527
Linus Torvalds1da177e2005-04-16 15:20:36 -07001528 return(0);
1529}
1530
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001531
Linus Torvalds1da177e2005-04-16 15:20:36 -07001532/*
1533 * ======================
1534 * = dfx_int_pr_halt_id =
1535 * ======================
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001536 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001537 * Overview:
1538 * Displays halt id's in string form.
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001539 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001540 * Returns:
1541 * None
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001542 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001543 * Arguments:
1544 * bp - pointer to board information
1545 *
1546 * Functional Description:
1547 * Determine current halt id and display appropriate string.
1548 *
1549 * Return Codes:
1550 * None
1551 *
1552 * Assumptions:
1553 * None
1554 *
1555 * Side Effects:
1556 * None
1557 */
1558
1559static void dfx_int_pr_halt_id(DFX_board_t *bp)
1560 {
1561 PI_UINT32 port_status; /* PDQ port status register value */
1562 PI_UINT32 halt_id; /* PDQ port status halt ID */
1563
1564 /* Read the latest port status */
1565
1566 dfx_port_read_long(bp, PI_PDQ_K_REG_PORT_STATUS, &port_status);
1567
1568 /* Display halt state transition information */
1569
1570 halt_id = (port_status & PI_PSTATUS_M_HALT_ID) >> PI_PSTATUS_V_HALT_ID;
1571 switch (halt_id)
1572 {
1573 case PI_HALT_ID_K_SELFTEST_TIMEOUT:
1574 printk("%s: Halt ID: Selftest Timeout\n", bp->dev->name);
1575 break;
1576
1577 case PI_HALT_ID_K_PARITY_ERROR:
1578 printk("%s: Halt ID: Host Bus Parity Error\n", bp->dev->name);
1579 break;
1580
1581 case PI_HALT_ID_K_HOST_DIR_HALT:
1582 printk("%s: Halt ID: Host-Directed Halt\n", bp->dev->name);
1583 break;
1584
1585 case PI_HALT_ID_K_SW_FAULT:
1586 printk("%s: Halt ID: Adapter Software Fault\n", bp->dev->name);
1587 break;
1588
1589 case PI_HALT_ID_K_HW_FAULT:
1590 printk("%s: Halt ID: Adapter Hardware Fault\n", bp->dev->name);
1591 break;
1592
1593 case PI_HALT_ID_K_PC_TRACE:
1594 printk("%s: Halt ID: FDDI Network PC Trace Path Test\n", bp->dev->name);
1595 break;
1596
1597 case PI_HALT_ID_K_DMA_ERROR:
1598 printk("%s: Halt ID: Adapter DMA Error\n", bp->dev->name);
1599 break;
1600
1601 case PI_HALT_ID_K_IMAGE_CRC_ERROR:
1602 printk("%s: Halt ID: Firmware Image CRC Error\n", bp->dev->name);
1603 break;
1604
1605 case PI_HALT_ID_K_BUS_EXCEPTION:
1606 printk("%s: Halt ID: 68000 Bus Exception\n", bp->dev->name);
1607 break;
1608
1609 default:
1610 printk("%s: Halt ID: Unknown (code = %X)\n", bp->dev->name, halt_id);
1611 break;
1612 }
1613 }
1614
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001615
Linus Torvalds1da177e2005-04-16 15:20:36 -07001616/*
1617 * ==========================
1618 * = dfx_int_type_0_process =
1619 * ==========================
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001620 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001621 * Overview:
1622 * Processes Type 0 interrupts.
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001623 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001624 * Returns:
1625 * None
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001626 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001627 * Arguments:
1628 * bp - pointer to board information
1629 *
1630 * Functional Description:
1631 * Processes all enabled Type 0 interrupts. If the reason for the interrupt
1632 * is a serious fault on the adapter, then an error message is displayed
1633 * and the adapter is reset.
1634 *
1635 * One tricky potential timing window is the rapid succession of "link avail"
1636 * "link unavail" state change interrupts. The acknowledgement of the Type 0
1637 * interrupt must be done before reading the state from the Port Status
1638 * register. This is true because a state change could occur after reading
1639 * the data, but before acknowledging the interrupt. If this state change
1640 * does happen, it would be lost because the driver is using the old state,
1641 * and it will never know about the new state because it subsequently
1642 * acknowledges the state change interrupt.
1643 *
1644 * INCORRECT CORRECT
1645 * read type 0 int reasons read type 0 int reasons
1646 * read adapter state ack type 0 interrupts
1647 * ack type 0 interrupts read adapter state
1648 * ... process interrupt ... ... process interrupt ...
1649 *
1650 * Return Codes:
1651 * None
1652 *
1653 * Assumptions:
1654 * None
1655 *
1656 * Side Effects:
1657 * An adapter reset may occur if the adapter has any Type 0 error interrupts
1658 * or if the port status indicates that the adapter is halted. The driver
1659 * is responsible for reinitializing the adapter with the current CAM
1660 * contents and adapter filter settings.
1661 */
1662
1663static void dfx_int_type_0_process(DFX_board_t *bp)
1664
1665 {
1666 PI_UINT32 type_0_status; /* Host Interrupt Type 0 register */
1667 PI_UINT32 state; /* current adap state (from port status) */
1668
1669 /*
1670 * Read host interrupt Type 0 register to determine which Type 0
1671 * interrupts are pending. Immediately write it back out to clear
1672 * those interrupts.
1673 */
1674
1675 dfx_port_read_long(bp, PI_PDQ_K_REG_TYPE_0_STATUS, &type_0_status);
1676 dfx_port_write_long(bp, PI_PDQ_K_REG_TYPE_0_STATUS, type_0_status);
1677
1678 /* Check for Type 0 error interrupts */
1679
1680 if (type_0_status & (PI_TYPE_0_STAT_M_NXM |
1681 PI_TYPE_0_STAT_M_PM_PAR_ERR |
1682 PI_TYPE_0_STAT_M_BUS_PAR_ERR))
1683 {
1684 /* Check for Non-Existent Memory error */
1685
1686 if (type_0_status & PI_TYPE_0_STAT_M_NXM)
1687 printk("%s: Non-Existent Memory Access Error\n", bp->dev->name);
1688
1689 /* Check for Packet Memory Parity error */
1690
1691 if (type_0_status & PI_TYPE_0_STAT_M_PM_PAR_ERR)
1692 printk("%s: Packet Memory Parity Error\n", bp->dev->name);
1693
1694 /* Check for Host Bus Parity error */
1695
1696 if (type_0_status & PI_TYPE_0_STAT_M_BUS_PAR_ERR)
1697 printk("%s: Host Bus Parity Error\n", bp->dev->name);
1698
1699 /* Reset adapter and bring it back on-line */
1700
1701 bp->link_available = PI_K_FALSE; /* link is no longer available */
1702 bp->reset_type = 0; /* rerun on-board diagnostics */
1703 printk("%s: Resetting adapter...\n", bp->dev->name);
1704 if (dfx_adap_init(bp, 0) != DFX_K_SUCCESS)
1705 {
1706 printk("%s: Adapter reset failed! Disabling adapter interrupts.\n", bp->dev->name);
1707 dfx_port_write_long(bp, PI_PDQ_K_REG_HOST_INT_ENB, PI_HOST_INT_K_DISABLE_ALL_INTS);
1708 return;
1709 }
1710 printk("%s: Adapter reset successful!\n", bp->dev->name);
1711 return;
1712 }
1713
1714 /* Check for transmit flush interrupt */
1715
1716 if (type_0_status & PI_TYPE_0_STAT_M_XMT_FLUSH)
1717 {
1718 /* Flush any pending xmt's and acknowledge the flush interrupt */
1719
1720 bp->link_available = PI_K_FALSE; /* link is no longer available */
1721 dfx_xmt_flush(bp); /* flush any outstanding packets */
1722 (void) dfx_hw_port_ctrl_req(bp,
1723 PI_PCTRL_M_XMT_DATA_FLUSH_DONE,
1724 0,
1725 0,
1726 NULL);
1727 }
1728
1729 /* Check for adapter state change */
1730
1731 if (type_0_status & PI_TYPE_0_STAT_M_STATE_CHANGE)
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001732 {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001733 /* Get latest adapter state */
1734
1735 state = dfx_hw_adap_state_rd(bp); /* get adapter state */
1736 if (state == PI_STATE_K_HALTED)
1737 {
1738 /*
1739 * Adapter has transitioned to HALTED state, try to reset
1740 * adapter to bring it back on-line. If reset fails,
1741 * leave the adapter in the broken state.
1742 */
1743
1744 printk("%s: Controller has transitioned to HALTED state!\n", bp->dev->name);
1745 dfx_int_pr_halt_id(bp); /* display halt id as string */
1746
1747 /* Reset adapter and bring it back on-line */
1748
1749 bp->link_available = PI_K_FALSE; /* link is no longer available */
1750 bp->reset_type = 0; /* rerun on-board diagnostics */
1751 printk("%s: Resetting adapter...\n", bp->dev->name);
1752 if (dfx_adap_init(bp, 0) != DFX_K_SUCCESS)
1753 {
1754 printk("%s: Adapter reset failed! Disabling adapter interrupts.\n", bp->dev->name);
1755 dfx_port_write_long(bp, PI_PDQ_K_REG_HOST_INT_ENB, PI_HOST_INT_K_DISABLE_ALL_INTS);
1756 return;
1757 }
1758 printk("%s: Adapter reset successful!\n", bp->dev->name);
1759 }
1760 else if (state == PI_STATE_K_LINK_AVAIL)
1761 {
1762 bp->link_available = PI_K_TRUE; /* set link available flag */
1763 }
1764 }
1765 }
1766
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001767
Linus Torvalds1da177e2005-04-16 15:20:36 -07001768/*
1769 * ==================
1770 * = dfx_int_common =
1771 * ==================
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001772 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001773 * Overview:
1774 * Interrupt service routine (ISR)
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001775 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001776 * Returns:
1777 * None
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001778 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001779 * Arguments:
1780 * bp - pointer to board information
1781 *
1782 * Functional Description:
1783 * This is the ISR which processes incoming adapter interrupts.
1784 *
1785 * Return Codes:
1786 * None
1787 *
1788 * Assumptions:
1789 * This routine assumes PDQ interrupts have not been disabled.
1790 * When interrupts are disabled at the PDQ, the Port Status register
1791 * is automatically cleared. This routine uses the Port Status
1792 * register value to determine whether a Type 0 interrupt occurred,
1793 * so it's important that adapter interrupts are not normally
1794 * enabled/disabled at the PDQ.
1795 *
1796 * It's vital that this routine is NOT reentered for the
1797 * same board and that the OS is not in another section of
1798 * code (eg. dfx_xmt_queue_pkt) for the same board on a
1799 * different thread.
1800 *
1801 * Side Effects:
1802 * Pending interrupts are serviced. Depending on the type of
1803 * interrupt, acknowledging and clearing the interrupt at the
1804 * PDQ involves writing a register to clear the interrupt bit
1805 * or updating completion indices.
1806 */
1807
1808static void dfx_int_common(struct net_device *dev)
1809{
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08001810 DFX_board_t *bp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001811 PI_UINT32 port_status; /* Port Status register */
1812
1813 /* Process xmt interrupts - frequent case, so always call this routine */
1814
1815 if(dfx_xmt_done(bp)) /* free consumed xmt packets */
1816 netif_wake_queue(dev);
1817
1818 /* Process rcv interrupts - frequent case, so always call this routine */
1819
1820 dfx_rcv_queue_process(bp); /* service received LLC frames */
1821
1822 /*
1823 * Transmit and receive producer and completion indices are updated on the
1824 * adapter by writing to the Type 2 Producer register. Since the frequent
1825 * case is that we'll be processing either LLC transmit or receive buffers,
1826 * we'll optimize I/O writes by doing a single register write here.
1827 */
1828
1829 dfx_port_write_long(bp, PI_PDQ_K_REG_TYPE_2_PROD, bp->rcv_xmt_reg.lword);
1830
1831 /* Read PDQ Port Status register to find out which interrupts need processing */
1832
1833 dfx_port_read_long(bp, PI_PDQ_K_REG_PORT_STATUS, &port_status);
1834
1835 /* Process Type 0 interrupts (if any) - infrequent, so only call when needed */
1836
1837 if (port_status & PI_PSTATUS_M_TYPE_0_PENDING)
1838 dfx_int_type_0_process(bp); /* process Type 0 interrupts */
1839 }
1840
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001841
Linus Torvalds1da177e2005-04-16 15:20:36 -07001842/*
1843 * =================
1844 * = dfx_interrupt =
1845 * =================
Maciej W. Rozyckifeea1db2005-06-20 15:33:03 -07001846 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001847 * Overview:
1848 * Interrupt processing routine
Maciej W. Rozyckifeea1db2005-06-20 15:33:03 -07001849 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001850 * Returns:
Maciej W. Rozyckifeea1db2005-06-20 15:33:03 -07001851 * Whether a valid interrupt was seen.
1852 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001853 * Arguments:
1854 * irq - interrupt vector
1855 * dev_id - pointer to device information
Linus Torvalds1da177e2005-04-16 15:20:36 -07001856 *
1857 * Functional Description:
1858 * This routine calls the interrupt processing routine for this adapter. It
1859 * disables and reenables adapter interrupts, as appropriate. We can support
1860 * shared interrupts since the incoming dev_id pointer provides our device
1861 * structure context.
1862 *
1863 * Return Codes:
Maciej W. Rozyckifeea1db2005-06-20 15:33:03 -07001864 * IRQ_HANDLED - an IRQ was handled.
1865 * IRQ_NONE - no IRQ was handled.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001866 *
1867 * Assumptions:
1868 * The interrupt acknowledgement at the hardware level (eg. ACKing the PIC
1869 * on Intel-based systems) is done by the operating system outside this
1870 * routine.
1871 *
1872 * System interrupts are enabled through this call.
1873 *
1874 * Side Effects:
1875 * Interrupts are disabled, then reenabled at the adapter.
1876 */
1877
David Howells7d12e782006-10-05 14:55:46 +01001878static irqreturn_t dfx_interrupt(int irq, void *dev_id)
Maciej W. Rozyckifeea1db2005-06-20 15:33:03 -07001879{
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08001880 struct net_device *dev = dev_id;
1881 DFX_board_t *bp = netdev_priv(dev);
1882 struct device *bdev = bp->bus_dev;
1883 int dfx_bus_pci = DFX_BUS_PCI(bdev);
1884 int dfx_bus_eisa = DFX_BUS_EISA(bdev);
1885 int dfx_bus_tc = DFX_BUS_TC(bdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001886
1887 /* Service adapter interrupts */
1888
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08001889 if (dfx_bus_pci) {
Maciej W. Rozyckifeea1db2005-06-20 15:33:03 -07001890 u32 status;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001891
Maciej W. Rozyckifeea1db2005-06-20 15:33:03 -07001892 dfx_port_read_long(bp, PFI_K_REG_STATUS, &status);
1893 if (!(status & PFI_STATUS_M_PDQ_INT))
1894 return IRQ_NONE;
1895
1896 spin_lock(&bp->lock);
1897
1898 /* Disable PDQ-PFI interrupts at PFI */
1899 dfx_port_write_long(bp, PFI_K_REG_MODE_CTRL,
1900 PFI_MODE_M_DMA_ENB);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001901
1902 /* Call interrupt service routine for this adapter */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001903 dfx_int_common(dev);
1904
1905 /* Clear PDQ interrupt status bit and reenable interrupts */
Maciej W. Rozyckifeea1db2005-06-20 15:33:03 -07001906 dfx_port_write_long(bp, PFI_K_REG_STATUS,
1907 PFI_STATUS_M_PDQ_INT);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001908 dfx_port_write_long(bp, PFI_K_REG_MODE_CTRL,
Maciej W. Rozyckifeea1db2005-06-20 15:33:03 -07001909 (PFI_MODE_M_PDQ_INT_ENB |
1910 PFI_MODE_M_DMA_ENB));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001911
Maciej W. Rozyckifeea1db2005-06-20 15:33:03 -07001912 spin_unlock(&bp->lock);
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08001913 }
1914 if (dfx_bus_eisa) {
1915 unsigned long base_addr = to_eisa_device(bdev)->base_addr;
Maciej W. Rozyckifeea1db2005-06-20 15:33:03 -07001916 u8 status;
1917
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08001918 status = inb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0);
Maciej W. Rozyckifeea1db2005-06-20 15:33:03 -07001919 if (!(status & PI_CONFIG_STAT_0_M_PEND))
1920 return IRQ_NONE;
1921
1922 spin_lock(&bp->lock);
1923
1924 /* Disable interrupts at the ESIC */
1925 status &= ~PI_CONFIG_STAT_0_M_INT_ENB;
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08001926 outb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0, status);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001927
1928 /* Call interrupt service routine for this adapter */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001929 dfx_int_common(dev);
1930
1931 /* Reenable interrupts at the ESIC */
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08001932 status = inb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0);
Maciej W. Rozyckifeea1db2005-06-20 15:33:03 -07001933 status |= PI_CONFIG_STAT_0_M_INT_ENB;
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08001934 outb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0, status);
1935
1936 spin_unlock(&bp->lock);
1937 }
1938 if (dfx_bus_tc) {
1939 u32 status;
1940
1941 dfx_port_read_long(bp, PI_PDQ_K_REG_PORT_STATUS, &status);
1942 if (!(status & (PI_PSTATUS_M_RCV_DATA_PENDING |
1943 PI_PSTATUS_M_XMT_DATA_PENDING |
1944 PI_PSTATUS_M_SMT_HOST_PENDING |
1945 PI_PSTATUS_M_UNSOL_PENDING |
1946 PI_PSTATUS_M_CMD_RSP_PENDING |
1947 PI_PSTATUS_M_CMD_REQ_PENDING |
1948 PI_PSTATUS_M_TYPE_0_PENDING)))
1949 return IRQ_NONE;
1950
1951 spin_lock(&bp->lock);
1952
1953 /* Call interrupt service routine for this adapter */
1954 dfx_int_common(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001955
Maciej W. Rozyckifeea1db2005-06-20 15:33:03 -07001956 spin_unlock(&bp->lock);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001957 }
1958
Maciej W. Rozyckifeea1db2005-06-20 15:33:03 -07001959 return IRQ_HANDLED;
1960}
1961
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001962
Linus Torvalds1da177e2005-04-16 15:20:36 -07001963/*
1964 * =====================
1965 * = dfx_ctl_get_stats =
1966 * =====================
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001967 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001968 * Overview:
1969 * Get statistics for FDDI adapter
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001970 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001971 * Returns:
1972 * Pointer to FDDI statistics structure
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001973 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07001974 * Arguments:
1975 * dev - pointer to device information
1976 *
1977 * Functional Description:
1978 * Gets current MIB objects from adapter, then
1979 * returns FDDI statistics structure as defined
1980 * in if_fddi.h.
1981 *
1982 * Note: Since the FDDI statistics structure is
1983 * still new and the device structure doesn't
1984 * have an FDDI-specific get statistics handler,
1985 * we'll return the FDDI statistics structure as
1986 * a pointer to an Ethernet statistics structure.
1987 * That way, at least the first part of the statistics
1988 * structure can be decoded properly, and it allows
1989 * "smart" applications to perform a second cast to
1990 * decode the FDDI-specific statistics.
1991 *
1992 * We'll have to pay attention to this routine as the
1993 * device structure becomes more mature and LAN media
1994 * independent.
1995 *
1996 * Return Codes:
1997 * None
1998 *
1999 * Assumptions:
2000 * None
2001 *
2002 * Side Effects:
2003 * None
2004 */
2005
2006static struct net_device_stats *dfx_ctl_get_stats(struct net_device *dev)
2007 {
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08002008 DFX_board_t *bp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002009
2010 /* Fill the bp->stats structure with driver-maintained counters */
2011
2012 bp->stats.gen.rx_packets = bp->rcv_total_frames;
2013 bp->stats.gen.tx_packets = bp->xmt_total_frames;
2014 bp->stats.gen.rx_bytes = bp->rcv_total_bytes;
2015 bp->stats.gen.tx_bytes = bp->xmt_total_bytes;
2016 bp->stats.gen.rx_errors = bp->rcv_crc_errors +
2017 bp->rcv_frame_status_errors +
2018 bp->rcv_length_errors;
2019 bp->stats.gen.tx_errors = bp->xmt_length_errors;
2020 bp->stats.gen.rx_dropped = bp->rcv_discards;
2021 bp->stats.gen.tx_dropped = bp->xmt_discards;
2022 bp->stats.gen.multicast = bp->rcv_multicast_frames;
2023 bp->stats.gen.collisions = 0; /* always zero (0) for FDDI */
2024
2025 /* Get FDDI SMT MIB objects */
2026
2027 bp->cmd_req_virt->cmd_type = PI_CMD_K_SMT_MIB_GET;
2028 if (dfx_hw_dma_cmd_req(bp) != DFX_K_SUCCESS)
2029 return((struct net_device_stats *) &bp->stats);
2030
2031 /* Fill the bp->stats structure with the SMT MIB object values */
2032
2033 memcpy(bp->stats.smt_station_id, &bp->cmd_rsp_virt->smt_mib_get.smt_station_id, sizeof(bp->cmd_rsp_virt->smt_mib_get.smt_station_id));
2034 bp->stats.smt_op_version_id = bp->cmd_rsp_virt->smt_mib_get.smt_op_version_id;
2035 bp->stats.smt_hi_version_id = bp->cmd_rsp_virt->smt_mib_get.smt_hi_version_id;
2036 bp->stats.smt_lo_version_id = bp->cmd_rsp_virt->smt_mib_get.smt_lo_version_id;
2037 memcpy(bp->stats.smt_user_data, &bp->cmd_rsp_virt->smt_mib_get.smt_user_data, sizeof(bp->cmd_rsp_virt->smt_mib_get.smt_user_data));
2038 bp->stats.smt_mib_version_id = bp->cmd_rsp_virt->smt_mib_get.smt_mib_version_id;
2039 bp->stats.smt_mac_cts = bp->cmd_rsp_virt->smt_mib_get.smt_mac_ct;
2040 bp->stats.smt_non_master_cts = bp->cmd_rsp_virt->smt_mib_get.smt_non_master_ct;
2041 bp->stats.smt_master_cts = bp->cmd_rsp_virt->smt_mib_get.smt_master_ct;
2042 bp->stats.smt_available_paths = bp->cmd_rsp_virt->smt_mib_get.smt_available_paths;
2043 bp->stats.smt_config_capabilities = bp->cmd_rsp_virt->smt_mib_get.smt_config_capabilities;
2044 bp->stats.smt_config_policy = bp->cmd_rsp_virt->smt_mib_get.smt_config_policy;
2045 bp->stats.smt_connection_policy = bp->cmd_rsp_virt->smt_mib_get.smt_connection_policy;
2046 bp->stats.smt_t_notify = bp->cmd_rsp_virt->smt_mib_get.smt_t_notify;
2047 bp->stats.smt_stat_rpt_policy = bp->cmd_rsp_virt->smt_mib_get.smt_stat_rpt_policy;
2048 bp->stats.smt_trace_max_expiration = bp->cmd_rsp_virt->smt_mib_get.smt_trace_max_expiration;
2049 bp->stats.smt_bypass_present = bp->cmd_rsp_virt->smt_mib_get.smt_bypass_present;
2050 bp->stats.smt_ecm_state = bp->cmd_rsp_virt->smt_mib_get.smt_ecm_state;
2051 bp->stats.smt_cf_state = bp->cmd_rsp_virt->smt_mib_get.smt_cf_state;
2052 bp->stats.smt_remote_disconnect_flag = bp->cmd_rsp_virt->smt_mib_get.smt_remote_disconnect_flag;
2053 bp->stats.smt_station_status = bp->cmd_rsp_virt->smt_mib_get.smt_station_status;
2054 bp->stats.smt_peer_wrap_flag = bp->cmd_rsp_virt->smt_mib_get.smt_peer_wrap_flag;
2055 bp->stats.smt_time_stamp = bp->cmd_rsp_virt->smt_mib_get.smt_msg_time_stamp.ls;
2056 bp->stats.smt_transition_time_stamp = bp->cmd_rsp_virt->smt_mib_get.smt_transition_time_stamp.ls;
2057 bp->stats.mac_frame_status_functions = bp->cmd_rsp_virt->smt_mib_get.mac_frame_status_functions;
2058 bp->stats.mac_t_max_capability = bp->cmd_rsp_virt->smt_mib_get.mac_t_max_capability;
2059 bp->stats.mac_tvx_capability = bp->cmd_rsp_virt->smt_mib_get.mac_tvx_capability;
2060 bp->stats.mac_available_paths = bp->cmd_rsp_virt->smt_mib_get.mac_available_paths;
2061 bp->stats.mac_current_path = bp->cmd_rsp_virt->smt_mib_get.mac_current_path;
2062 memcpy(bp->stats.mac_upstream_nbr, &bp->cmd_rsp_virt->smt_mib_get.mac_upstream_nbr, FDDI_K_ALEN);
2063 memcpy(bp->stats.mac_downstream_nbr, &bp->cmd_rsp_virt->smt_mib_get.mac_downstream_nbr, FDDI_K_ALEN);
2064 memcpy(bp->stats.mac_old_upstream_nbr, &bp->cmd_rsp_virt->smt_mib_get.mac_old_upstream_nbr, FDDI_K_ALEN);
2065 memcpy(bp->stats.mac_old_downstream_nbr, &bp->cmd_rsp_virt->smt_mib_get.mac_old_downstream_nbr, FDDI_K_ALEN);
2066 bp->stats.mac_dup_address_test = bp->cmd_rsp_virt->smt_mib_get.mac_dup_address_test;
2067 bp->stats.mac_requested_paths = bp->cmd_rsp_virt->smt_mib_get.mac_requested_paths;
2068 bp->stats.mac_downstream_port_type = bp->cmd_rsp_virt->smt_mib_get.mac_downstream_port_type;
2069 memcpy(bp->stats.mac_smt_address, &bp->cmd_rsp_virt->smt_mib_get.mac_smt_address, FDDI_K_ALEN);
2070 bp->stats.mac_t_req = bp->cmd_rsp_virt->smt_mib_get.mac_t_req;
2071 bp->stats.mac_t_neg = bp->cmd_rsp_virt->smt_mib_get.mac_t_neg;
2072 bp->stats.mac_t_max = bp->cmd_rsp_virt->smt_mib_get.mac_t_max;
2073 bp->stats.mac_tvx_value = bp->cmd_rsp_virt->smt_mib_get.mac_tvx_value;
2074 bp->stats.mac_frame_error_threshold = bp->cmd_rsp_virt->smt_mib_get.mac_frame_error_threshold;
2075 bp->stats.mac_frame_error_ratio = bp->cmd_rsp_virt->smt_mib_get.mac_frame_error_ratio;
2076 bp->stats.mac_rmt_state = bp->cmd_rsp_virt->smt_mib_get.mac_rmt_state;
2077 bp->stats.mac_da_flag = bp->cmd_rsp_virt->smt_mib_get.mac_da_flag;
2078 bp->stats.mac_una_da_flag = bp->cmd_rsp_virt->smt_mib_get.mac_unda_flag;
2079 bp->stats.mac_frame_error_flag = bp->cmd_rsp_virt->smt_mib_get.mac_frame_error_flag;
2080 bp->stats.mac_ma_unitdata_available = bp->cmd_rsp_virt->smt_mib_get.mac_ma_unitdata_available;
2081 bp->stats.mac_hardware_present = bp->cmd_rsp_virt->smt_mib_get.mac_hardware_present;
2082 bp->stats.mac_ma_unitdata_enable = bp->cmd_rsp_virt->smt_mib_get.mac_ma_unitdata_enable;
2083 bp->stats.path_tvx_lower_bound = bp->cmd_rsp_virt->smt_mib_get.path_tvx_lower_bound;
2084 bp->stats.path_t_max_lower_bound = bp->cmd_rsp_virt->smt_mib_get.path_t_max_lower_bound;
2085 bp->stats.path_max_t_req = bp->cmd_rsp_virt->smt_mib_get.path_max_t_req;
2086 memcpy(bp->stats.path_configuration, &bp->cmd_rsp_virt->smt_mib_get.path_configuration, sizeof(bp->cmd_rsp_virt->smt_mib_get.path_configuration));
2087 bp->stats.port_my_type[0] = bp->cmd_rsp_virt->smt_mib_get.port_my_type[0];
2088 bp->stats.port_my_type[1] = bp->cmd_rsp_virt->smt_mib_get.port_my_type[1];
2089 bp->stats.port_neighbor_type[0] = bp->cmd_rsp_virt->smt_mib_get.port_neighbor_type[0];
2090 bp->stats.port_neighbor_type[1] = bp->cmd_rsp_virt->smt_mib_get.port_neighbor_type[1];
2091 bp->stats.port_connection_policies[0] = bp->cmd_rsp_virt->smt_mib_get.port_connection_policies[0];
2092 bp->stats.port_connection_policies[1] = bp->cmd_rsp_virt->smt_mib_get.port_connection_policies[1];
2093 bp->stats.port_mac_indicated[0] = bp->cmd_rsp_virt->smt_mib_get.port_mac_indicated[0];
2094 bp->stats.port_mac_indicated[1] = bp->cmd_rsp_virt->smt_mib_get.port_mac_indicated[1];
2095 bp->stats.port_current_path[0] = bp->cmd_rsp_virt->smt_mib_get.port_current_path[0];
2096 bp->stats.port_current_path[1] = bp->cmd_rsp_virt->smt_mib_get.port_current_path[1];
2097 memcpy(&bp->stats.port_requested_paths[0*3], &bp->cmd_rsp_virt->smt_mib_get.port_requested_paths[0], 3);
2098 memcpy(&bp->stats.port_requested_paths[1*3], &bp->cmd_rsp_virt->smt_mib_get.port_requested_paths[1], 3);
2099 bp->stats.port_mac_placement[0] = bp->cmd_rsp_virt->smt_mib_get.port_mac_placement[0];
2100 bp->stats.port_mac_placement[1] = bp->cmd_rsp_virt->smt_mib_get.port_mac_placement[1];
2101 bp->stats.port_available_paths[0] = bp->cmd_rsp_virt->smt_mib_get.port_available_paths[0];
2102 bp->stats.port_available_paths[1] = bp->cmd_rsp_virt->smt_mib_get.port_available_paths[1];
2103 bp->stats.port_pmd_class[0] = bp->cmd_rsp_virt->smt_mib_get.port_pmd_class[0];
2104 bp->stats.port_pmd_class[1] = bp->cmd_rsp_virt->smt_mib_get.port_pmd_class[1];
2105 bp->stats.port_connection_capabilities[0] = bp->cmd_rsp_virt->smt_mib_get.port_connection_capabilities[0];
2106 bp->stats.port_connection_capabilities[1] = bp->cmd_rsp_virt->smt_mib_get.port_connection_capabilities[1];
2107 bp->stats.port_bs_flag[0] = bp->cmd_rsp_virt->smt_mib_get.port_bs_flag[0];
2108 bp->stats.port_bs_flag[1] = bp->cmd_rsp_virt->smt_mib_get.port_bs_flag[1];
2109 bp->stats.port_ler_estimate[0] = bp->cmd_rsp_virt->smt_mib_get.port_ler_estimate[0];
2110 bp->stats.port_ler_estimate[1] = bp->cmd_rsp_virt->smt_mib_get.port_ler_estimate[1];
2111 bp->stats.port_ler_cutoff[0] = bp->cmd_rsp_virt->smt_mib_get.port_ler_cutoff[0];
2112 bp->stats.port_ler_cutoff[1] = bp->cmd_rsp_virt->smt_mib_get.port_ler_cutoff[1];
2113 bp->stats.port_ler_alarm[0] = bp->cmd_rsp_virt->smt_mib_get.port_ler_alarm[0];
2114 bp->stats.port_ler_alarm[1] = bp->cmd_rsp_virt->smt_mib_get.port_ler_alarm[1];
2115 bp->stats.port_connect_state[0] = bp->cmd_rsp_virt->smt_mib_get.port_connect_state[0];
2116 bp->stats.port_connect_state[1] = bp->cmd_rsp_virt->smt_mib_get.port_connect_state[1];
2117 bp->stats.port_pcm_state[0] = bp->cmd_rsp_virt->smt_mib_get.port_pcm_state[0];
2118 bp->stats.port_pcm_state[1] = bp->cmd_rsp_virt->smt_mib_get.port_pcm_state[1];
2119 bp->stats.port_pc_withhold[0] = bp->cmd_rsp_virt->smt_mib_get.port_pc_withhold[0];
2120 bp->stats.port_pc_withhold[1] = bp->cmd_rsp_virt->smt_mib_get.port_pc_withhold[1];
2121 bp->stats.port_ler_flag[0] = bp->cmd_rsp_virt->smt_mib_get.port_ler_flag[0];
2122 bp->stats.port_ler_flag[1] = bp->cmd_rsp_virt->smt_mib_get.port_ler_flag[1];
2123 bp->stats.port_hardware_present[0] = bp->cmd_rsp_virt->smt_mib_get.port_hardware_present[0];
2124 bp->stats.port_hardware_present[1] = bp->cmd_rsp_virt->smt_mib_get.port_hardware_present[1];
2125
2126 /* Get FDDI counters */
2127
2128 bp->cmd_req_virt->cmd_type = PI_CMD_K_CNTRS_GET;
2129 if (dfx_hw_dma_cmd_req(bp) != DFX_K_SUCCESS)
2130 return((struct net_device_stats *) &bp->stats);
2131
2132 /* Fill the bp->stats structure with the FDDI counter values */
2133
2134 bp->stats.mac_frame_cts = bp->cmd_rsp_virt->cntrs_get.cntrs.frame_cnt.ls;
2135 bp->stats.mac_copied_cts = bp->cmd_rsp_virt->cntrs_get.cntrs.copied_cnt.ls;
2136 bp->stats.mac_transmit_cts = bp->cmd_rsp_virt->cntrs_get.cntrs.transmit_cnt.ls;
2137 bp->stats.mac_error_cts = bp->cmd_rsp_virt->cntrs_get.cntrs.error_cnt.ls;
2138 bp->stats.mac_lost_cts = bp->cmd_rsp_virt->cntrs_get.cntrs.lost_cnt.ls;
2139 bp->stats.port_lct_fail_cts[0] = bp->cmd_rsp_virt->cntrs_get.cntrs.lct_rejects[0].ls;
2140 bp->stats.port_lct_fail_cts[1] = bp->cmd_rsp_virt->cntrs_get.cntrs.lct_rejects[1].ls;
2141 bp->stats.port_lem_reject_cts[0] = bp->cmd_rsp_virt->cntrs_get.cntrs.lem_rejects[0].ls;
2142 bp->stats.port_lem_reject_cts[1] = bp->cmd_rsp_virt->cntrs_get.cntrs.lem_rejects[1].ls;
2143 bp->stats.port_lem_cts[0] = bp->cmd_rsp_virt->cntrs_get.cntrs.link_errors[0].ls;
2144 bp->stats.port_lem_cts[1] = bp->cmd_rsp_virt->cntrs_get.cntrs.link_errors[1].ls;
2145
2146 return((struct net_device_stats *) &bp->stats);
2147 }
2148
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002149
Linus Torvalds1da177e2005-04-16 15:20:36 -07002150/*
2151 * ==============================
2152 * = dfx_ctl_set_multicast_list =
2153 * ==============================
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002154 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002155 * Overview:
2156 * Enable/Disable LLC frame promiscuous mode reception
2157 * on the adapter and/or update multicast address table.
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002158 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002159 * Returns:
2160 * None
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002161 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002162 * Arguments:
2163 * dev - pointer to device information
2164 *
2165 * Functional Description:
2166 * This routine follows a fairly simple algorithm for setting the
2167 * adapter filters and CAM:
2168 *
2169 * if IFF_PROMISC flag is set
2170 * enable LLC individual/group promiscuous mode
2171 * else
2172 * disable LLC individual/group promiscuous mode
2173 * if number of incoming multicast addresses >
2174 * (CAM max size - number of unicast addresses in CAM)
2175 * enable LLC group promiscuous mode
2176 * set driver-maintained multicast address count to zero
2177 * else
2178 * disable LLC group promiscuous mode
2179 * set driver-maintained multicast address count to incoming count
2180 * update adapter CAM
2181 * update adapter filters
2182 *
2183 * Return Codes:
2184 * None
2185 *
2186 * Assumptions:
2187 * Multicast addresses are presented in canonical (LSB) format.
2188 *
2189 * Side Effects:
2190 * On-board adapter CAM and filters are updated.
2191 */
2192
2193static void dfx_ctl_set_multicast_list(struct net_device *dev)
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08002194{
2195 DFX_board_t *bp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002196 int i; /* used as index in for loop */
2197 struct dev_mc_list *dmi; /* ptr to multicast addr entry */
2198
2199 /* Enable LLC frame promiscuous mode, if necessary */
2200
2201 if (dev->flags & IFF_PROMISC)
2202 bp->ind_group_prom = PI_FSTATE_K_PASS; /* Enable LLC ind/group prom mode */
2203
2204 /* Else, update multicast address table */
2205
2206 else
2207 {
2208 bp->ind_group_prom = PI_FSTATE_K_BLOCK; /* Disable LLC ind/group prom mode */
2209 /*
2210 * Check whether incoming multicast address count exceeds table size
2211 *
2212 * Note: The adapters utilize an on-board 64 entry CAM for
2213 * supporting perfect filtering of multicast packets
2214 * and bridge functions when adding unicast addresses.
2215 * There is no hash function available. To support
2216 * additional multicast addresses, the all multicast
2217 * filter (LLC group promiscuous mode) must be enabled.
2218 *
2219 * The firmware reserves two CAM entries for SMT-related
2220 * multicast addresses, which leaves 62 entries available.
2221 * The following code ensures that we're not being asked
2222 * to add more than 62 addresses to the CAM. If we are,
2223 * the driver will enable the all multicast filter.
2224 * Should the number of multicast addresses drop below
2225 * the high water mark, the filter will be disabled and
2226 * perfect filtering will be used.
2227 */
2228
2229 if (dev->mc_count > (PI_CMD_ADDR_FILTER_K_SIZE - bp->uc_count))
2230 {
2231 bp->group_prom = PI_FSTATE_K_PASS; /* Enable LLC group prom mode */
2232 bp->mc_count = 0; /* Don't add mc addrs to CAM */
2233 }
2234 else
2235 {
2236 bp->group_prom = PI_FSTATE_K_BLOCK; /* Disable LLC group prom mode */
2237 bp->mc_count = dev->mc_count; /* Add mc addrs to CAM */
2238 }
2239
2240 /* Copy addresses to multicast address table, then update adapter CAM */
2241
2242 dmi = dev->mc_list; /* point to first multicast addr */
2243 for (i=0; i < bp->mc_count; i++)
2244 {
2245 memcpy(&bp->mc_table[i*FDDI_K_ALEN], dmi->dmi_addr, FDDI_K_ALEN);
2246 dmi = dmi->next; /* point to next multicast addr */
2247 }
2248 if (dfx_ctl_update_cam(bp) != DFX_K_SUCCESS)
2249 {
2250 DBG_printk("%s: Could not update multicast address table!\n", dev->name);
2251 }
2252 else
2253 {
2254 DBG_printk("%s: Multicast address table updated! Added %d addresses.\n", dev->name, bp->mc_count);
2255 }
2256 }
2257
2258 /* Update adapter filters */
2259
2260 if (dfx_ctl_update_filters(bp) != DFX_K_SUCCESS)
2261 {
2262 DBG_printk("%s: Could not update adapter filters!\n", dev->name);
2263 }
2264 else
2265 {
2266 DBG_printk("%s: Adapter filters updated!\n", dev->name);
2267 }
2268 }
2269
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002270
Linus Torvalds1da177e2005-04-16 15:20:36 -07002271/*
2272 * ===========================
2273 * = dfx_ctl_set_mac_address =
2274 * ===========================
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002275 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002276 * Overview:
2277 * Add node address override (unicast address) to adapter
2278 * CAM and update dev_addr field in device table.
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002279 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002280 * Returns:
2281 * None
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002282 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002283 * Arguments:
2284 * dev - pointer to device information
2285 * addr - pointer to sockaddr structure containing unicast address to add
2286 *
2287 * Functional Description:
2288 * The adapter supports node address overrides by adding one or more
2289 * unicast addresses to the adapter CAM. This is similar to adding
2290 * multicast addresses. In this routine we'll update the driver and
2291 * device structures with the new address, then update the adapter CAM
2292 * to ensure that the adapter will copy and strip frames destined and
2293 * sourced by that address.
2294 *
2295 * Return Codes:
2296 * Always returns zero.
2297 *
2298 * Assumptions:
2299 * The address pointed to by addr->sa_data is a valid unicast
2300 * address and is presented in canonical (LSB) format.
2301 *
2302 * Side Effects:
2303 * On-board adapter CAM is updated. On-board adapter filters
2304 * may be updated.
2305 */
2306
2307static int dfx_ctl_set_mac_address(struct net_device *dev, void *addr)
2308 {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002309 struct sockaddr *p_sockaddr = (struct sockaddr *)addr;
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08002310 DFX_board_t *bp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002311
2312 /* Copy unicast address to driver-maintained structs and update count */
2313
2314 memcpy(dev->dev_addr, p_sockaddr->sa_data, FDDI_K_ALEN); /* update device struct */
2315 memcpy(&bp->uc_table[0], p_sockaddr->sa_data, FDDI_K_ALEN); /* update driver struct */
2316 bp->uc_count = 1;
2317
2318 /*
2319 * Verify we're not exceeding the CAM size by adding unicast address
2320 *
2321 * Note: It's possible that before entering this routine we've
2322 * already filled the CAM with 62 multicast addresses.
2323 * Since we need to place the node address override into
2324 * the CAM, we have to check to see that we're not
2325 * exceeding the CAM size. If we are, we have to enable
2326 * the LLC group (multicast) promiscuous mode filter as
2327 * in dfx_ctl_set_multicast_list.
2328 */
2329
2330 if ((bp->uc_count + bp->mc_count) > PI_CMD_ADDR_FILTER_K_SIZE)
2331 {
2332 bp->group_prom = PI_FSTATE_K_PASS; /* Enable LLC group prom mode */
2333 bp->mc_count = 0; /* Don't add mc addrs to CAM */
2334
2335 /* Update adapter filters */
2336
2337 if (dfx_ctl_update_filters(bp) != DFX_K_SUCCESS)
2338 {
2339 DBG_printk("%s: Could not update adapter filters!\n", dev->name);
2340 }
2341 else
2342 {
2343 DBG_printk("%s: Adapter filters updated!\n", dev->name);
2344 }
2345 }
2346
2347 /* Update adapter CAM with new unicast address */
2348
2349 if (dfx_ctl_update_cam(bp) != DFX_K_SUCCESS)
2350 {
2351 DBG_printk("%s: Could not set new MAC address!\n", dev->name);
2352 }
2353 else
2354 {
2355 DBG_printk("%s: Adapter CAM updated with new MAC address\n", dev->name);
2356 }
2357 return(0); /* always return zero */
2358 }
2359
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002360
Linus Torvalds1da177e2005-04-16 15:20:36 -07002361/*
2362 * ======================
2363 * = dfx_ctl_update_cam =
2364 * ======================
2365 *
2366 * Overview:
2367 * Procedure to update adapter CAM (Content Addressable Memory)
2368 * with desired unicast and multicast address entries.
2369 *
2370 * Returns:
2371 * Condition code
2372 *
2373 * Arguments:
2374 * bp - pointer to board information
2375 *
2376 * Functional Description:
2377 * Updates adapter CAM with current contents of board structure
2378 * unicast and multicast address tables. Since there are only 62
2379 * free entries in CAM, this routine ensures that the command
2380 * request buffer is not overrun.
2381 *
2382 * Return Codes:
2383 * DFX_K_SUCCESS - Request succeeded
2384 * DFX_K_FAILURE - Request failed
2385 *
2386 * Assumptions:
2387 * All addresses being added (unicast and multicast) are in canonical
2388 * order.
2389 *
2390 * Side Effects:
2391 * On-board adapter CAM is updated.
2392 */
2393
2394static int dfx_ctl_update_cam(DFX_board_t *bp)
2395 {
2396 int i; /* used as index */
2397 PI_LAN_ADDR *p_addr; /* pointer to CAM entry */
2398
2399 /*
2400 * Fill in command request information
2401 *
2402 * Note: Even though both the unicast and multicast address
2403 * table entries are stored as contiguous 6 byte entries,
2404 * the firmware address filter set command expects each
2405 * entry to be two longwords (8 bytes total). We must be
2406 * careful to only copy the six bytes of each unicast and
2407 * multicast table entry into each command entry. This
2408 * is also why we must first clear the entire command
2409 * request buffer.
2410 */
2411
2412 memset(bp->cmd_req_virt, 0, PI_CMD_REQ_K_SIZE_MAX); /* first clear buffer */
2413 bp->cmd_req_virt->cmd_type = PI_CMD_K_ADDR_FILTER_SET;
2414 p_addr = &bp->cmd_req_virt->addr_filter_set.entry[0];
2415
2416 /* Now add unicast addresses to command request buffer, if any */
2417
2418 for (i=0; i < (int)bp->uc_count; i++)
2419 {
2420 if (i < PI_CMD_ADDR_FILTER_K_SIZE)
2421 {
2422 memcpy(p_addr, &bp->uc_table[i*FDDI_K_ALEN], FDDI_K_ALEN);
2423 p_addr++; /* point to next command entry */
2424 }
2425 }
2426
2427 /* Now add multicast addresses to command request buffer, if any */
2428
2429 for (i=0; i < (int)bp->mc_count; i++)
2430 {
2431 if ((i + bp->uc_count) < PI_CMD_ADDR_FILTER_K_SIZE)
2432 {
2433 memcpy(p_addr, &bp->mc_table[i*FDDI_K_ALEN], FDDI_K_ALEN);
2434 p_addr++; /* point to next command entry */
2435 }
2436 }
2437
2438 /* Issue command to update adapter CAM, then return */
2439
2440 if (dfx_hw_dma_cmd_req(bp) != DFX_K_SUCCESS)
2441 return(DFX_K_FAILURE);
2442 return(DFX_K_SUCCESS);
2443 }
2444
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002445
Linus Torvalds1da177e2005-04-16 15:20:36 -07002446/*
2447 * ==========================
2448 * = dfx_ctl_update_filters =
2449 * ==========================
2450 *
2451 * Overview:
2452 * Procedure to update adapter filters with desired
2453 * filter settings.
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002454 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002455 * Returns:
2456 * Condition code
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002457 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002458 * Arguments:
2459 * bp - pointer to board information
2460 *
2461 * Functional Description:
2462 * Enables or disables filter using current filter settings.
2463 *
2464 * Return Codes:
2465 * DFX_K_SUCCESS - Request succeeded.
2466 * DFX_K_FAILURE - Request failed.
2467 *
2468 * Assumptions:
2469 * We must always pass up packets destined to the broadcast
2470 * address (FF-FF-FF-FF-FF-FF), so we'll always keep the
2471 * broadcast filter enabled.
2472 *
2473 * Side Effects:
2474 * On-board adapter filters are updated.
2475 */
2476
2477static int dfx_ctl_update_filters(DFX_board_t *bp)
2478 {
2479 int i = 0; /* used as index */
2480
2481 /* Fill in command request information */
2482
2483 bp->cmd_req_virt->cmd_type = PI_CMD_K_FILTERS_SET;
2484
2485 /* Initialize Broadcast filter - * ALWAYS ENABLED * */
2486
2487 bp->cmd_req_virt->filter_set.item[i].item_code = PI_ITEM_K_BROADCAST;
2488 bp->cmd_req_virt->filter_set.item[i++].value = PI_FSTATE_K_PASS;
2489
2490 /* Initialize LLC Individual/Group Promiscuous filter */
2491
2492 bp->cmd_req_virt->filter_set.item[i].item_code = PI_ITEM_K_IND_GROUP_PROM;
2493 bp->cmd_req_virt->filter_set.item[i++].value = bp->ind_group_prom;
2494
2495 /* Initialize LLC Group Promiscuous filter */
2496
2497 bp->cmd_req_virt->filter_set.item[i].item_code = PI_ITEM_K_GROUP_PROM;
2498 bp->cmd_req_virt->filter_set.item[i++].value = bp->group_prom;
2499
2500 /* Terminate the item code list */
2501
2502 bp->cmd_req_virt->filter_set.item[i].item_code = PI_ITEM_K_EOL;
2503
2504 /* Issue command to update adapter filters, then return */
2505
2506 if (dfx_hw_dma_cmd_req(bp) != DFX_K_SUCCESS)
2507 return(DFX_K_FAILURE);
2508 return(DFX_K_SUCCESS);
2509 }
2510
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002511
Linus Torvalds1da177e2005-04-16 15:20:36 -07002512/*
2513 * ======================
2514 * = dfx_hw_dma_cmd_req =
2515 * ======================
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002516 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002517 * Overview:
2518 * Sends PDQ DMA command to adapter firmware
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002519 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002520 * Returns:
2521 * Condition code
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002522 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002523 * Arguments:
2524 * bp - pointer to board information
2525 *
2526 * Functional Description:
2527 * The command request and response buffers are posted to the adapter in the manner
2528 * described in the PDQ Port Specification:
2529 *
2530 * 1. Command Response Buffer is posted to adapter.
2531 * 2. Command Request Buffer is posted to adapter.
2532 * 3. Command Request consumer index is polled until it indicates that request
2533 * buffer has been DMA'd to adapter.
2534 * 4. Command Response consumer index is polled until it indicates that response
2535 * buffer has been DMA'd from adapter.
2536 *
2537 * This ordering ensures that a response buffer is already available for the firmware
2538 * to use once it's done processing the request buffer.
2539 *
2540 * Return Codes:
2541 * DFX_K_SUCCESS - DMA command succeeded
2542 * DFX_K_OUTSTATE - Adapter is NOT in proper state
2543 * DFX_K_HW_TIMEOUT - DMA command timed out
2544 *
2545 * Assumptions:
2546 * Command request buffer has already been filled with desired DMA command.
2547 *
2548 * Side Effects:
2549 * None
2550 */
2551
2552static int dfx_hw_dma_cmd_req(DFX_board_t *bp)
2553 {
2554 int status; /* adapter status */
2555 int timeout_cnt; /* used in for loops */
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002556
Linus Torvalds1da177e2005-04-16 15:20:36 -07002557 /* Make sure the adapter is in a state that we can issue the DMA command in */
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002558
Linus Torvalds1da177e2005-04-16 15:20:36 -07002559 status = dfx_hw_adap_state_rd(bp);
2560 if ((status == PI_STATE_K_RESET) ||
2561 (status == PI_STATE_K_HALTED) ||
2562 (status == PI_STATE_K_DMA_UNAVAIL) ||
2563 (status == PI_STATE_K_UPGRADE))
2564 return(DFX_K_OUTSTATE);
2565
2566 /* Put response buffer on the command response queue */
2567
2568 bp->descr_block_virt->cmd_rsp[bp->cmd_rsp_reg.index.prod].long_0 = (u32) (PI_RCV_DESCR_M_SOP |
2569 ((PI_CMD_RSP_K_SIZE_MAX / PI_ALIGN_K_CMD_RSP_BUFF) << PI_RCV_DESCR_V_SEG_LEN));
2570 bp->descr_block_virt->cmd_rsp[bp->cmd_rsp_reg.index.prod].long_1 = bp->cmd_rsp_phys;
2571
2572 /* Bump (and wrap) the producer index and write out to register */
2573
2574 bp->cmd_rsp_reg.index.prod += 1;
2575 bp->cmd_rsp_reg.index.prod &= PI_CMD_RSP_K_NUM_ENTRIES-1;
2576 dfx_port_write_long(bp, PI_PDQ_K_REG_CMD_RSP_PROD, bp->cmd_rsp_reg.lword);
2577
2578 /* Put request buffer on the command request queue */
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002579
Linus Torvalds1da177e2005-04-16 15:20:36 -07002580 bp->descr_block_virt->cmd_req[bp->cmd_req_reg.index.prod].long_0 = (u32) (PI_XMT_DESCR_M_SOP |
2581 PI_XMT_DESCR_M_EOP | (PI_CMD_REQ_K_SIZE_MAX << PI_XMT_DESCR_V_SEG_LEN));
2582 bp->descr_block_virt->cmd_req[bp->cmd_req_reg.index.prod].long_1 = bp->cmd_req_phys;
2583
2584 /* Bump (and wrap) the producer index and write out to register */
2585
2586 bp->cmd_req_reg.index.prod += 1;
2587 bp->cmd_req_reg.index.prod &= PI_CMD_REQ_K_NUM_ENTRIES-1;
2588 dfx_port_write_long(bp, PI_PDQ_K_REG_CMD_REQ_PROD, bp->cmd_req_reg.lword);
2589
2590 /*
2591 * Here we wait for the command request consumer index to be equal
2592 * to the producer, indicating that the adapter has DMAed the request.
2593 */
2594
2595 for (timeout_cnt = 20000; timeout_cnt > 0; timeout_cnt--)
2596 {
2597 if (bp->cmd_req_reg.index.prod == (u8)(bp->cons_block_virt->cmd_req))
2598 break;
2599 udelay(100); /* wait for 100 microseconds */
2600 }
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002601 if (timeout_cnt == 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002602 return(DFX_K_HW_TIMEOUT);
2603
2604 /* Bump (and wrap) the completion index and write out to register */
2605
2606 bp->cmd_req_reg.index.comp += 1;
2607 bp->cmd_req_reg.index.comp &= PI_CMD_REQ_K_NUM_ENTRIES-1;
2608 dfx_port_write_long(bp, PI_PDQ_K_REG_CMD_REQ_PROD, bp->cmd_req_reg.lword);
2609
2610 /*
2611 * Here we wait for the command response consumer index to be equal
2612 * to the producer, indicating that the adapter has DMAed the response.
2613 */
2614
2615 for (timeout_cnt = 20000; timeout_cnt > 0; timeout_cnt--)
2616 {
2617 if (bp->cmd_rsp_reg.index.prod == (u8)(bp->cons_block_virt->cmd_rsp))
2618 break;
2619 udelay(100); /* wait for 100 microseconds */
2620 }
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002621 if (timeout_cnt == 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002622 return(DFX_K_HW_TIMEOUT);
2623
2624 /* Bump (and wrap) the completion index and write out to register */
2625
2626 bp->cmd_rsp_reg.index.comp += 1;
2627 bp->cmd_rsp_reg.index.comp &= PI_CMD_RSP_K_NUM_ENTRIES-1;
2628 dfx_port_write_long(bp, PI_PDQ_K_REG_CMD_RSP_PROD, bp->cmd_rsp_reg.lword);
2629 return(DFX_K_SUCCESS);
2630 }
2631
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002632
Linus Torvalds1da177e2005-04-16 15:20:36 -07002633/*
2634 * ========================
2635 * = dfx_hw_port_ctrl_req =
2636 * ========================
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002637 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002638 * Overview:
2639 * Sends PDQ port control command to adapter firmware
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002640 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002641 * Returns:
2642 * Host data register value in host_data if ptr is not NULL
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002643 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002644 * Arguments:
2645 * bp - pointer to board information
2646 * command - port control command
2647 * data_a - port data A register value
2648 * data_b - port data B register value
2649 * host_data - ptr to host data register value
2650 *
2651 * Functional Description:
2652 * Send generic port control command to adapter by writing
2653 * to various PDQ port registers, then polling for completion.
2654 *
2655 * Return Codes:
2656 * DFX_K_SUCCESS - port control command succeeded
2657 * DFX_K_HW_TIMEOUT - port control command timed out
2658 *
2659 * Assumptions:
2660 * None
2661 *
2662 * Side Effects:
2663 * None
2664 */
2665
2666static int dfx_hw_port_ctrl_req(
2667 DFX_board_t *bp,
2668 PI_UINT32 command,
2669 PI_UINT32 data_a,
2670 PI_UINT32 data_b,
2671 PI_UINT32 *host_data
2672 )
2673
2674 {
2675 PI_UINT32 port_cmd; /* Port Control command register value */
2676 int timeout_cnt; /* used in for loops */
2677
2678 /* Set Command Error bit in command longword */
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002679
Linus Torvalds1da177e2005-04-16 15:20:36 -07002680 port_cmd = (PI_UINT32) (command | PI_PCTRL_M_CMD_ERROR);
2681
2682 /* Issue port command to the adapter */
2683
2684 dfx_port_write_long(bp, PI_PDQ_K_REG_PORT_DATA_A, data_a);
2685 dfx_port_write_long(bp, PI_PDQ_K_REG_PORT_DATA_B, data_b);
2686 dfx_port_write_long(bp, PI_PDQ_K_REG_PORT_CTRL, port_cmd);
2687
2688 /* Now wait for command to complete */
2689
2690 if (command == PI_PCTRL_M_BLAST_FLASH)
2691 timeout_cnt = 600000; /* set command timeout count to 60 seconds */
2692 else
2693 timeout_cnt = 20000; /* set command timeout count to 2 seconds */
2694
2695 for (; timeout_cnt > 0; timeout_cnt--)
2696 {
2697 dfx_port_read_long(bp, PI_PDQ_K_REG_PORT_CTRL, &port_cmd);
2698 if (!(port_cmd & PI_PCTRL_M_CMD_ERROR))
2699 break;
2700 udelay(100); /* wait for 100 microseconds */
2701 }
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002702 if (timeout_cnt == 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002703 return(DFX_K_HW_TIMEOUT);
2704
2705 /*
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002706 * If the address of host_data is non-zero, assume caller has supplied a
2707 * non NULL pointer, and return the contents of the HOST_DATA register in
Linus Torvalds1da177e2005-04-16 15:20:36 -07002708 * it.
2709 */
2710
2711 if (host_data != NULL)
2712 dfx_port_read_long(bp, PI_PDQ_K_REG_HOST_DATA, host_data);
2713 return(DFX_K_SUCCESS);
2714 }
2715
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002716
Linus Torvalds1da177e2005-04-16 15:20:36 -07002717/*
2718 * =====================
2719 * = dfx_hw_adap_reset =
2720 * =====================
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002721 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002722 * Overview:
2723 * Resets adapter
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002724 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002725 * Returns:
2726 * None
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002727 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002728 * Arguments:
2729 * bp - pointer to board information
2730 * type - type of reset to perform
2731 *
2732 * Functional Description:
2733 * Issue soft reset to adapter by writing to PDQ Port Reset
2734 * register. Use incoming reset type to tell adapter what
2735 * kind of reset operation to perform.
2736 *
2737 * Return Codes:
2738 * None
2739 *
2740 * Assumptions:
2741 * This routine merely issues a soft reset to the adapter.
2742 * It is expected that after this routine returns, the caller
2743 * will appropriately poll the Port Status register for the
2744 * adapter to enter the proper state.
2745 *
2746 * Side Effects:
2747 * Internal adapter registers are cleared.
2748 */
2749
2750static void dfx_hw_adap_reset(
2751 DFX_board_t *bp,
2752 PI_UINT32 type
2753 )
2754
2755 {
2756 /* Set Reset type and assert reset */
2757
2758 dfx_port_write_long(bp, PI_PDQ_K_REG_PORT_DATA_A, type); /* tell adapter type of reset */
2759 dfx_port_write_long(bp, PI_PDQ_K_REG_PORT_RESET, PI_RESET_M_ASSERT_RESET);
2760
2761 /* Wait for at least 1 Microsecond according to the spec. We wait 20 just to be safe */
2762
2763 udelay(20);
2764
2765 /* Deassert reset */
2766
2767 dfx_port_write_long(bp, PI_PDQ_K_REG_PORT_RESET, 0);
2768 }
2769
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002770
Linus Torvalds1da177e2005-04-16 15:20:36 -07002771/*
2772 * ========================
2773 * = dfx_hw_adap_state_rd =
2774 * ========================
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002775 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002776 * Overview:
2777 * Returns current adapter state
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002778 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002779 * Returns:
2780 * Adapter state per PDQ Port Specification
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002781 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002782 * Arguments:
2783 * bp - pointer to board information
2784 *
2785 * Functional Description:
2786 * Reads PDQ Port Status register and returns adapter state.
2787 *
2788 * Return Codes:
2789 * None
2790 *
2791 * Assumptions:
2792 * None
2793 *
2794 * Side Effects:
2795 * None
2796 */
2797
2798static int dfx_hw_adap_state_rd(DFX_board_t *bp)
2799 {
2800 PI_UINT32 port_status; /* Port Status register value */
2801
2802 dfx_port_read_long(bp, PI_PDQ_K_REG_PORT_STATUS, &port_status);
2803 return((port_status & PI_PSTATUS_M_STATE) >> PI_PSTATUS_V_STATE);
2804 }
2805
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002806
Linus Torvalds1da177e2005-04-16 15:20:36 -07002807/*
2808 * =====================
2809 * = dfx_hw_dma_uninit =
2810 * =====================
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002811 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002812 * Overview:
2813 * Brings adapter to DMA_UNAVAILABLE state
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002814 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002815 * Returns:
2816 * Condition code
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002817 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002818 * Arguments:
2819 * bp - pointer to board information
2820 * type - type of reset to perform
2821 *
2822 * Functional Description:
2823 * Bring adapter to DMA_UNAVAILABLE state by performing the following:
2824 * 1. Set reset type bit in Port Data A Register then reset adapter.
2825 * 2. Check that adapter is in DMA_UNAVAILABLE state.
2826 *
2827 * Return Codes:
2828 * DFX_K_SUCCESS - adapter is in DMA_UNAVAILABLE state
2829 * DFX_K_HW_TIMEOUT - adapter did not reset properly
2830 *
2831 * Assumptions:
2832 * None
2833 *
2834 * Side Effects:
2835 * Internal adapter registers are cleared.
2836 */
2837
2838static int dfx_hw_dma_uninit(DFX_board_t *bp, PI_UINT32 type)
2839 {
2840 int timeout_cnt; /* used in for loops */
2841
2842 /* Set reset type bit and reset adapter */
2843
2844 dfx_hw_adap_reset(bp, type);
2845
2846 /* Now wait for adapter to enter DMA_UNAVAILABLE state */
2847
2848 for (timeout_cnt = 100000; timeout_cnt > 0; timeout_cnt--)
2849 {
2850 if (dfx_hw_adap_state_rd(bp) == PI_STATE_K_DMA_UNAVAIL)
2851 break;
2852 udelay(100); /* wait for 100 microseconds */
2853 }
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002854 if (timeout_cnt == 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002855 return(DFX_K_HW_TIMEOUT);
2856 return(DFX_K_SUCCESS);
2857 }
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002858
Linus Torvalds1da177e2005-04-16 15:20:36 -07002859/*
2860 * Align an sk_buff to a boundary power of 2
2861 *
2862 */
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002863
Linus Torvalds1da177e2005-04-16 15:20:36 -07002864static void my_skb_align(struct sk_buff *skb, int n)
2865{
2866 unsigned long x = (unsigned long)skb->data;
2867 unsigned long v;
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002868
Linus Torvalds1da177e2005-04-16 15:20:36 -07002869 v = ALIGN(x, n); /* Where we want to be */
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002870
Linus Torvalds1da177e2005-04-16 15:20:36 -07002871 skb_reserve(skb, v - x);
2872}
2873
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002874
Linus Torvalds1da177e2005-04-16 15:20:36 -07002875/*
2876 * ================
2877 * = dfx_rcv_init =
2878 * ================
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002879 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002880 * Overview:
2881 * Produces buffers to adapter LLC Host receive descriptor block
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002882 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002883 * Returns:
2884 * None
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002885 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002886 * Arguments:
2887 * bp - pointer to board information
2888 * get_buffers - non-zero if buffers to be allocated
2889 *
2890 * Functional Description:
2891 * This routine can be called during dfx_adap_init() or during an adapter
2892 * reset. It initializes the descriptor block and produces all allocated
2893 * LLC Host queue receive buffers.
2894 *
2895 * Return Codes:
2896 * Return 0 on success or -ENOMEM if buffer allocation failed (when using
2897 * dynamic buffer allocation). If the buffer allocation failed, the
2898 * already allocated buffers will not be released and the caller should do
2899 * this.
2900 *
2901 * Assumptions:
2902 * The PDQ has been reset and the adapter and driver maintained Type 2
2903 * register indices are cleared.
2904 *
2905 * Side Effects:
2906 * Receive buffers are posted to the adapter LLC queue and the adapter
2907 * is notified.
2908 */
2909
2910static int dfx_rcv_init(DFX_board_t *bp, int get_buffers)
2911 {
2912 int i, j; /* used in for loop */
2913
2914 /*
2915 * Since each receive buffer is a single fragment of same length, initialize
2916 * first longword in each receive descriptor for entire LLC Host descriptor
2917 * block. Also initialize second longword in each receive descriptor with
2918 * physical address of receive buffer. We'll always allocate receive
2919 * buffers in powers of 2 so that we can easily fill the 256 entry descriptor
2920 * block and produce new receive buffers by simply updating the receive
2921 * producer index.
2922 *
2923 * Assumptions:
2924 * To support all shipping versions of PDQ, the receive buffer size
2925 * must be mod 128 in length and the physical address must be 128 byte
2926 * aligned. In other words, bits 0-6 of the length and address must
2927 * be zero for the following descriptor field entries to be correct on
2928 * all PDQ-based boards. We guaranteed both requirements during
2929 * driver initialization when we allocated memory for the receive buffers.
2930 */
2931
2932 if (get_buffers) {
2933#ifdef DYNAMIC_BUFFERS
2934 for (i = 0; i < (int)(bp->rcv_bufs_to_post); i++)
2935 for (j = 0; (i + j) < (int)PI_RCV_DATA_K_NUM_ENTRIES; j += bp->rcv_bufs_to_post)
2936 {
2937 struct sk_buff *newskb = __dev_alloc_skb(NEW_SKB_SIZE, GFP_NOIO);
2938 if (!newskb)
2939 return -ENOMEM;
2940 bp->descr_block_virt->rcv_data[i+j].long_0 = (u32) (PI_RCV_DESCR_M_SOP |
2941 ((PI_RCV_DATA_K_SIZE_MAX / PI_ALIGN_K_RCV_DATA_BUFF) << PI_RCV_DESCR_V_SEG_LEN));
2942 /*
2943 * align to 128 bytes for compatibility with
2944 * the old EISA boards.
2945 */
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002946
Linus Torvalds1da177e2005-04-16 15:20:36 -07002947 my_skb_align(newskb, 128);
2948 bp->descr_block_virt->rcv_data[i + j].long_1 =
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08002949 (u32)dma_map_single(bp->bus_dev, newskb->data,
Linus Torvalds1da177e2005-04-16 15:20:36 -07002950 NEW_SKB_SIZE,
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08002951 DMA_FROM_DEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002952 /*
2953 * p_rcv_buff_va is only used inside the
2954 * kernel so we put the skb pointer here.
2955 */
2956 bp->p_rcv_buff_va[i+j] = (char *) newskb;
2957 }
2958#else
2959 for (i=0; i < (int)(bp->rcv_bufs_to_post); i++)
2960 for (j=0; (i + j) < (int)PI_RCV_DATA_K_NUM_ENTRIES; j += bp->rcv_bufs_to_post)
2961 {
2962 bp->descr_block_virt->rcv_data[i+j].long_0 = (u32) (PI_RCV_DESCR_M_SOP |
2963 ((PI_RCV_DATA_K_SIZE_MAX / PI_ALIGN_K_RCV_DATA_BUFF) << PI_RCV_DESCR_V_SEG_LEN));
2964 bp->descr_block_virt->rcv_data[i+j].long_1 = (u32) (bp->rcv_block_phys + (i * PI_RCV_DATA_K_SIZE_MAX));
2965 bp->p_rcv_buff_va[i+j] = (char *) (bp->rcv_block_virt + (i * PI_RCV_DATA_K_SIZE_MAX));
2966 }
2967#endif
2968 }
2969
2970 /* Update receive producer and Type 2 register */
2971
2972 bp->rcv_xmt_reg.index.rcv_prod = bp->rcv_bufs_to_post;
2973 dfx_port_write_long(bp, PI_PDQ_K_REG_TYPE_2_PROD, bp->rcv_xmt_reg.lword);
2974 return 0;
2975 }
2976
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002977
Linus Torvalds1da177e2005-04-16 15:20:36 -07002978/*
2979 * =========================
2980 * = dfx_rcv_queue_process =
2981 * =========================
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002982 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002983 * Overview:
2984 * Process received LLC frames.
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002985 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002986 * Returns:
2987 * None
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002988 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07002989 * Arguments:
2990 * bp - pointer to board information
2991 *
2992 * Functional Description:
2993 * Received LLC frames are processed until there are no more consumed frames.
2994 * Once all frames are processed, the receive buffers are returned to the
2995 * adapter. Note that this algorithm fixes the length of time that can be spent
2996 * in this routine, because there are a fixed number of receive buffers to
2997 * process and buffers are not produced until this routine exits and returns
2998 * to the ISR.
2999 *
3000 * Return Codes:
3001 * None
3002 *
3003 * Assumptions:
3004 * None
3005 *
3006 * Side Effects:
3007 * None
3008 */
3009
3010static void dfx_rcv_queue_process(
3011 DFX_board_t *bp
3012 )
3013
3014 {
3015 PI_TYPE_2_CONSUMER *p_type_2_cons; /* ptr to rcv/xmt consumer block register */
3016 char *p_buff; /* ptr to start of packet receive buffer (FMC descriptor) */
3017 u32 descr, pkt_len; /* FMC descriptor field and packet length */
3018 struct sk_buff *skb; /* pointer to a sk_buff to hold incoming packet data */
3019
3020 /* Service all consumed LLC receive frames */
3021
3022 p_type_2_cons = (PI_TYPE_2_CONSUMER *)(&bp->cons_block_virt->xmt_rcv_data);
3023 while (bp->rcv_xmt_reg.index.rcv_comp != p_type_2_cons->index.rcv_cons)
3024 {
3025 /* Process any errors */
3026
3027 int entry;
3028
3029 entry = bp->rcv_xmt_reg.index.rcv_comp;
3030#ifdef DYNAMIC_BUFFERS
3031 p_buff = (char *) (((struct sk_buff *)bp->p_rcv_buff_va[entry])->data);
3032#else
3033 p_buff = (char *) bp->p_rcv_buff_va[entry];
3034#endif
3035 memcpy(&descr, p_buff + RCV_BUFF_K_DESCR, sizeof(u32));
3036
3037 if (descr & PI_FMC_DESCR_M_RCC_FLUSH)
3038 {
3039 if (descr & PI_FMC_DESCR_M_RCC_CRC)
3040 bp->rcv_crc_errors++;
3041 else
3042 bp->rcv_frame_status_errors++;
3043 }
3044 else
3045 {
3046 int rx_in_place = 0;
3047
3048 /* The frame was received without errors - verify packet length */
3049
3050 pkt_len = (u32)((descr & PI_FMC_DESCR_M_LEN) >> PI_FMC_DESCR_V_LEN);
3051 pkt_len -= 4; /* subtract 4 byte CRC */
3052 if (!IN_RANGE(pkt_len, FDDI_K_LLC_ZLEN, FDDI_K_LLC_LEN))
3053 bp->rcv_length_errors++;
3054 else{
3055#ifdef DYNAMIC_BUFFERS
3056 if (pkt_len > SKBUFF_RX_COPYBREAK) {
3057 struct sk_buff *newskb;
3058
3059 newskb = dev_alloc_skb(NEW_SKB_SIZE);
3060 if (newskb){
3061 rx_in_place = 1;
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003062
Linus Torvalds1da177e2005-04-16 15:20:36 -07003063 my_skb_align(newskb, 128);
3064 skb = (struct sk_buff *)bp->p_rcv_buff_va[entry];
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003065 dma_unmap_single(bp->bus_dev,
Linus Torvalds1da177e2005-04-16 15:20:36 -07003066 bp->descr_block_virt->rcv_data[entry].long_1,
3067 NEW_SKB_SIZE,
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003068 DMA_FROM_DEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003069 skb_reserve(skb, RCV_BUFF_K_PADDING);
3070 bp->p_rcv_buff_va[entry] = (char *)newskb;
3071 bp->descr_block_virt->rcv_data[entry].long_1 =
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003072 (u32)dma_map_single(bp->bus_dev,
Linus Torvalds1da177e2005-04-16 15:20:36 -07003073 newskb->data,
3074 NEW_SKB_SIZE,
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003075 DMA_FROM_DEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003076 } else
3077 skb = NULL;
3078 } else
3079#endif
3080 skb = dev_alloc_skb(pkt_len+3); /* alloc new buffer to pass up, add room for PRH */
3081 if (skb == NULL)
3082 {
3083 printk("%s: Could not allocate receive buffer. Dropping packet.\n", bp->dev->name);
3084 bp->rcv_discards++;
3085 break;
3086 }
3087 else {
3088#ifndef DYNAMIC_BUFFERS
3089 if (! rx_in_place)
3090#endif
3091 {
3092 /* Receive buffer allocated, pass receive packet up */
3093
3094 memcpy(skb->data, p_buff + RCV_BUFF_K_PADDING, pkt_len+3);
3095 }
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003096
Linus Torvalds1da177e2005-04-16 15:20:36 -07003097 skb_reserve(skb,3); /* adjust data field so that it points to FC byte */
3098 skb_put(skb, pkt_len); /* pass up packet length, NOT including CRC */
3099 skb->dev = bp->dev; /* pass up device pointer */
3100
3101 skb->protocol = fddi_type_trans(skb, bp->dev);
3102 bp->rcv_total_bytes += skb->len;
3103 netif_rx(skb);
3104
3105 /* Update the rcv counters */
3106 bp->dev->last_rx = jiffies;
3107 bp->rcv_total_frames++;
3108 if (*(p_buff + RCV_BUFF_K_DA) & 0x01)
3109 bp->rcv_multicast_frames++;
3110 }
3111 }
3112 }
3113
3114 /*
3115 * Advance the producer (for recycling) and advance the completion
3116 * (for servicing received frames). Note that it is okay to
3117 * advance the producer without checking that it passes the
3118 * completion index because they are both advanced at the same
3119 * rate.
3120 */
3121
3122 bp->rcv_xmt_reg.index.rcv_prod += 1;
3123 bp->rcv_xmt_reg.index.rcv_comp += 1;
3124 }
3125 }
3126
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003127
Linus Torvalds1da177e2005-04-16 15:20:36 -07003128/*
3129 * =====================
3130 * = dfx_xmt_queue_pkt =
3131 * =====================
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003132 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07003133 * Overview:
3134 * Queues packets for transmission
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003135 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07003136 * Returns:
3137 * Condition code
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003138 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07003139 * Arguments:
3140 * skb - pointer to sk_buff to queue for transmission
3141 * dev - pointer to device information
3142 *
3143 * Functional Description:
3144 * Here we assume that an incoming skb transmit request
3145 * is contained in a single physically contiguous buffer
3146 * in which the virtual address of the start of packet
3147 * (skb->data) can be converted to a physical address
3148 * by using pci_map_single().
3149 *
3150 * Since the adapter architecture requires a three byte
3151 * packet request header to prepend the start of packet,
3152 * we'll write the three byte field immediately prior to
3153 * the FC byte. This assumption is valid because we've
3154 * ensured that dev->hard_header_len includes three pad
3155 * bytes. By posting a single fragment to the adapter,
3156 * we'll reduce the number of descriptor fetches and
3157 * bus traffic needed to send the request.
3158 *
3159 * Also, we can't free the skb until after it's been DMA'd
3160 * out by the adapter, so we'll queue it in the driver and
3161 * return it in dfx_xmt_done.
3162 *
3163 * Return Codes:
3164 * 0 - driver queued packet, link is unavailable, or skbuff was bad
3165 * 1 - caller should requeue the sk_buff for later transmission
3166 *
3167 * Assumptions:
3168 * First and foremost, we assume the incoming skb pointer
3169 * is NOT NULL and is pointing to a valid sk_buff structure.
3170 *
3171 * The outgoing packet is complete, starting with the
3172 * frame control byte including the last byte of data,
3173 * but NOT including the 4 byte CRC. We'll let the
3174 * adapter hardware generate and append the CRC.
3175 *
3176 * The entire packet is stored in one physically
3177 * contiguous buffer which is not cached and whose
3178 * 32-bit physical address can be determined.
3179 *
3180 * It's vital that this routine is NOT reentered for the
3181 * same board and that the OS is not in another section of
3182 * code (eg. dfx_int_common) for the same board on a
3183 * different thread.
3184 *
3185 * Side Effects:
3186 * None
3187 */
3188
3189static int dfx_xmt_queue_pkt(
3190 struct sk_buff *skb,
3191 struct net_device *dev
3192 )
3193
3194 {
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003195 DFX_board_t *bp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003196 u8 prod; /* local transmit producer index */
3197 PI_XMT_DESCR *p_xmt_descr; /* ptr to transmit descriptor block entry */
3198 XMT_DRIVER_DESCR *p_xmt_drv_descr; /* ptr to transmit driver descriptor */
3199 unsigned long flags;
3200
3201 netif_stop_queue(dev);
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003202
Linus Torvalds1da177e2005-04-16 15:20:36 -07003203 /*
3204 * Verify that incoming transmit request is OK
3205 *
3206 * Note: The packet size check is consistent with other
3207 * Linux device drivers, although the correct packet
3208 * size should be verified before calling the
3209 * transmit routine.
3210 */
3211
3212 if (!IN_RANGE(skb->len, FDDI_K_LLC_ZLEN, FDDI_K_LLC_LEN))
3213 {
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003214 printk("%s: Invalid packet length - %u bytes\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -07003215 dev->name, skb->len);
3216 bp->xmt_length_errors++; /* bump error counter */
3217 netif_wake_queue(dev);
3218 dev_kfree_skb(skb);
3219 return(0); /* return "success" */
3220 }
3221 /*
3222 * See if adapter link is available, if not, free buffer
3223 *
3224 * Note: If the link isn't available, free buffer and return 0
3225 * rather than tell the upper layer to requeue the packet.
3226 * The methodology here is that by the time the link
3227 * becomes available, the packet to be sent will be
3228 * fairly stale. By simply dropping the packet, the
3229 * higher layer protocols will eventually time out
3230 * waiting for response packets which it won't receive.
3231 */
3232
3233 if (bp->link_available == PI_K_FALSE)
3234 {
3235 if (dfx_hw_adap_state_rd(bp) == PI_STATE_K_LINK_AVAIL) /* is link really available? */
3236 bp->link_available = PI_K_TRUE; /* if so, set flag and continue */
3237 else
3238 {
3239 bp->xmt_discards++; /* bump error counter */
3240 dev_kfree_skb(skb); /* free sk_buff now */
3241 netif_wake_queue(dev);
3242 return(0); /* return "success" */
3243 }
3244 }
3245
3246 spin_lock_irqsave(&bp->lock, flags);
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003247
Linus Torvalds1da177e2005-04-16 15:20:36 -07003248 /* Get the current producer and the next free xmt data descriptor */
3249
3250 prod = bp->rcv_xmt_reg.index.xmt_prod;
3251 p_xmt_descr = &(bp->descr_block_virt->xmt_data[prod]);
3252
3253 /*
3254 * Get pointer to auxiliary queue entry to contain information
3255 * for this packet.
3256 *
3257 * Note: The current xmt producer index will become the
3258 * current xmt completion index when we complete this
3259 * packet later on. So, we'll get the pointer to the
3260 * next auxiliary queue entry now before we bump the
3261 * producer index.
3262 */
3263
3264 p_xmt_drv_descr = &(bp->xmt_drv_descr_blk[prod++]); /* also bump producer index */
3265
3266 /* Write the three PRH bytes immediately before the FC byte */
3267
3268 skb_push(skb,3);
3269 skb->data[0] = DFX_PRH0_BYTE; /* these byte values are defined */
3270 skb->data[1] = DFX_PRH1_BYTE; /* in the Motorola FDDI MAC chip */
3271 skb->data[2] = DFX_PRH2_BYTE; /* specification */
3272
3273 /*
3274 * Write the descriptor with buffer info and bump producer
3275 *
3276 * Note: Since we need to start DMA from the packet request
3277 * header, we'll add 3 bytes to the DMA buffer length,
3278 * and we'll determine the physical address of the
3279 * buffer from the PRH, not skb->data.
3280 *
3281 * Assumptions:
3282 * 1. Packet starts with the frame control (FC) byte
3283 * at skb->data.
3284 * 2. The 4-byte CRC is not appended to the buffer or
3285 * included in the length.
3286 * 3. Packet length (skb->len) is from FC to end of
3287 * data, inclusive.
3288 * 4. The packet length does not exceed the maximum
3289 * FDDI LLC frame length of 4491 bytes.
3290 * 5. The entire packet is contained in a physically
3291 * contiguous, non-cached, locked memory space
3292 * comprised of a single buffer pointed to by
3293 * skb->data.
3294 * 6. The physical address of the start of packet
3295 * can be determined from the virtual address
3296 * by using pci_map_single() and is only 32-bits
3297 * wide.
3298 */
3299
3300 p_xmt_descr->long_0 = (u32) (PI_XMT_DESCR_M_SOP | PI_XMT_DESCR_M_EOP | ((skb->len) << PI_XMT_DESCR_V_SEG_LEN));
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003301 p_xmt_descr->long_1 = (u32)dma_map_single(bp->bus_dev, skb->data,
3302 skb->len, DMA_TO_DEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003303
3304 /*
3305 * Verify that descriptor is actually available
3306 *
3307 * Note: If descriptor isn't available, return 1 which tells
3308 * the upper layer to requeue the packet for later
3309 * transmission.
3310 *
3311 * We need to ensure that the producer never reaches the
3312 * completion, except to indicate that the queue is empty.
3313 */
3314
3315 if (prod == bp->rcv_xmt_reg.index.xmt_comp)
3316 {
3317 skb_pull(skb,3);
3318 spin_unlock_irqrestore(&bp->lock, flags);
3319 return(1); /* requeue packet for later */
3320 }
3321
3322 /*
3323 * Save info for this packet for xmt done indication routine
3324 *
3325 * Normally, we'd save the producer index in the p_xmt_drv_descr
3326 * structure so that we'd have it handy when we complete this
3327 * packet later (in dfx_xmt_done). However, since the current
3328 * transmit architecture guarantees a single fragment for the
3329 * entire packet, we can simply bump the completion index by
3330 * one (1) for each completed packet.
3331 *
3332 * Note: If this assumption changes and we're presented with
3333 * an inconsistent number of transmit fragments for packet
3334 * data, we'll need to modify this code to save the current
3335 * transmit producer index.
3336 */
3337
3338 p_xmt_drv_descr->p_skb = skb;
3339
3340 /* Update Type 2 register */
3341
3342 bp->rcv_xmt_reg.index.xmt_prod = prod;
3343 dfx_port_write_long(bp, PI_PDQ_K_REG_TYPE_2_PROD, bp->rcv_xmt_reg.lword);
3344 spin_unlock_irqrestore(&bp->lock, flags);
3345 netif_wake_queue(dev);
3346 return(0); /* packet queued to adapter */
3347 }
3348
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003349
Linus Torvalds1da177e2005-04-16 15:20:36 -07003350/*
3351 * ================
3352 * = dfx_xmt_done =
3353 * ================
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003354 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07003355 * Overview:
3356 * Processes all frames that have been transmitted.
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003357 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07003358 * Returns:
3359 * None
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003360 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07003361 * Arguments:
3362 * bp - pointer to board information
3363 *
3364 * Functional Description:
3365 * For all consumed transmit descriptors that have not
3366 * yet been completed, we'll free the skb we were holding
3367 * onto using dev_kfree_skb and bump the appropriate
3368 * counters.
3369 *
3370 * Return Codes:
3371 * None
3372 *
3373 * Assumptions:
3374 * The Type 2 register is not updated in this routine. It is
3375 * assumed that it will be updated in the ISR when dfx_xmt_done
3376 * returns.
3377 *
3378 * Side Effects:
3379 * None
3380 */
3381
3382static int dfx_xmt_done(DFX_board_t *bp)
3383 {
3384 XMT_DRIVER_DESCR *p_xmt_drv_descr; /* ptr to transmit driver descriptor */
3385 PI_TYPE_2_CONSUMER *p_type_2_cons; /* ptr to rcv/xmt consumer block register */
3386 u8 comp; /* local transmit completion index */
3387 int freed = 0; /* buffers freed */
3388
3389 /* Service all consumed transmit frames */
3390
3391 p_type_2_cons = (PI_TYPE_2_CONSUMER *)(&bp->cons_block_virt->xmt_rcv_data);
3392 while (bp->rcv_xmt_reg.index.xmt_comp != p_type_2_cons->index.xmt_cons)
3393 {
3394 /* Get pointer to the transmit driver descriptor block information */
3395
3396 p_xmt_drv_descr = &(bp->xmt_drv_descr_blk[bp->rcv_xmt_reg.index.xmt_comp]);
3397
3398 /* Increment transmit counters */
3399
3400 bp->xmt_total_frames++;
3401 bp->xmt_total_bytes += p_xmt_drv_descr->p_skb->len;
3402
3403 /* Return skb to operating system */
3404 comp = bp->rcv_xmt_reg.index.xmt_comp;
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003405 dma_unmap_single(bp->bus_dev,
Linus Torvalds1da177e2005-04-16 15:20:36 -07003406 bp->descr_block_virt->xmt_data[comp].long_1,
3407 p_xmt_drv_descr->p_skb->len,
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003408 DMA_TO_DEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003409 dev_kfree_skb_irq(p_xmt_drv_descr->p_skb);
3410
3411 /*
3412 * Move to start of next packet by updating completion index
3413 *
3414 * Here we assume that a transmit packet request is always
3415 * serviced by posting one fragment. We can therefore
3416 * simplify the completion code by incrementing the
3417 * completion index by one. This code will need to be
3418 * modified if this assumption changes. See comments
3419 * in dfx_xmt_queue_pkt for more details.
3420 */
3421
3422 bp->rcv_xmt_reg.index.xmt_comp += 1;
3423 freed++;
3424 }
3425 return freed;
3426 }
3427
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003428
Linus Torvalds1da177e2005-04-16 15:20:36 -07003429/*
3430 * =================
3431 * = dfx_rcv_flush =
3432 * =================
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003433 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07003434 * Overview:
3435 * Remove all skb's in the receive ring.
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003436 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07003437 * Returns:
3438 * None
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003439 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07003440 * Arguments:
3441 * bp - pointer to board information
3442 *
3443 * Functional Description:
3444 * Free's all the dynamically allocated skb's that are
3445 * currently attached to the device receive ring. This
3446 * function is typically only used when the device is
3447 * initialized or reinitialized.
3448 *
3449 * Return Codes:
3450 * None
3451 *
3452 * Side Effects:
3453 * None
3454 */
3455#ifdef DYNAMIC_BUFFERS
3456static void dfx_rcv_flush( DFX_board_t *bp )
3457 {
3458 int i, j;
3459
3460 for (i = 0; i < (int)(bp->rcv_bufs_to_post); i++)
3461 for (j = 0; (i + j) < (int)PI_RCV_DATA_K_NUM_ENTRIES; j += bp->rcv_bufs_to_post)
3462 {
3463 struct sk_buff *skb;
3464 skb = (struct sk_buff *)bp->p_rcv_buff_va[i+j];
3465 if (skb)
3466 dev_kfree_skb(skb);
3467 bp->p_rcv_buff_va[i+j] = NULL;
3468 }
3469
3470 }
3471#else
3472static inline void dfx_rcv_flush( DFX_board_t *bp )
3473{
3474}
3475#endif /* DYNAMIC_BUFFERS */
3476
3477/*
3478 * =================
3479 * = dfx_xmt_flush =
3480 * =================
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003481 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07003482 * Overview:
3483 * Processes all frames whether they've been transmitted
3484 * or not.
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003485 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07003486 * Returns:
3487 * None
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003488 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07003489 * Arguments:
3490 * bp - pointer to board information
3491 *
3492 * Functional Description:
3493 * For all produced transmit descriptors that have not
3494 * yet been completed, we'll free the skb we were holding
3495 * onto using dev_kfree_skb and bump the appropriate
3496 * counters. Of course, it's possible that some of
3497 * these transmit requests actually did go out, but we
3498 * won't make that distinction here. Finally, we'll
3499 * update the consumer index to match the producer.
3500 *
3501 * Return Codes:
3502 * None
3503 *
3504 * Assumptions:
3505 * This routine does NOT update the Type 2 register. It
3506 * is assumed that this routine is being called during a
3507 * transmit flush interrupt, or a shutdown or close routine.
3508 *
3509 * Side Effects:
3510 * None
3511 */
3512
3513static void dfx_xmt_flush( DFX_board_t *bp )
3514 {
3515 u32 prod_cons; /* rcv/xmt consumer block longword */
3516 XMT_DRIVER_DESCR *p_xmt_drv_descr; /* ptr to transmit driver descriptor */
3517 u8 comp; /* local transmit completion index */
3518
3519 /* Flush all outstanding transmit frames */
3520
3521 while (bp->rcv_xmt_reg.index.xmt_comp != bp->rcv_xmt_reg.index.xmt_prod)
3522 {
3523 /* Get pointer to the transmit driver descriptor block information */
3524
3525 p_xmt_drv_descr = &(bp->xmt_drv_descr_blk[bp->rcv_xmt_reg.index.xmt_comp]);
3526
3527 /* Return skb to operating system */
3528 comp = bp->rcv_xmt_reg.index.xmt_comp;
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003529 dma_unmap_single(bp->bus_dev,
Linus Torvalds1da177e2005-04-16 15:20:36 -07003530 bp->descr_block_virt->xmt_data[comp].long_1,
3531 p_xmt_drv_descr->p_skb->len,
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003532 DMA_TO_DEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003533 dev_kfree_skb(p_xmt_drv_descr->p_skb);
3534
3535 /* Increment transmit error counter */
3536
3537 bp->xmt_discards++;
3538
3539 /*
3540 * Move to start of next packet by updating completion index
3541 *
3542 * Here we assume that a transmit packet request is always
3543 * serviced by posting one fragment. We can therefore
3544 * simplify the completion code by incrementing the
3545 * completion index by one. This code will need to be
3546 * modified if this assumption changes. See comments
3547 * in dfx_xmt_queue_pkt for more details.
3548 */
3549
3550 bp->rcv_xmt_reg.index.xmt_comp += 1;
3551 }
3552
3553 /* Update the transmit consumer index in the consumer block */
3554
3555 prod_cons = (u32)(bp->cons_block_virt->xmt_rcv_data & ~PI_CONS_M_XMT_INDEX);
3556 prod_cons |= (u32)(bp->rcv_xmt_reg.index.xmt_prod << PI_CONS_V_XMT_INDEX);
3557 bp->cons_block_virt->xmt_rcv_data = prod_cons;
3558 }
3559
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003560/*
3561 * ==================
3562 * = dfx_unregister =
3563 * ==================
3564 *
3565 * Overview:
3566 * Shuts down an FDDI controller
3567 *
3568 * Returns:
3569 * Condition code
3570 *
3571 * Arguments:
3572 * bdev - pointer to device information
3573 *
3574 * Functional Description:
3575 *
3576 * Return Codes:
3577 * None
3578 *
3579 * Assumptions:
3580 * It compiles so it should work :-( (PCI cards do :-)
3581 *
3582 * Side Effects:
3583 * Device structures for FDDI adapters (fddi0, fddi1, etc) are
3584 * freed.
3585 */
3586static void __devexit dfx_unregister(struct device *bdev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003587{
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003588 struct net_device *dev = dev_get_drvdata(bdev);
3589 DFX_board_t *bp = netdev_priv(dev);
3590 int dfx_bus_pci = DFX_BUS_PCI(bdev);
3591 int dfx_bus_tc = DFX_BUS_TC(bdev);
3592 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
3593 resource_size_t bar_start = 0; /* pointer to port */
3594 resource_size_t bar_len = 0; /* resource length */
Linus Torvalds1da177e2005-04-16 15:20:36 -07003595 int alloc_size; /* total buffer size used */
3596
3597 unregister_netdev(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003598
3599 alloc_size = sizeof(PI_DESCR_BLOCK) +
3600 PI_CMD_REQ_K_SIZE_MAX + PI_CMD_RSP_K_SIZE_MAX +
3601#ifndef DYNAMIC_BUFFERS
3602 (bp->rcv_bufs_to_post * PI_RCV_DATA_K_SIZE_MAX) +
3603#endif
3604 sizeof(PI_CONSUMER_BLOCK) +
3605 (PI_ALIGN_K_DESC_BLK - 1);
3606 if (bp->kmalloced)
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003607 dma_free_coherent(bdev, alloc_size,
3608 bp->kmalloced, bp->kmalloced_dma);
3609
3610 dfx_bus_uninit(dev);
3611
3612 dfx_get_bars(bdev, &bar_start, &bar_len);
3613 if (dfx_use_mmio) {
3614 iounmap(bp->base.mem);
3615 release_mem_region(bar_start, bar_len);
3616 } else
3617 release_region(bar_start, bar_len);
3618
3619 if (dfx_bus_pci)
3620 pci_disable_device(to_pci_dev(bdev));
3621
Linus Torvalds1da177e2005-04-16 15:20:36 -07003622 free_netdev(dev);
3623}
3624
Linus Torvalds1da177e2005-04-16 15:20:36 -07003625
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003626static int __devinit __unused dfx_dev_register(struct device *);
3627static int __devexit __unused dfx_dev_unregister(struct device *);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003628
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003629#ifdef CONFIG_PCI
3630static int __devinit dfx_pci_register(struct pci_dev *,
3631 const struct pci_device_id *);
3632static void __devexit dfx_pci_unregister(struct pci_dev *);
3633
3634static struct pci_device_id dfx_pci_table[] = {
3635 { PCI_DEVICE(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_FDDI) },
3636 { }
Linus Torvalds1da177e2005-04-16 15:20:36 -07003637};
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003638MODULE_DEVICE_TABLE(pci, dfx_pci_table);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003639
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003640static struct pci_driver dfx_pci_driver = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07003641 .name = "defxx",
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003642 .id_table = dfx_pci_table,
3643 .probe = dfx_pci_register,
3644 .remove = __devexit_p(dfx_pci_unregister),
Linus Torvalds1da177e2005-04-16 15:20:36 -07003645};
3646
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003647static __devinit int dfx_pci_register(struct pci_dev *pdev,
3648 const struct pci_device_id *ent)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003649{
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003650 return dfx_register(&pdev->dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003651}
3652
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003653static void __devexit dfx_pci_unregister(struct pci_dev *pdev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003654{
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003655 dfx_unregister(&pdev->dev);
3656}
3657#endif /* CONFIG_PCI */
Linus Torvalds1da177e2005-04-16 15:20:36 -07003658
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003659#ifdef CONFIG_EISA
3660static struct eisa_device_id dfx_eisa_table[] = {
3661 { "DEC3001", DEFEA_PROD_ID_1 },
3662 { "DEC3002", DEFEA_PROD_ID_2 },
3663 { "DEC3003", DEFEA_PROD_ID_3 },
3664 { "DEC3004", DEFEA_PROD_ID_4 },
3665 { }
3666};
3667MODULE_DEVICE_TABLE(eisa, dfx_eisa_table);
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003668
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003669static struct eisa_driver dfx_eisa_driver = {
3670 .id_table = dfx_eisa_table,
3671 .driver = {
3672 .name = "defxx",
3673 .bus = &eisa_bus_type,
3674 .probe = dfx_dev_register,
3675 .remove = __devexit_p(dfx_dev_unregister),
3676 },
3677};
3678#endif /* CONFIG_EISA */
Linus Torvalds1da177e2005-04-16 15:20:36 -07003679
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003680#ifdef CONFIG_TC
3681static struct tc_device_id const dfx_tc_table[] = {
3682 { "DEC ", "PMAF-FA " },
3683 { "DEC ", "PMAF-FD " },
3684 { "DEC ", "PMAF-FS " },
3685 { "DEC ", "PMAF-FU " },
3686 { }
3687};
3688MODULE_DEVICE_TABLE(tc, dfx_tc_table);
3689
3690static struct tc_driver dfx_tc_driver = {
3691 .id_table = dfx_tc_table,
3692 .driver = {
3693 .name = "defxx",
3694 .bus = &tc_bus_type,
3695 .probe = dfx_dev_register,
3696 .remove = __devexit_p(dfx_dev_unregister),
3697 },
3698};
3699#endif /* CONFIG_TC */
3700
3701static int __devinit __unused dfx_dev_register(struct device *dev)
3702{
3703 int status;
3704
3705 status = dfx_register(dev);
3706 if (!status)
3707 get_device(dev);
3708 return status;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003709}
3710
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003711static int __devexit __unused dfx_dev_unregister(struct device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003712{
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003713 put_device(dev);
3714 dfx_unregister(dev);
3715 return 0;
3716}
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003717
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003718
3719static int __devinit dfx_init(void)
3720{
3721 int status;
3722
3723 status = pci_register_driver(&dfx_pci_driver);
3724 if (!status)
3725 status = eisa_driver_register(&dfx_eisa_driver);
3726 if (!status)
3727 status = tc_register_driver(&dfx_tc_driver);
3728 return status;
3729}
3730
3731static void __devexit dfx_cleanup(void)
3732{
3733 tc_unregister_driver(&dfx_tc_driver);
3734 eisa_driver_unregister(&dfx_eisa_driver);
3735 pci_unregister_driver(&dfx_pci_driver);
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003736}
Linus Torvalds1da177e2005-04-16 15:20:36 -07003737
3738module_init(dfx_init);
3739module_exit(dfx_cleanup);
3740MODULE_AUTHOR("Lawrence V. Stefani");
Maciej W. Rozyckie89a2cf2007-02-05 16:28:27 -08003741MODULE_DESCRIPTION("DEC FDDIcontroller TC/EISA/PCI (DEFTA/DEFEA/DEFPA) driver "
Linus Torvalds1da177e2005-04-16 15:20:36 -07003742 DRV_VERSION " " DRV_RELDATE);
3743MODULE_LICENSE("GPL");
3744
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003745
Linus Torvalds1da177e2005-04-16 15:20:36 -07003746/*
3747 * Local variables:
3748 * kernel-compile-command: "gcc -D__KERNEL__ -I/root/linux/include -Wall -Wstrict-prototypes -O2 -pipe -fomit-frame-pointer -fno-strength-reduce -m486 -malign-loops=2 -malign-jumps=2 -malign-functions=2 -c defxx.c"
3749 * End:
3750 */