blob: 8d9c36970dfd2964d5a033a5a263fb7f5ea063ed [file] [log] [blame]
Carlo Caione6b112e22014-09-09 22:12:56 +02001/*
2 * Copyright 2014 Carlo Caione <carlo@caione.org>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This library is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This library is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public
20 * License along with this library; if not, write to the Free
21 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
22 * MA 02110-1301 USA
23 *
24 * Or, alternatively,
25 *
26 * b) Permission is hereby granted, free of charge, to any person
27 * obtaining a copy of this software and associated documentation
28 * files (the "Software"), to deal in the Software without
29 * restriction, including without limitation the rights to use,
30 * copy, modify, merge, publish, distribute, sublicense, and/or
31 * sell copies of the Software, and to permit persons to whom the
32 * Software is furnished to do so, subject to the following
33 * conditions:
34 *
35 * The above copyright notice and this permission notice shall be
36 * included in all copies or substantial portions of the Software.
37 *
38 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
39 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
40 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
41 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
42 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
43 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
44 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
45 * OTHER DEALINGS IN THE SOFTWARE.
46 */
47
48/include/ "skeleton.dtsi"
49
50/ {
51 interrupt-parent = <&gic>;
52
Beniamino Galvani550ab392014-11-18 15:30:35 +010053 L2: l2-cache-controller@c4200000 {
54 compatible = "arm,pl310-cache";
55 reg = <0xc4200000 0x1000>;
56 cache-unified;
57 cache-level = <2>;
58 };
59
Carlo Caione6b112e22014-09-09 22:12:56 +020060 gic: interrupt-controller@c4301000 {
61 compatible = "arm,cortex-a9-gic";
62 reg = <0xc4301000 0x1000>,
63 <0xc4300100 0x0100>;
64 interrupt-controller;
65 #interrupt-cells = <3>;
66 };
67
Carlo Caione6b112e22014-09-09 22:12:56 +020068 soc {
69 compatible = "simple-bus";
70 #address-cells = <1>;
71 #size-cells = <1>;
72 ranges;
73
Martin Blumenstingl200a5752017-04-17 23:39:37 +020074 cbus: cbus@c1100000 {
75 compatible = "simple-bus";
76 reg = <0xc1100000 0x200000>;
Beniamino Galvani8fba96f2014-11-13 20:32:03 +010077 #address-cells = <1>;
Martin Blumenstingl200a5752017-04-17 23:39:37 +020078 #size-cells = <1>;
79 ranges = <0x0 0xc1100000 0x200000>;
80
81 uart_A: serial@84c0 {
82 compatible = "amlogic,meson-uart";
83 reg = <0x84c0 0x18>;
84 interrupts = <0 26 1>;
85 status = "disabled";
86 };
87
88 uart_B: serial@84dc {
89 compatible = "amlogic,meson-uart";
90 reg = <0x84dc 0x18>;
91 interrupts = <0 75 1>;
92 status = "disabled";
93 };
94
95 i2c_A: i2c@8500 {
96 compatible = "amlogic,meson6-i2c";
97 reg = <0x8500 0x20>;
98 interrupts = <0 21 1>;
99 #address-cells = <1>;
100 #size-cells = <0>;
101 status = "disabled";
102 };
103
104 uart_C: serial@8700 {
105 compatible = "amlogic,meson-uart";
106 reg = <0x8700 0x18>;
107 interrupts = <0 93 1>;
108 status = "disabled";
109 };
110
111 i2c_B: i2c@87c0 {
112 compatible = "amlogic,meson6-i2c";
113 reg = <0x87c0 0x20>;
114 interrupts = <0 128 1>;
115 #address-cells = <1>;
116 #size-cells = <0>;
117 status = "disabled";
118 };
119
120 spifc: spi@8c80 {
121 compatible = "amlogic,meson6-spifc";
122 reg = <0x8c80 0x80>;
123 #address-cells = <1>;
124 #size-cells = <0>;
125 status = "disabled";
126 };
127
128 wdt: watchdog@9900 {
129 compatible = "amlogic,meson6-wdt";
130 reg = <0x9900 0x8>;
131 interrupts = <0 0 1>;
132 };
133
134 timer@9940 {
135 compatible = "amlogic,meson6-timer";
136 reg = <0x9940 0x18>;
137 interrupts = <0 10 1>;
138 };
Beniamino Galvani8fba96f2014-11-13 20:32:03 +0100139 };
140
Martin Blumenstingl200a5752017-04-17 23:39:37 +0200141 aobus: aobus@c8100000 {
142 compatible = "simple-bus";
143 reg = <0xc8100000 0x100000>;
Beniamino Galvani8fba96f2014-11-13 20:32:03 +0100144 #address-cells = <1>;
Martin Blumenstingl200a5752017-04-17 23:39:37 +0200145 #size-cells = <1>;
146 ranges = <0x0 0xc8100000 0x100000>;
Beniamino Galvani8fba96f2014-11-13 20:32:03 +0100147
Martin Blumenstingl200a5752017-04-17 23:39:37 +0200148 ir_receiver: ir-receiver@480 {
149 compatible= "amlogic,meson6-ir";
150 reg = <0x480 0x20>;
151 interrupts = <0 15 1>;
152 status = "disabled";
153 };
Linus Torvalds2183a582014-12-11 11:49:23 -0800154
Martin Blumenstingl200a5752017-04-17 23:39:37 +0200155 uart_AO: serial@4c0 {
156 compatible = "amlogic,meson-uart";
157 reg = <0x4c0 0x18>;
158 interrupts = <0 90 1>;
159 status = "disabled";
160 };
Beniamino Galvani03bb9512015-03-01 20:39:51 +0100161
Martin Blumenstingl200a5752017-04-17 23:39:37 +0200162 i2c_AO: i2c@500 {
163 compatible = "amlogic,meson6-i2c";
164 reg = <0x500 0x20>;
165 interrupts = <0 92 1>;
166 #address-cells = <1>;
167 #size-cells = <0>;
168 status = "disabled";
169 };
Beniamino Galvani03bb9512015-03-01 20:39:51 +0100170 };
Beniamino Galvani2345d502015-03-01 20:45:37 +0100171
172 ethmac: ethernet@c9410000 {
173 compatible = "amlogic,meson6-dwmac", "snps,dwmac";
174 reg = <0xc9410000 0x10000
175 0xc1108108 0x4>;
176 interrupts = <0 8 1>;
177 interrupt-names = "macirq";
Beniamino Galvani2345d502015-03-01 20:45:37 +0100178 status = "disabled";
179 };
Carlo Caione6b112e22014-09-09 22:12:56 +0200180 };
181}; /* end of / */