Paul Walmsley | 6e01478 | 2010-12-21 20:01:20 -0700 | [diff] [blame] | 1 | /* |
| 2 | * OMAP2/3 common powerdomain definitions |
| 3 | * |
| 4 | * Copyright (C) 2007-2008 Texas Instruments, Inc. |
Paul Walmsley | cad7a34 | 2011-03-07 19:28:15 -0700 | [diff] [blame] | 5 | * Copyright (C) 2007-2011 Nokia Corporation |
Paul Walmsley | 6e01478 | 2010-12-21 20:01:20 -0700 | [diff] [blame] | 6 | * |
| 7 | * Paul Walmsley, Jouni Högander |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License version 2 as |
| 11 | * published by the Free Software Foundation. |
| 12 | */ |
| 13 | |
| 14 | /* |
| 15 | * To Do List |
| 16 | * -> Move the Sleep/Wakeup dependencies from Power Domain framework to |
| 17 | * Clock Domain Framework |
| 18 | */ |
| 19 | |
| 20 | /* |
| 21 | * This file contains all of the powerdomains that have some element |
| 22 | * of software control for the OMAP24xx and OMAP34xx chips. |
| 23 | * |
| 24 | * This is not an exhaustive listing of powerdomains on the chips; only |
| 25 | * powerdomains that can be controlled in software. |
| 26 | */ |
| 27 | |
| 28 | /* |
| 29 | * The names for the DSP/IVA2 powerdomains are confusing. |
| 30 | * |
| 31 | * Most OMAP chips have an on-board DSP. |
| 32 | * |
| 33 | * On the 2420, this is a 'C55 DSP called, simply, the DSP. Its |
| 34 | * powerdomain is called the "DSP power domain." On the 2430, the |
| 35 | * on-board DSP is a 'C64 DSP, now called (along with its hardware |
| 36 | * accelerators) the IVA2 or IVA2.1. Its powerdomain is still called |
| 37 | * the "DSP power domain." On the 3430, the DSP is a 'C64 DSP like the |
| 38 | * 2430, also known as the IVA2; but its powerdomain is now called the |
| 39 | * "IVA2 power domain." |
| 40 | * |
| 41 | * The 2420 also has something called the IVA, which is a separate ARM |
| 42 | * core, and has nothing to do with the DSP/IVA2. |
| 43 | * |
| 44 | * Ideally the DSP/IVA2 could just be the same powerdomain, but the PRCM |
| 45 | * address offset is different between the C55 and C64 DSPs. |
| 46 | */ |
| 47 | |
Paul Walmsley | 72e06d0 | 2010-12-21 21:05:16 -0700 | [diff] [blame] | 48 | #include "powerdomain.h" |
Paul Walmsley | 6e01478 | 2010-12-21 20:01:20 -0700 | [diff] [blame] | 49 | |
| 50 | #include "prcm-common.h" |
| 51 | #include "prm.h" |
| 52 | |
Paul Walmsley | 6e01478 | 2010-12-21 20:01:20 -0700 | [diff] [blame] | 53 | /* OMAP2/3-common powerdomains */ |
| 54 | |
| 55 | /* |
| 56 | * The GFX powerdomain is not present on 3430ES2, but currently we do not |
| 57 | * have a macro to filter it out at compile-time. |
| 58 | */ |
| 59 | struct powerdomain gfx_omap2_pwrdm = { |
| 60 | .name = "gfx_pwrdm", |
| 61 | .prcm_offs = GFX_MOD, |
| 62 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | |
| 63 | CHIP_IS_OMAP3430ES1), |
| 64 | .pwrsts = PWRSTS_OFF_RET_ON, |
Paul Walmsley | 4cb49fe | 2011-03-07 19:28:15 -0700 | [diff] [blame] | 65 | .pwrsts_logic_ret = PWRSTS_RET, |
Paul Walmsley | 6e01478 | 2010-12-21 20:01:20 -0700 | [diff] [blame] | 66 | .banks = 1, |
| 67 | .pwrsts_mem_ret = { |
Paul Walmsley | 4cb49fe | 2011-03-07 19:28:15 -0700 | [diff] [blame] | 68 | [0] = PWRSTS_RET, /* MEMRETSTATE */ |
Paul Walmsley | 6e01478 | 2010-12-21 20:01:20 -0700 | [diff] [blame] | 69 | }, |
| 70 | .pwrsts_mem_on = { |
Paul Walmsley | 4cb49fe | 2011-03-07 19:28:15 -0700 | [diff] [blame] | 71 | [0] = PWRSTS_ON, /* MEMONSTATE */ |
Paul Walmsley | 6e01478 | 2010-12-21 20:01:20 -0700 | [diff] [blame] | 72 | }, |
| 73 | }; |
| 74 | |
| 75 | struct powerdomain wkup_omap2_pwrdm = { |
| 76 | .name = "wkup_pwrdm", |
| 77 | .prcm_offs = WKUP_MOD, |
| 78 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430), |
Paul Walmsley | cad7a34 | 2011-03-07 19:28:15 -0700 | [diff] [blame] | 79 | .pwrsts = PWRSTS_ON, |
Paul Walmsley | 6e01478 | 2010-12-21 20:01:20 -0700 | [diff] [blame] | 80 | }; |