Casey Leedom | be839e3 | 2010-06-25 12:14:15 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the Chelsio T4 PCI-E SR-IOV Virtual Function Ethernet |
| 3 | * driver for Linux. |
| 4 | * |
| 5 | * Copyright (c) 2009-2010 Chelsio Communications, Inc. All rights reserved. |
| 6 | * |
| 7 | * This software is available to you under a choice of one of two |
| 8 | * licenses. You may choose to be licensed under the terms of the GNU |
| 9 | * General Public License (GPL) Version 2, available from the file |
| 10 | * COPYING in the main directory of this source tree, or the |
| 11 | * OpenIB.org BSD license below: |
| 12 | * |
| 13 | * Redistribution and use in source and binary forms, with or |
| 14 | * without modification, are permitted provided that the following |
| 15 | * conditions are met: |
| 16 | * |
| 17 | * - Redistributions of source code must retain the above |
| 18 | * copyright notice, this list of conditions and the following |
| 19 | * disclaimer. |
| 20 | * |
| 21 | * - Redistributions in binary form must reproduce the above |
| 22 | * copyright notice, this list of conditions and the following |
| 23 | * disclaimer in the documentation and/or other materials |
| 24 | * provided with the distribution. |
| 25 | * |
| 26 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 27 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 28 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| 29 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS |
| 30 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN |
| 31 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
| 32 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 33 | * SOFTWARE. |
| 34 | */ |
| 35 | |
| 36 | /* |
| 37 | * This file should not be included directly. Include t4vf_common.h instead. |
| 38 | */ |
| 39 | |
| 40 | #ifndef __CXGB4VF_ADAPTER_H__ |
| 41 | #define __CXGB4VF_ADAPTER_H__ |
| 42 | |
Alexey Dobriyan | a6b7a40 | 2011-06-06 10:43:46 +0000 | [diff] [blame] | 43 | #include <linux/interrupt.h> |
Casey Leedom | be839e3 | 2010-06-25 12:14:15 +0000 | [diff] [blame] | 44 | #include <linux/pci.h> |
| 45 | #include <linux/spinlock.h> |
| 46 | #include <linux/skbuff.h> |
| 47 | #include <linux/if_ether.h> |
| 48 | #include <linux/netdevice.h> |
| 49 | |
| 50 | #include "../cxgb4/t4_hw.h" |
| 51 | |
| 52 | /* |
| 53 | * Constants of the implementation. |
| 54 | */ |
| 55 | enum { |
| 56 | MAX_NPORTS = 1, /* max # of "ports" */ |
| 57 | MAX_PORT_QSETS = 8, /* max # of Queue Sets / "port" */ |
| 58 | MAX_ETH_QSETS = MAX_NPORTS*MAX_PORT_QSETS, |
| 59 | |
| 60 | /* |
| 61 | * MSI-X interrupt index usage. |
| 62 | */ |
| 63 | MSIX_FW = 0, /* MSI-X index for firmware Q */ |
Casey Leedom | caedda3 | 2010-11-11 09:30:40 +0000 | [diff] [blame] | 64 | MSIX_IQFLINT = 1, /* MSI-X index base for Ingress Qs */ |
Casey Leedom | be839e3 | 2010-06-25 12:14:15 +0000 | [diff] [blame] | 65 | MSIX_EXTRAS = 1, |
| 66 | MSIX_ENTRIES = MAX_ETH_QSETS + MSIX_EXTRAS, |
| 67 | |
| 68 | /* |
| 69 | * The maximum number of Ingress and Egress Queues is determined by |
| 70 | * the maximum number of "Queue Sets" which we support plus any |
| 71 | * ancillary queues. Each "Queue Set" requires one Ingress Queue |
| 72 | * for RX Packet Ingress Event notifications and two Egress Queues for |
| 73 | * a Free List and an Ethernet TX list. |
| 74 | */ |
| 75 | INGQ_EXTRAS = 2, /* firmware event queue and */ |
| 76 | /* forwarded interrupts */ |
| 77 | MAX_INGQ = MAX_ETH_QSETS+INGQ_EXTRAS, |
| 78 | MAX_EGRQ = MAX_ETH_QSETS*2, |
| 79 | }; |
| 80 | |
| 81 | /* |
| 82 | * Forward structure definition references. |
| 83 | */ |
| 84 | struct adapter; |
| 85 | struct sge_eth_rxq; |
| 86 | struct sge_rspq; |
| 87 | |
| 88 | /* |
| 89 | * Per-"port" information. This is really per-Virtual Interface information |
| 90 | * but the use of the "port" nomanclature makes it easier to go back and forth |
| 91 | * between the PF and VF drivers ... |
| 92 | */ |
| 93 | struct port_info { |
| 94 | struct adapter *adapter; /* our adapter */ |
Casey Leedom | be839e3 | 2010-06-25 12:14:15 +0000 | [diff] [blame] | 95 | u16 viid; /* virtual interface ID */ |
| 96 | s16 xact_addr_filt; /* index of our MAC address filter */ |
| 97 | u16 rss_size; /* size of VI's RSS table slice */ |
| 98 | u8 pidx; /* index into adapter port[] */ |
| 99 | u8 port_id; /* physical port ID */ |
Casey Leedom | be839e3 | 2010-06-25 12:14:15 +0000 | [diff] [blame] | 100 | u8 nqsets; /* # of "Queue Sets" */ |
| 101 | u8 first_qset; /* index of first "Queue Set" */ |
| 102 | struct link_config link_cfg; /* physical port configuration */ |
| 103 | }; |
| 104 | |
Casey Leedom | be839e3 | 2010-06-25 12:14:15 +0000 | [diff] [blame] | 105 | /* |
| 106 | * Scatter Gather Engine resources for the "adapter". Our ingress and egress |
| 107 | * queues are organized into "Queue Sets" with one ingress and one egress |
| 108 | * queue per Queue Set. These Queue Sets are aportionable between the "ports" |
| 109 | * (Virtual Interfaces). One extra ingress queue is used to receive |
| 110 | * asynchronous messages from the firmware. Note that the "Queue IDs" that we |
| 111 | * use here are really "Relative Queue IDs" which are returned as part of the |
| 112 | * firmware command to allocate queues. These queue IDs are relative to the |
| 113 | * absolute Queue ID base of the section of the Queue ID space allocated to |
| 114 | * the PF/VF. |
| 115 | */ |
| 116 | |
| 117 | /* |
| 118 | * SGE free-list queue state. |
| 119 | */ |
| 120 | struct rx_sw_desc; |
| 121 | struct sge_fl { |
| 122 | unsigned int avail; /* # of available RX buffers */ |
| 123 | unsigned int pend_cred; /* new buffers since last FL DB ring */ |
| 124 | unsigned int cidx; /* consumer index */ |
| 125 | unsigned int pidx; /* producer index */ |
| 126 | unsigned long alloc_failed; /* # of buffer allocation failures */ |
| 127 | unsigned long large_alloc_failed; |
| 128 | unsigned long starving; /* # of times FL was found starving */ |
| 129 | |
| 130 | /* |
| 131 | * Write-once/infrequently fields. |
| 132 | * ------------------------------- |
| 133 | */ |
| 134 | |
| 135 | unsigned int cntxt_id; /* SGE relative QID for the free list */ |
| 136 | unsigned int abs_id; /* SGE absolute QID for the free list */ |
| 137 | unsigned int size; /* capacity of free list */ |
| 138 | struct rx_sw_desc *sdesc; /* address of SW RX descriptor ring */ |
| 139 | __be64 *desc; /* address of HW RX descriptor ring */ |
| 140 | dma_addr_t addr; /* PCI bus address of hardware ring */ |
| 141 | }; |
| 142 | |
| 143 | /* |
| 144 | * An ingress packet gather list. |
| 145 | */ |
| 146 | struct pkt_gl { |
Ian Campbell | a0006a8 | 2011-10-19 23:01:47 +0000 | [diff] [blame] | 147 | struct page_frag frags[MAX_SKB_FRAGS]; |
Casey Leedom | be839e3 | 2010-06-25 12:14:15 +0000 | [diff] [blame] | 148 | void *va; /* virtual address of first byte */ |
| 149 | unsigned int nfrags; /* # of fragments */ |
| 150 | unsigned int tot_len; /* total length of fragments */ |
| 151 | }; |
| 152 | |
| 153 | typedef int (*rspq_handler_t)(struct sge_rspq *, const __be64 *, |
| 154 | const struct pkt_gl *); |
| 155 | |
| 156 | /* |
| 157 | * State for an SGE Response Queue. |
| 158 | */ |
| 159 | struct sge_rspq { |
| 160 | struct napi_struct napi; /* NAPI scheduling control */ |
| 161 | const __be64 *cur_desc; /* current descriptor in queue */ |
| 162 | unsigned int cidx; /* consumer index */ |
| 163 | u8 gen; /* current generation bit */ |
| 164 | u8 next_intr_params; /* holdoff params for next interrupt */ |
| 165 | int offset; /* offset into current FL buffer */ |
| 166 | |
| 167 | unsigned int unhandled_irqs; /* bogus interrupts */ |
| 168 | |
| 169 | /* |
| 170 | * Write-once/infrequently fields. |
| 171 | * ------------------------------- |
| 172 | */ |
| 173 | |
| 174 | u8 intr_params; /* interrupt holdoff parameters */ |
| 175 | u8 pktcnt_idx; /* interrupt packet threshold */ |
| 176 | u8 idx; /* queue index within its group */ |
| 177 | u16 cntxt_id; /* SGE rel QID for the response Q */ |
| 178 | u16 abs_id; /* SGE abs QID for the response Q */ |
| 179 | __be64 *desc; /* address of hardware response ring */ |
| 180 | dma_addr_t phys_addr; /* PCI bus address of ring */ |
| 181 | unsigned int iqe_len; /* entry size */ |
| 182 | unsigned int size; /* capcity of response Q */ |
| 183 | struct adapter *adapter; /* our adapter */ |
| 184 | struct net_device *netdev; /* associated net device */ |
| 185 | rspq_handler_t handler; /* the handler for this response Q */ |
| 186 | }; |
| 187 | |
| 188 | /* |
| 189 | * Ethernet queue statistics |
| 190 | */ |
| 191 | struct sge_eth_stats { |
| 192 | unsigned long pkts; /* # of ethernet packets */ |
| 193 | unsigned long lro_pkts; /* # of LRO super packets */ |
| 194 | unsigned long lro_merged; /* # of wire packets merged by LRO */ |
| 195 | unsigned long rx_cso; /* # of Rx checksum offloads */ |
| 196 | unsigned long vlan_ex; /* # of Rx VLAN extractions */ |
| 197 | unsigned long rx_drops; /* # of packets dropped due to no mem */ |
| 198 | }; |
| 199 | |
| 200 | /* |
| 201 | * State for an Ethernet Receive Queue. |
| 202 | */ |
| 203 | struct sge_eth_rxq { |
| 204 | struct sge_rspq rspq; /* Response Queue */ |
| 205 | struct sge_fl fl; /* Free List */ |
| 206 | struct sge_eth_stats stats; /* receive statistics */ |
| 207 | }; |
| 208 | |
| 209 | /* |
| 210 | * SGE Transmit Queue state. This contains all of the resources associated |
| 211 | * with the hardware status of a TX Queue which is a circular ring of hardware |
| 212 | * TX Descriptors. For convenience, it also contains a pointer to a parallel |
| 213 | * "Software Descriptor" array but we don't know anything about it here other |
| 214 | * than its type name. |
| 215 | */ |
| 216 | struct tx_desc { |
| 217 | /* |
| 218 | * Egress Queues are measured in units of SGE_EQ_IDXSIZE by the |
| 219 | * hardware: Sizes, Producer and Consumer indices, etc. |
| 220 | */ |
| 221 | __be64 flit[SGE_EQ_IDXSIZE/sizeof(__be64)]; |
| 222 | }; |
| 223 | struct tx_sw_desc; |
| 224 | struct sge_txq { |
| 225 | unsigned int in_use; /* # of in-use TX descriptors */ |
| 226 | unsigned int size; /* # of descriptors */ |
| 227 | unsigned int cidx; /* SW consumer index */ |
| 228 | unsigned int pidx; /* producer index */ |
| 229 | unsigned long stops; /* # of times queue has been stopped */ |
| 230 | unsigned long restarts; /* # of queue restarts */ |
| 231 | |
| 232 | /* |
| 233 | * Write-once/infrequently fields. |
| 234 | * ------------------------------- |
| 235 | */ |
| 236 | |
| 237 | unsigned int cntxt_id; /* SGE relative QID for the TX Q */ |
| 238 | unsigned int abs_id; /* SGE absolute QID for the TX Q */ |
| 239 | struct tx_desc *desc; /* address of HW TX descriptor ring */ |
| 240 | struct tx_sw_desc *sdesc; /* address of SW TX descriptor ring */ |
| 241 | struct sge_qstat *stat; /* queue status entry */ |
| 242 | dma_addr_t phys_addr; /* PCI bus address of hardware ring */ |
| 243 | }; |
| 244 | |
| 245 | /* |
| 246 | * State for an Ethernet Transmit Queue. |
| 247 | */ |
| 248 | struct sge_eth_txq { |
| 249 | struct sge_txq q; /* SGE TX Queue */ |
| 250 | struct netdev_queue *txq; /* associated netdev TX queue */ |
| 251 | unsigned long tso; /* # of TSO requests */ |
| 252 | unsigned long tx_cso; /* # of TX checksum offloads */ |
| 253 | unsigned long vlan_ins; /* # of TX VLAN insertions */ |
| 254 | unsigned long mapping_err; /* # of I/O MMU packet mapping errors */ |
| 255 | }; |
| 256 | |
| 257 | /* |
| 258 | * The complete set of Scatter/Gather Engine resources. |
| 259 | */ |
| 260 | struct sge { |
| 261 | /* |
| 262 | * Our "Queue Sets" ... |
| 263 | */ |
| 264 | struct sge_eth_txq ethtxq[MAX_ETH_QSETS]; |
| 265 | struct sge_eth_rxq ethrxq[MAX_ETH_QSETS]; |
| 266 | |
| 267 | /* |
| 268 | * Extra ingress queues for asynchronous firmware events and |
| 269 | * forwarded interrupts (when in MSI mode). |
| 270 | */ |
| 271 | struct sge_rspq fw_evtq ____cacheline_aligned_in_smp; |
| 272 | |
| 273 | struct sge_rspq intrq ____cacheline_aligned_in_smp; |
| 274 | spinlock_t intrq_lock; |
| 275 | |
| 276 | /* |
| 277 | * State for managing "starving Free Lists" -- Free Lists which have |
| 278 | * fallen below a certain threshold of buffers available to the |
| 279 | * hardware and attempts to refill them up to that threshold have |
| 280 | * failed. We have a regular "slow tick" timer process which will |
| 281 | * make periodic attempts to refill these starving Free Lists ... |
| 282 | */ |
| 283 | DECLARE_BITMAP(starving_fl, MAX_EGRQ); |
| 284 | struct timer_list rx_timer; |
| 285 | |
| 286 | /* |
| 287 | * State for cleaning up completed TX descriptors. |
| 288 | */ |
| 289 | struct timer_list tx_timer; |
| 290 | |
| 291 | /* |
| 292 | * Write-once/infrequently fields. |
| 293 | * ------------------------------- |
| 294 | */ |
| 295 | |
| 296 | u16 max_ethqsets; /* # of available Ethernet queue sets */ |
| 297 | u16 ethqsets; /* # of active Ethernet queue sets */ |
| 298 | u16 ethtxq_rover; /* Tx queue to clean up next */ |
| 299 | u16 timer_val[SGE_NTIMERS]; /* interrupt holdoff timer array */ |
| 300 | u8 counter_val[SGE_NCOUNTERS]; /* interrupt RX threshold array */ |
| 301 | |
Hariprasad Shenai | 65f6ecc | 2014-11-07 17:06:29 +0530 | [diff] [blame] | 302 | /* Decoded Adapter Parameters. |
| 303 | */ |
| 304 | u32 fl_pg_order; /* large page allocation size */ |
| 305 | u32 stat_len; /* length of status page at ring end */ |
| 306 | u32 pktshift; /* padding between CPL & packet data */ |
| 307 | u32 fl_align; /* response queue message alignment */ |
| 308 | u32 fl_starve_thres; /* Free List starvation threshold */ |
| 309 | |
Casey Leedom | be839e3 | 2010-06-25 12:14:15 +0000 | [diff] [blame] | 310 | /* |
| 311 | * Reverse maps from Absolute Queue IDs to associated queue pointers. |
| 312 | * The absolute Queue IDs are in a compact range which start at a |
| 313 | * [potentially large] Base Queue ID. We perform the reverse map by |
| 314 | * first converting the Absolute Queue ID into a Relative Queue ID by |
| 315 | * subtracting off the Base Queue ID and then use a Relative Queue ID |
| 316 | * indexed table to get the pointer to the corresponding software |
| 317 | * queue structure. |
| 318 | */ |
| 319 | unsigned int egr_base; |
| 320 | unsigned int ingr_base; |
| 321 | void *egr_map[MAX_EGRQ]; |
| 322 | struct sge_rspq *ingr_map[MAX_INGQ]; |
| 323 | }; |
| 324 | |
| 325 | /* |
| 326 | * Utility macros to convert Absolute- to Relative-Queue indices and Egress- |
| 327 | * and Ingress-Queues. The EQ_MAP() and IQ_MAP() macros which provide |
| 328 | * pointers to Ingress- and Egress-Queues can be used as both L- and R-values |
| 329 | */ |
| 330 | #define EQ_IDX(s, abs_id) ((unsigned int)((abs_id) - (s)->egr_base)) |
| 331 | #define IQ_IDX(s, abs_id) ((unsigned int)((abs_id) - (s)->ingr_base)) |
| 332 | |
| 333 | #define EQ_MAP(s, abs_id) ((s)->egr_map[EQ_IDX(s, abs_id)]) |
| 334 | #define IQ_MAP(s, abs_id) ((s)->ingr_map[IQ_IDX(s, abs_id)]) |
| 335 | |
| 336 | /* |
| 337 | * Macro to iterate across Queue Sets ("rxq" is a historic misnomer). |
| 338 | */ |
| 339 | #define for_each_ethrxq(sge, iter) \ |
| 340 | for (iter = 0; iter < (sge)->ethqsets; iter++) |
| 341 | |
| 342 | /* |
| 343 | * Per-"adapter" (Virtual Function) information. |
| 344 | */ |
| 345 | struct adapter { |
| 346 | /* PCI resources */ |
| 347 | void __iomem *regs; |
| 348 | struct pci_dev *pdev; |
| 349 | struct device *pdev_dev; |
| 350 | |
| 351 | /* "adapter" resources */ |
| 352 | unsigned long registered_device_map; |
| 353 | unsigned long open_device_map; |
| 354 | unsigned long flags; |
| 355 | struct adapter_params params; |
| 356 | |
| 357 | /* queue and interrupt resources */ |
| 358 | struct { |
| 359 | unsigned short vec; |
| 360 | char desc[22]; |
| 361 | } msix_info[MSIX_ENTRIES]; |
| 362 | struct sge sge; |
| 363 | |
| 364 | /* Linux network device resources */ |
| 365 | struct net_device *port[MAX_NPORTS]; |
| 366 | const char *name; |
| 367 | unsigned int msg_enable; |
| 368 | |
| 369 | /* debugfs resources */ |
| 370 | struct dentry *debugfs_root; |
| 371 | |
| 372 | /* various locks */ |
| 373 | spinlock_t stats_lock; |
| 374 | }; |
| 375 | |
| 376 | enum { /* adapter flags */ |
| 377 | FULL_INIT_DONE = (1UL << 0), |
| 378 | USING_MSI = (1UL << 1), |
| 379 | USING_MSIX = (1UL << 2), |
| 380 | QUEUES_BOUND = (1UL << 3), |
| 381 | }; |
| 382 | |
| 383 | /* |
| 384 | * The following register read/write routine definitions are required by |
| 385 | * the common code. |
| 386 | */ |
| 387 | |
| 388 | /** |
| 389 | * t4_read_reg - read a HW register |
| 390 | * @adapter: the adapter |
| 391 | * @reg_addr: the register address |
| 392 | * |
| 393 | * Returns the 32-bit value of the given HW register. |
| 394 | */ |
| 395 | static inline u32 t4_read_reg(struct adapter *adapter, u32 reg_addr) |
| 396 | { |
| 397 | return readl(adapter->regs + reg_addr); |
| 398 | } |
| 399 | |
| 400 | /** |
| 401 | * t4_write_reg - write a HW register |
| 402 | * @adapter: the adapter |
| 403 | * @reg_addr: the register address |
| 404 | * @val: the value to write |
| 405 | * |
| 406 | * Write a 32-bit value into the given HW register. |
| 407 | */ |
| 408 | static inline void t4_write_reg(struct adapter *adapter, u32 reg_addr, u32 val) |
| 409 | { |
| 410 | writel(val, adapter->regs + reg_addr); |
| 411 | } |
| 412 | |
| 413 | #ifndef readq |
| 414 | static inline u64 readq(const volatile void __iomem *addr) |
| 415 | { |
| 416 | return readl(addr) + ((u64)readl(addr + 4) << 32); |
| 417 | } |
| 418 | |
| 419 | static inline void writeq(u64 val, volatile void __iomem *addr) |
| 420 | { |
| 421 | writel(val, addr); |
| 422 | writel(val >> 32, addr + 4); |
| 423 | } |
| 424 | #endif |
| 425 | |
| 426 | /** |
| 427 | * t4_read_reg64 - read a 64-bit HW register |
| 428 | * @adapter: the adapter |
| 429 | * @reg_addr: the register address |
| 430 | * |
| 431 | * Returns the 64-bit value of the given HW register. |
| 432 | */ |
| 433 | static inline u64 t4_read_reg64(struct adapter *adapter, u32 reg_addr) |
| 434 | { |
| 435 | return readq(adapter->regs + reg_addr); |
| 436 | } |
| 437 | |
| 438 | /** |
| 439 | * t4_write_reg64 - write a 64-bit HW register |
| 440 | * @adapter: the adapter |
| 441 | * @reg_addr: the register address |
| 442 | * @val: the value to write |
| 443 | * |
| 444 | * Write a 64-bit value into the given HW register. |
| 445 | */ |
| 446 | static inline void t4_write_reg64(struct adapter *adapter, u32 reg_addr, |
| 447 | u64 val) |
| 448 | { |
| 449 | writeq(val, adapter->regs + reg_addr); |
| 450 | } |
| 451 | |
| 452 | /** |
| 453 | * port_name - return the string name of a port |
| 454 | * @adapter: the adapter |
| 455 | * @pidx: the port index |
| 456 | * |
| 457 | * Return the string name of the selected port. |
| 458 | */ |
| 459 | static inline const char *port_name(struct adapter *adapter, int pidx) |
| 460 | { |
| 461 | return adapter->port[pidx]->name; |
| 462 | } |
| 463 | |
| 464 | /** |
| 465 | * t4_os_set_hw_addr - store a port's MAC address in SW |
| 466 | * @adapter: the adapter |
| 467 | * @pidx: the port index |
| 468 | * @hw_addr: the Ethernet address |
| 469 | * |
| 470 | * Store the Ethernet address of the given port in SW. Called by the common |
| 471 | * code when it retrieves a port's Ethernet address from EEPROM. |
| 472 | */ |
| 473 | static inline void t4_os_set_hw_addr(struct adapter *adapter, int pidx, |
| 474 | u8 hw_addr[]) |
| 475 | { |
| 476 | memcpy(adapter->port[pidx]->dev_addr, hw_addr, ETH_ALEN); |
Casey Leedom | be839e3 | 2010-06-25 12:14:15 +0000 | [diff] [blame] | 477 | } |
| 478 | |
| 479 | /** |
| 480 | * netdev2pinfo - return the port_info structure associated with a net_device |
| 481 | * @dev: the netdev |
| 482 | * |
| 483 | * Return the struct port_info associated with a net_device |
| 484 | */ |
| 485 | static inline struct port_info *netdev2pinfo(const struct net_device *dev) |
| 486 | { |
| 487 | return netdev_priv(dev); |
| 488 | } |
| 489 | |
| 490 | /** |
| 491 | * adap2pinfo - return the port_info of a port |
| 492 | * @adap: the adapter |
| 493 | * @pidx: the port index |
| 494 | * |
| 495 | * Return the port_info structure for the adapter. |
| 496 | */ |
| 497 | static inline struct port_info *adap2pinfo(struct adapter *adapter, int pidx) |
| 498 | { |
| 499 | return netdev_priv(adapter->port[pidx]); |
| 500 | } |
| 501 | |
| 502 | /** |
| 503 | * netdev2adap - return the adapter structure associated with a net_device |
| 504 | * @dev: the netdev |
| 505 | * |
| 506 | * Return the struct adapter associated with a net_device |
| 507 | */ |
| 508 | static inline struct adapter *netdev2adap(const struct net_device *dev) |
| 509 | { |
| 510 | return netdev2pinfo(dev)->adapter; |
| 511 | } |
| 512 | |
| 513 | /* |
| 514 | * OS "Callback" function declarations. These are functions that the OS code |
| 515 | * is "contracted" to provide for the common code. |
| 516 | */ |
| 517 | void t4vf_os_link_changed(struct adapter *, int, int); |
| 518 | |
| 519 | /* |
| 520 | * SGE function prototype declarations. |
| 521 | */ |
| 522 | int t4vf_sge_alloc_rxq(struct adapter *, struct sge_rspq *, bool, |
| 523 | struct net_device *, int, |
| 524 | struct sge_fl *, rspq_handler_t); |
| 525 | int t4vf_sge_alloc_eth_txq(struct adapter *, struct sge_eth_txq *, |
| 526 | struct net_device *, struct netdev_queue *, |
| 527 | unsigned int); |
| 528 | void t4vf_free_sge_resources(struct adapter *); |
| 529 | |
| 530 | int t4vf_eth_xmit(struct sk_buff *, struct net_device *); |
| 531 | int t4vf_ethrx_handler(struct sge_rspq *, const __be64 *, |
| 532 | const struct pkt_gl *); |
| 533 | |
| 534 | irq_handler_t t4vf_intr_handler(struct adapter *); |
| 535 | irqreturn_t t4vf_sge_intr_msix(int, void *); |
| 536 | |
| 537 | int t4vf_sge_init(struct adapter *); |
| 538 | void t4vf_sge_start(struct adapter *); |
| 539 | void t4vf_sge_stop(struct adapter *); |
| 540 | |
| 541 | #endif /* __CXGB4VF_ADAPTER_H__ */ |