David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 1 | /* |
Lars Poeschel | 4e47f91 | 2014-01-16 11:44:15 +0100 | [diff] [blame] | 2 | * MCP23S08 SPI/I2C GPIO gpio expander driver |
| 3 | * |
| 4 | * The inputs and outputs of the mcp23s08, mcp23s17, mcp23008 and mcp23017 are |
| 5 | * supported. |
| 6 | * For the I2C versions of the chips (mcp23008 and mcp23017) generation of |
| 7 | * interrupts is also supported. |
| 8 | * The hardware of the SPI versions of the chips (mcp23s08 and mcp23s17) is |
| 9 | * also capable of generating interrupts, but the linux driver does not |
| 10 | * support that yet. |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 11 | */ |
| 12 | |
| 13 | #include <linux/kernel.h> |
| 14 | #include <linux/device.h> |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 15 | #include <linux/mutex.h> |
Paul Gortmaker | bb207ef | 2011-07-03 13:38:09 -0400 | [diff] [blame] | 16 | #include <linux/module.h> |
H Hartley Sweeten | d120c17 | 2009-09-22 16:46:37 -0700 | [diff] [blame] | 17 | #include <linux/gpio.h> |
Peter Korsgaard | 752ad5e | 2011-07-15 10:25:32 +0200 | [diff] [blame] | 18 | #include <linux/i2c.h> |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 19 | #include <linux/spi/spi.h> |
| 20 | #include <linux/spi/mcp23s08.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 21 | #include <linux/slab.h> |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 22 | #include <asm/byteorder.h> |
Lars Poeschel | 4e47f91 | 2014-01-16 11:44:15 +0100 | [diff] [blame] | 23 | #include <linux/interrupt.h> |
| 24 | #include <linux/of_irq.h> |
Lars Poeschel | 97ddb1c | 2013-04-04 12:02:02 +0200 | [diff] [blame] | 25 | #include <linux/of_device.h> |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 26 | |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 27 | /** |
| 28 | * MCP types supported by driver |
| 29 | */ |
| 30 | #define MCP_TYPE_S08 0 |
| 31 | #define MCP_TYPE_S17 1 |
Peter Korsgaard | 752ad5e | 2011-07-15 10:25:32 +0200 | [diff] [blame] | 32 | #define MCP_TYPE_008 2 |
| 33 | #define MCP_TYPE_017 3 |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 34 | |
| 35 | /* Registers are all 8 bits wide. |
| 36 | * |
| 37 | * The mcp23s17 has twice as many bits, and can be configured to work |
| 38 | * with either 16 bit registers or with two adjacent 8 bit banks. |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 39 | */ |
| 40 | #define MCP_IODIR 0x00 /* init/reset: all ones */ |
| 41 | #define MCP_IPOL 0x01 |
| 42 | #define MCP_GPINTEN 0x02 |
| 43 | #define MCP_DEFVAL 0x03 |
| 44 | #define MCP_INTCON 0x04 |
| 45 | #define MCP_IOCON 0x05 |
Lars Poeschel | 4e47f91 | 2014-01-16 11:44:15 +0100 | [diff] [blame] | 46 | # define IOCON_MIRROR (1 << 6) |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 47 | # define IOCON_SEQOP (1 << 5) |
| 48 | # define IOCON_HAEN (1 << 3) |
| 49 | # define IOCON_ODR (1 << 2) |
| 50 | # define IOCON_INTPOL (1 << 1) |
| 51 | #define MCP_GPPU 0x06 |
| 52 | #define MCP_INTF 0x07 |
| 53 | #define MCP_INTCAP 0x08 |
| 54 | #define MCP_GPIO 0x09 |
| 55 | #define MCP_OLAT 0x0a |
| 56 | |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 57 | struct mcp23s08; |
| 58 | |
| 59 | struct mcp23s08_ops { |
| 60 | int (*read)(struct mcp23s08 *mcp, unsigned reg); |
| 61 | int (*write)(struct mcp23s08 *mcp, unsigned reg, unsigned val); |
| 62 | int (*read_regs)(struct mcp23s08 *mcp, unsigned reg, |
| 63 | u16 *vals, unsigned n); |
| 64 | }; |
| 65 | |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 66 | struct mcp23s08 { |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 67 | u8 addr; |
| 68 | |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 69 | u16 cache[11]; |
Lars Poeschel | 4e47f91 | 2014-01-16 11:44:15 +0100 | [diff] [blame] | 70 | u16 irq_rise; |
| 71 | u16 irq_fall; |
| 72 | int irq; |
| 73 | bool irq_controller; |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 74 | /* lock protects the cached values */ |
| 75 | struct mutex lock; |
Lars Poeschel | 4e47f91 | 2014-01-16 11:44:15 +0100 | [diff] [blame] | 76 | struct mutex irq_lock; |
| 77 | struct irq_domain *irq_domain; |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 78 | |
| 79 | struct gpio_chip chip; |
| 80 | |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 81 | const struct mcp23s08_ops *ops; |
Peter Korsgaard | d62b98f | 2011-07-15 10:25:31 +0200 | [diff] [blame] | 82 | void *data; /* ops specific data */ |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 83 | }; |
| 84 | |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 85 | /* A given spi_device can represent up to eight mcp23sxx chips |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 86 | * sharing the same chipselect but using different addresses |
| 87 | * (e.g. chips #0 and #3 might be populated, but not #1 or $2). |
| 88 | * Driver data holds all the per-chip data. |
| 89 | */ |
| 90 | struct mcp23s08_driver_data { |
| 91 | unsigned ngpio; |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 92 | struct mcp23s08 *mcp[8]; |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 93 | struct mcp23s08 chip[]; |
| 94 | }; |
| 95 | |
Lars Poeschel | 4e47f91 | 2014-01-16 11:44:15 +0100 | [diff] [blame] | 96 | /* This lock class tells lockdep that GPIO irqs are in a different |
| 97 | * category than their parents, so it won't report false recursion. |
| 98 | */ |
| 99 | static struct lock_class_key gpio_lock_class; |
| 100 | |
Peter Korsgaard | 752ad5e | 2011-07-15 10:25:32 +0200 | [diff] [blame] | 101 | /*----------------------------------------------------------------------*/ |
| 102 | |
Daniel M. Weeks | cbf24fa | 2012-11-06 23:51:05 -0500 | [diff] [blame] | 103 | #if IS_ENABLED(CONFIG_I2C) |
Peter Korsgaard | 752ad5e | 2011-07-15 10:25:32 +0200 | [diff] [blame] | 104 | |
| 105 | static int mcp23008_read(struct mcp23s08 *mcp, unsigned reg) |
| 106 | { |
| 107 | return i2c_smbus_read_byte_data(mcp->data, reg); |
| 108 | } |
| 109 | |
| 110 | static int mcp23008_write(struct mcp23s08 *mcp, unsigned reg, unsigned val) |
| 111 | { |
| 112 | return i2c_smbus_write_byte_data(mcp->data, reg, val); |
| 113 | } |
| 114 | |
| 115 | static int |
| 116 | mcp23008_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n) |
| 117 | { |
| 118 | while (n--) { |
| 119 | int ret = mcp23008_read(mcp, reg++); |
| 120 | if (ret < 0) |
| 121 | return ret; |
| 122 | *vals++ = ret; |
| 123 | } |
| 124 | |
| 125 | return 0; |
| 126 | } |
| 127 | |
| 128 | static int mcp23017_read(struct mcp23s08 *mcp, unsigned reg) |
| 129 | { |
| 130 | return i2c_smbus_read_word_data(mcp->data, reg << 1); |
| 131 | } |
| 132 | |
| 133 | static int mcp23017_write(struct mcp23s08 *mcp, unsigned reg, unsigned val) |
| 134 | { |
| 135 | return i2c_smbus_write_word_data(mcp->data, reg << 1, val); |
| 136 | } |
| 137 | |
| 138 | static int |
| 139 | mcp23017_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n) |
| 140 | { |
| 141 | while (n--) { |
| 142 | int ret = mcp23017_read(mcp, reg++); |
| 143 | if (ret < 0) |
| 144 | return ret; |
| 145 | *vals++ = ret; |
| 146 | } |
| 147 | |
| 148 | return 0; |
| 149 | } |
| 150 | |
| 151 | static const struct mcp23s08_ops mcp23008_ops = { |
| 152 | .read = mcp23008_read, |
| 153 | .write = mcp23008_write, |
| 154 | .read_regs = mcp23008_read_regs, |
| 155 | }; |
| 156 | |
| 157 | static const struct mcp23s08_ops mcp23017_ops = { |
| 158 | .read = mcp23017_read, |
| 159 | .write = mcp23017_write, |
| 160 | .read_regs = mcp23017_read_regs, |
| 161 | }; |
| 162 | |
| 163 | #endif /* CONFIG_I2C */ |
| 164 | |
| 165 | /*----------------------------------------------------------------------*/ |
| 166 | |
Peter Korsgaard | d62b98f | 2011-07-15 10:25:31 +0200 | [diff] [blame] | 167 | #ifdef CONFIG_SPI_MASTER |
| 168 | |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 169 | static int mcp23s08_read(struct mcp23s08 *mcp, unsigned reg) |
| 170 | { |
| 171 | u8 tx[2], rx[1]; |
| 172 | int status; |
| 173 | |
| 174 | tx[0] = mcp->addr | 0x01; |
| 175 | tx[1] = reg; |
Gary Servin | 33bc8411 | 2014-03-06 20:25:26 -0300 | [diff] [blame] | 176 | status = spi_write_then_read(mcp->data, tx, sizeof(tx), rx, sizeof(rx)); |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 177 | return (status < 0) ? status : rx[0]; |
| 178 | } |
| 179 | |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 180 | static int mcp23s08_write(struct mcp23s08 *mcp, unsigned reg, unsigned val) |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 181 | { |
| 182 | u8 tx[3]; |
| 183 | |
| 184 | tx[0] = mcp->addr; |
| 185 | tx[1] = reg; |
| 186 | tx[2] = val; |
Gary Servin | 33bc8411 | 2014-03-06 20:25:26 -0300 | [diff] [blame] | 187 | return spi_write_then_read(mcp->data, tx, sizeof(tx), NULL, 0); |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 188 | } |
| 189 | |
| 190 | static int |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 191 | mcp23s08_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n) |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 192 | { |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 193 | u8 tx[2], *tmp; |
| 194 | int status; |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 195 | |
Gary Servin | 33bc8411 | 2014-03-06 20:25:26 -0300 | [diff] [blame] | 196 | if ((n + reg) > sizeof(mcp->cache)) |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 197 | return -EINVAL; |
| 198 | tx[0] = mcp->addr | 0x01; |
| 199 | tx[1] = reg; |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 200 | |
| 201 | tmp = (u8 *)vals; |
Gary Servin | 33bc8411 | 2014-03-06 20:25:26 -0300 | [diff] [blame] | 202 | status = spi_write_then_read(mcp->data, tx, sizeof(tx), tmp, n); |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 203 | if (status >= 0) { |
| 204 | while (n--) |
| 205 | vals[n] = tmp[n]; /* expand to 16bit */ |
| 206 | } |
| 207 | return status; |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 208 | } |
| 209 | |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 210 | static int mcp23s17_read(struct mcp23s08 *mcp, unsigned reg) |
| 211 | { |
| 212 | u8 tx[2], rx[2]; |
| 213 | int status; |
| 214 | |
| 215 | tx[0] = mcp->addr | 0x01; |
| 216 | tx[1] = reg << 1; |
Gary Servin | 33bc8411 | 2014-03-06 20:25:26 -0300 | [diff] [blame] | 217 | status = spi_write_then_read(mcp->data, tx, sizeof(tx), rx, sizeof(rx)); |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 218 | return (status < 0) ? status : (rx[0] | (rx[1] << 8)); |
| 219 | } |
| 220 | |
| 221 | static int mcp23s17_write(struct mcp23s08 *mcp, unsigned reg, unsigned val) |
| 222 | { |
| 223 | u8 tx[4]; |
| 224 | |
| 225 | tx[0] = mcp->addr; |
| 226 | tx[1] = reg << 1; |
| 227 | tx[2] = val; |
| 228 | tx[3] = val >> 8; |
Gary Servin | 33bc8411 | 2014-03-06 20:25:26 -0300 | [diff] [blame] | 229 | return spi_write_then_read(mcp->data, tx, sizeof(tx), NULL, 0); |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 230 | } |
| 231 | |
| 232 | static int |
| 233 | mcp23s17_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n) |
| 234 | { |
| 235 | u8 tx[2]; |
| 236 | int status; |
| 237 | |
Gary Servin | 33bc8411 | 2014-03-06 20:25:26 -0300 | [diff] [blame] | 238 | if ((n + reg) > sizeof(mcp->cache)) |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 239 | return -EINVAL; |
| 240 | tx[0] = mcp->addr | 0x01; |
| 241 | tx[1] = reg << 1; |
| 242 | |
Gary Servin | 33bc8411 | 2014-03-06 20:25:26 -0300 | [diff] [blame] | 243 | status = spi_write_then_read(mcp->data, tx, sizeof(tx), |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 244 | (u8 *)vals, n * 2); |
| 245 | if (status >= 0) { |
| 246 | while (n--) |
| 247 | vals[n] = __le16_to_cpu((__le16)vals[n]); |
| 248 | } |
| 249 | |
| 250 | return status; |
| 251 | } |
| 252 | |
| 253 | static const struct mcp23s08_ops mcp23s08_ops = { |
| 254 | .read = mcp23s08_read, |
| 255 | .write = mcp23s08_write, |
| 256 | .read_regs = mcp23s08_read_regs, |
| 257 | }; |
| 258 | |
| 259 | static const struct mcp23s08_ops mcp23s17_ops = { |
| 260 | .read = mcp23s17_read, |
| 261 | .write = mcp23s17_write, |
| 262 | .read_regs = mcp23s17_read_regs, |
| 263 | }; |
| 264 | |
Peter Korsgaard | d62b98f | 2011-07-15 10:25:31 +0200 | [diff] [blame] | 265 | #endif /* CONFIG_SPI_MASTER */ |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 266 | |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 267 | /*----------------------------------------------------------------------*/ |
| 268 | |
| 269 | static int mcp23s08_direction_input(struct gpio_chip *chip, unsigned offset) |
| 270 | { |
| 271 | struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip); |
| 272 | int status; |
| 273 | |
| 274 | mutex_lock(&mcp->lock); |
| 275 | mcp->cache[MCP_IODIR] |= (1 << offset); |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 276 | status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]); |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 277 | mutex_unlock(&mcp->lock); |
| 278 | return status; |
| 279 | } |
| 280 | |
| 281 | static int mcp23s08_get(struct gpio_chip *chip, unsigned offset) |
| 282 | { |
| 283 | struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip); |
| 284 | int status; |
| 285 | |
| 286 | mutex_lock(&mcp->lock); |
| 287 | |
| 288 | /* REVISIT reading this clears any IRQ ... */ |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 289 | status = mcp->ops->read(mcp, MCP_GPIO); |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 290 | if (status < 0) |
| 291 | status = 0; |
| 292 | else { |
| 293 | mcp->cache[MCP_GPIO] = status; |
| 294 | status = !!(status & (1 << offset)); |
| 295 | } |
| 296 | mutex_unlock(&mcp->lock); |
| 297 | return status; |
| 298 | } |
| 299 | |
| 300 | static int __mcp23s08_set(struct mcp23s08 *mcp, unsigned mask, int value) |
| 301 | { |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 302 | unsigned olat = mcp->cache[MCP_OLAT]; |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 303 | |
| 304 | if (value) |
| 305 | olat |= mask; |
| 306 | else |
| 307 | olat &= ~mask; |
| 308 | mcp->cache[MCP_OLAT] = olat; |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 309 | return mcp->ops->write(mcp, MCP_OLAT, olat); |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 310 | } |
| 311 | |
| 312 | static void mcp23s08_set(struct gpio_chip *chip, unsigned offset, int value) |
| 313 | { |
| 314 | struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip); |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 315 | unsigned mask = 1 << offset; |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 316 | |
| 317 | mutex_lock(&mcp->lock); |
| 318 | __mcp23s08_set(mcp, mask, value); |
| 319 | mutex_unlock(&mcp->lock); |
| 320 | } |
| 321 | |
| 322 | static int |
| 323 | mcp23s08_direction_output(struct gpio_chip *chip, unsigned offset, int value) |
| 324 | { |
| 325 | struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip); |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 326 | unsigned mask = 1 << offset; |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 327 | int status; |
| 328 | |
| 329 | mutex_lock(&mcp->lock); |
| 330 | status = __mcp23s08_set(mcp, mask, value); |
| 331 | if (status == 0) { |
| 332 | mcp->cache[MCP_IODIR] &= ~mask; |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 333 | status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]); |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 334 | } |
| 335 | mutex_unlock(&mcp->lock); |
| 336 | return status; |
| 337 | } |
| 338 | |
| 339 | /*----------------------------------------------------------------------*/ |
Lars Poeschel | 4e47f91 | 2014-01-16 11:44:15 +0100 | [diff] [blame] | 340 | static irqreturn_t mcp23s08_irq(int irq, void *data) |
| 341 | { |
| 342 | struct mcp23s08 *mcp = data; |
| 343 | int intcap, intf, i; |
| 344 | unsigned int child_irq; |
| 345 | |
| 346 | mutex_lock(&mcp->lock); |
| 347 | intf = mcp->ops->read(mcp, MCP_INTF); |
| 348 | if (intf < 0) { |
| 349 | mutex_unlock(&mcp->lock); |
| 350 | return IRQ_HANDLED; |
| 351 | } |
| 352 | |
| 353 | mcp->cache[MCP_INTF] = intf; |
| 354 | |
| 355 | intcap = mcp->ops->read(mcp, MCP_INTCAP); |
| 356 | if (intcap < 0) { |
| 357 | mutex_unlock(&mcp->lock); |
| 358 | return IRQ_HANDLED; |
| 359 | } |
| 360 | |
| 361 | mcp->cache[MCP_INTCAP] = intcap; |
| 362 | mutex_unlock(&mcp->lock); |
| 363 | |
| 364 | |
| 365 | for (i = 0; i < mcp->chip.ngpio; i++) { |
| 366 | if ((BIT(i) & mcp->cache[MCP_INTF]) && |
| 367 | ((BIT(i) & intcap & mcp->irq_rise) || |
| 368 | (mcp->irq_fall & ~intcap & BIT(i)))) { |
| 369 | child_irq = irq_find_mapping(mcp->irq_domain, i); |
| 370 | handle_nested_irq(child_irq); |
| 371 | } |
| 372 | } |
| 373 | |
| 374 | return IRQ_HANDLED; |
| 375 | } |
| 376 | |
| 377 | static int mcp23s08_gpio_to_irq(struct gpio_chip *chip, unsigned offset) |
| 378 | { |
| 379 | struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip); |
| 380 | |
| 381 | return irq_find_mapping(mcp->irq_domain, offset); |
| 382 | } |
| 383 | |
| 384 | static void mcp23s08_irq_mask(struct irq_data *data) |
| 385 | { |
| 386 | struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data); |
| 387 | unsigned int pos = data->hwirq; |
| 388 | |
| 389 | mcp->cache[MCP_GPINTEN] &= ~BIT(pos); |
| 390 | } |
| 391 | |
| 392 | static void mcp23s08_irq_unmask(struct irq_data *data) |
| 393 | { |
| 394 | struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data); |
| 395 | unsigned int pos = data->hwirq; |
| 396 | |
| 397 | mcp->cache[MCP_GPINTEN] |= BIT(pos); |
| 398 | } |
| 399 | |
| 400 | static int mcp23s08_irq_set_type(struct irq_data *data, unsigned int type) |
| 401 | { |
| 402 | struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data); |
| 403 | unsigned int pos = data->hwirq; |
| 404 | int status = 0; |
| 405 | |
| 406 | if ((type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) { |
| 407 | mcp->cache[MCP_INTCON] &= ~BIT(pos); |
| 408 | mcp->irq_rise |= BIT(pos); |
| 409 | mcp->irq_fall |= BIT(pos); |
| 410 | } else if (type & IRQ_TYPE_EDGE_RISING) { |
| 411 | mcp->cache[MCP_INTCON] &= ~BIT(pos); |
| 412 | mcp->irq_rise |= BIT(pos); |
| 413 | mcp->irq_fall &= ~BIT(pos); |
| 414 | } else if (type & IRQ_TYPE_EDGE_FALLING) { |
| 415 | mcp->cache[MCP_INTCON] &= ~BIT(pos); |
| 416 | mcp->irq_rise &= ~BIT(pos); |
| 417 | mcp->irq_fall |= BIT(pos); |
| 418 | } else |
| 419 | return -EINVAL; |
| 420 | |
| 421 | return status; |
| 422 | } |
| 423 | |
| 424 | static void mcp23s08_irq_bus_lock(struct irq_data *data) |
| 425 | { |
| 426 | struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data); |
| 427 | |
| 428 | mutex_lock(&mcp->irq_lock); |
| 429 | } |
| 430 | |
| 431 | static void mcp23s08_irq_bus_unlock(struct irq_data *data) |
| 432 | { |
| 433 | struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data); |
| 434 | |
| 435 | mutex_lock(&mcp->lock); |
| 436 | mcp->ops->write(mcp, MCP_GPINTEN, mcp->cache[MCP_GPINTEN]); |
| 437 | mcp->ops->write(mcp, MCP_DEFVAL, mcp->cache[MCP_DEFVAL]); |
| 438 | mcp->ops->write(mcp, MCP_INTCON, mcp->cache[MCP_INTCON]); |
| 439 | mutex_unlock(&mcp->lock); |
| 440 | mutex_unlock(&mcp->irq_lock); |
| 441 | } |
| 442 | |
Linus Walleij | 57ef042 | 2014-03-14 18:16:20 +0100 | [diff] [blame] | 443 | static int mcp23s08_irq_reqres(struct irq_data *data) |
Lars Poeschel | 4e47f91 | 2014-01-16 11:44:15 +0100 | [diff] [blame] | 444 | { |
| 445 | struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data); |
| 446 | |
Linus Walleij | 57ef042 | 2014-03-14 18:16:20 +0100 | [diff] [blame] | 447 | if (gpio_lock_as_irq(&mcp->chip, data->hwirq)) { |
Lars Poeschel | 4e47f91 | 2014-01-16 11:44:15 +0100 | [diff] [blame] | 448 | dev_err(mcp->chip.dev, |
| 449 | "unable to lock HW IRQ %lu for IRQ usage\n", |
| 450 | data->hwirq); |
Linus Walleij | 57ef042 | 2014-03-14 18:16:20 +0100 | [diff] [blame] | 451 | return -EINVAL; |
| 452 | } |
Lars Poeschel | 4e47f91 | 2014-01-16 11:44:15 +0100 | [diff] [blame] | 453 | |
Lars Poeschel | 4e47f91 | 2014-01-16 11:44:15 +0100 | [diff] [blame] | 454 | return 0; |
| 455 | } |
| 456 | |
Linus Walleij | 57ef042 | 2014-03-14 18:16:20 +0100 | [diff] [blame] | 457 | static void mcp23s08_irq_relres(struct irq_data *data) |
Lars Poeschel | 4e47f91 | 2014-01-16 11:44:15 +0100 | [diff] [blame] | 458 | { |
| 459 | struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data); |
| 460 | |
Lars Poeschel | 4e47f91 | 2014-01-16 11:44:15 +0100 | [diff] [blame] | 461 | gpio_unlock_as_irq(&mcp->chip, data->hwirq); |
| 462 | } |
| 463 | |
| 464 | static struct irq_chip mcp23s08_irq_chip = { |
| 465 | .name = "gpio-mcp23xxx", |
| 466 | .irq_mask = mcp23s08_irq_mask, |
| 467 | .irq_unmask = mcp23s08_irq_unmask, |
| 468 | .irq_set_type = mcp23s08_irq_set_type, |
| 469 | .irq_bus_lock = mcp23s08_irq_bus_lock, |
| 470 | .irq_bus_sync_unlock = mcp23s08_irq_bus_unlock, |
Linus Walleij | 57ef042 | 2014-03-14 18:16:20 +0100 | [diff] [blame] | 471 | .irq_request_resources = mcp23s08_irq_reqres, |
| 472 | .irq_release_resources = mcp23s08_irq_relres, |
Lars Poeschel | 4e47f91 | 2014-01-16 11:44:15 +0100 | [diff] [blame] | 473 | }; |
| 474 | |
| 475 | static int mcp23s08_irq_setup(struct mcp23s08 *mcp) |
| 476 | { |
| 477 | struct gpio_chip *chip = &mcp->chip; |
| 478 | int err, irq, j; |
| 479 | |
| 480 | mutex_init(&mcp->irq_lock); |
| 481 | |
| 482 | mcp->irq_domain = irq_domain_add_linear(chip->of_node, chip->ngpio, |
| 483 | &irq_domain_simple_ops, mcp); |
| 484 | if (!mcp->irq_domain) |
| 485 | return -ENODEV; |
| 486 | |
| 487 | err = devm_request_threaded_irq(chip->dev, mcp->irq, NULL, mcp23s08_irq, |
| 488 | IRQF_TRIGGER_LOW | IRQF_ONESHOT, |
| 489 | dev_name(chip->dev), mcp); |
| 490 | if (err != 0) { |
| 491 | dev_err(chip->dev, "unable to request IRQ#%d: %d\n", |
| 492 | mcp->irq, err); |
| 493 | return err; |
| 494 | } |
| 495 | |
| 496 | chip->to_irq = mcp23s08_gpio_to_irq; |
| 497 | |
| 498 | for (j = 0; j < mcp->chip.ngpio; j++) { |
| 499 | irq = irq_create_mapping(mcp->irq_domain, j); |
| 500 | irq_set_lockdep_class(irq, &gpio_lock_class); |
| 501 | irq_set_chip_data(irq, mcp); |
| 502 | irq_set_chip(irq, &mcp23s08_irq_chip); |
| 503 | irq_set_nested_thread(irq, true); |
| 504 | #ifdef CONFIG_ARM |
| 505 | set_irq_flags(irq, IRQF_VALID); |
| 506 | #else |
| 507 | irq_set_noprobe(irq); |
| 508 | #endif |
| 509 | } |
| 510 | return 0; |
| 511 | } |
| 512 | |
| 513 | static void mcp23s08_irq_teardown(struct mcp23s08 *mcp) |
| 514 | { |
| 515 | unsigned int irq, i; |
| 516 | |
| 517 | free_irq(mcp->irq, mcp); |
| 518 | |
| 519 | for (i = 0; i < mcp->chip.ngpio; i++) { |
| 520 | irq = irq_find_mapping(mcp->irq_domain, i); |
| 521 | if (irq > 0) |
| 522 | irq_dispose_mapping(irq); |
| 523 | } |
| 524 | |
| 525 | irq_domain_remove(mcp->irq_domain); |
| 526 | } |
| 527 | |
| 528 | /*----------------------------------------------------------------------*/ |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 529 | |
| 530 | #ifdef CONFIG_DEBUG_FS |
| 531 | |
| 532 | #include <linux/seq_file.h> |
| 533 | |
| 534 | /* |
| 535 | * This shows more info than the generic gpio dump code: |
| 536 | * pullups, deglitching, open drain drive. |
| 537 | */ |
| 538 | static void mcp23s08_dbg_show(struct seq_file *s, struct gpio_chip *chip) |
| 539 | { |
| 540 | struct mcp23s08 *mcp; |
| 541 | char bank; |
Roel Kluin | 1d1c1d9 | 2008-05-23 13:04:43 -0700 | [diff] [blame] | 542 | int t; |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 543 | unsigned mask; |
| 544 | |
| 545 | mcp = container_of(chip, struct mcp23s08, chip); |
| 546 | |
| 547 | /* NOTE: we only handle one bank for now ... */ |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 548 | bank = '0' + ((mcp->addr >> 1) & 0x7); |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 549 | |
| 550 | mutex_lock(&mcp->lock); |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 551 | t = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache)); |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 552 | if (t < 0) { |
| 553 | seq_printf(s, " I/O ERROR %d\n", t); |
| 554 | goto done; |
| 555 | } |
| 556 | |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 557 | for (t = 0, mask = 1; t < chip->ngpio; t++, mask <<= 1) { |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 558 | const char *label; |
| 559 | |
| 560 | label = gpiochip_is_requested(chip, t); |
| 561 | if (!label) |
| 562 | continue; |
| 563 | |
| 564 | seq_printf(s, " gpio-%-3d P%c.%d (%-12s) %s %s %s", |
| 565 | chip->base + t, bank, t, label, |
| 566 | (mcp->cache[MCP_IODIR] & mask) ? "in " : "out", |
| 567 | (mcp->cache[MCP_GPIO] & mask) ? "hi" : "lo", |
Peter Korsgaard | eb1567f | 2012-04-25 11:51:53 +0200 | [diff] [blame] | 568 | (mcp->cache[MCP_GPPU] & mask) ? "up" : " "); |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 569 | /* NOTE: ignoring the irq-related registers */ |
Gary Servin | 33bc8411 | 2014-03-06 20:25:26 -0300 | [diff] [blame] | 570 | seq_puts(s, "\n"); |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 571 | } |
| 572 | done: |
| 573 | mutex_unlock(&mcp->lock); |
| 574 | } |
| 575 | |
| 576 | #else |
| 577 | #define mcp23s08_dbg_show NULL |
| 578 | #endif |
| 579 | |
| 580 | /*----------------------------------------------------------------------*/ |
| 581 | |
Peter Korsgaard | d62b98f | 2011-07-15 10:25:31 +0200 | [diff] [blame] | 582 | static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev, |
Lars Poeschel | 4e47f91 | 2014-01-16 11:44:15 +0100 | [diff] [blame] | 583 | void *data, unsigned addr, unsigned type, |
| 584 | unsigned base, unsigned pullups) |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 585 | { |
Peter Korsgaard | d62b98f | 2011-07-15 10:25:31 +0200 | [diff] [blame] | 586 | int status; |
Lars Poeschel | 4e47f91 | 2014-01-16 11:44:15 +0100 | [diff] [blame] | 587 | bool mirror = false; |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 588 | |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 589 | mutex_init(&mcp->lock); |
| 590 | |
Peter Korsgaard | d62b98f | 2011-07-15 10:25:31 +0200 | [diff] [blame] | 591 | mcp->data = data; |
| 592 | mcp->addr = addr; |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 593 | |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 594 | mcp->chip.direction_input = mcp23s08_direction_input; |
| 595 | mcp->chip.get = mcp23s08_get; |
| 596 | mcp->chip.direction_output = mcp23s08_direction_output; |
| 597 | mcp->chip.set = mcp23s08_set; |
| 598 | mcp->chip.dbg_show = mcp23s08_dbg_show; |
Lars Poeschel | 97ddb1c | 2013-04-04 12:02:02 +0200 | [diff] [blame] | 599 | #ifdef CONFIG_OF |
| 600 | mcp->chip.of_gpio_n_cells = 2; |
| 601 | mcp->chip.of_node = dev->of_node; |
| 602 | #endif |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 603 | |
Peter Korsgaard | d62b98f | 2011-07-15 10:25:31 +0200 | [diff] [blame] | 604 | switch (type) { |
| 605 | #ifdef CONFIG_SPI_MASTER |
| 606 | case MCP_TYPE_S08: |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 607 | mcp->ops = &mcp23s08_ops; |
| 608 | mcp->chip.ngpio = 8; |
| 609 | mcp->chip.label = "mcp23s08"; |
Peter Korsgaard | d62b98f | 2011-07-15 10:25:31 +0200 | [diff] [blame] | 610 | break; |
| 611 | |
| 612 | case MCP_TYPE_S17: |
| 613 | mcp->ops = &mcp23s17_ops; |
| 614 | mcp->chip.ngpio = 16; |
| 615 | mcp->chip.label = "mcp23s17"; |
| 616 | break; |
| 617 | #endif /* CONFIG_SPI_MASTER */ |
| 618 | |
Daniel M. Weeks | cbf24fa | 2012-11-06 23:51:05 -0500 | [diff] [blame] | 619 | #if IS_ENABLED(CONFIG_I2C) |
Peter Korsgaard | 752ad5e | 2011-07-15 10:25:32 +0200 | [diff] [blame] | 620 | case MCP_TYPE_008: |
| 621 | mcp->ops = &mcp23008_ops; |
| 622 | mcp->chip.ngpio = 8; |
| 623 | mcp->chip.label = "mcp23008"; |
| 624 | break; |
| 625 | |
| 626 | case MCP_TYPE_017: |
| 627 | mcp->ops = &mcp23017_ops; |
| 628 | mcp->chip.ngpio = 16; |
| 629 | mcp->chip.label = "mcp23017"; |
| 630 | break; |
| 631 | #endif /* CONFIG_I2C */ |
| 632 | |
Peter Korsgaard | d62b98f | 2011-07-15 10:25:31 +0200 | [diff] [blame] | 633 | default: |
| 634 | dev_err(dev, "invalid device type (%d)\n", type); |
| 635 | return -EINVAL; |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 636 | } |
Peter Korsgaard | d62b98f | 2011-07-15 10:25:31 +0200 | [diff] [blame] | 637 | |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 638 | mcp->chip.base = base; |
Linus Walleij | 9fb1f39 | 2013-12-04 14:42:46 +0100 | [diff] [blame] | 639 | mcp->chip.can_sleep = true; |
Peter Korsgaard | d62b98f | 2011-07-15 10:25:31 +0200 | [diff] [blame] | 640 | mcp->chip.dev = dev; |
Guennadi Liakhovetski | d72cbed | 2008-04-28 02:14:45 -0700 | [diff] [blame] | 641 | mcp->chip.owner = THIS_MODULE; |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 642 | |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 643 | /* verify MCP_IOCON.SEQOP = 0, so sequential reads work, |
| 644 | * and MCP_IOCON.HAEN = 1, so we work with all chips. |
| 645 | */ |
Lars Poeschel | 4e47f91 | 2014-01-16 11:44:15 +0100 | [diff] [blame] | 646 | |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 647 | status = mcp->ops->read(mcp, MCP_IOCON); |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 648 | if (status < 0) |
| 649 | goto fail; |
Lars Poeschel | 4e47f91 | 2014-01-16 11:44:15 +0100 | [diff] [blame] | 650 | |
| 651 | mcp->irq_controller = of_property_read_bool(mcp->chip.of_node, |
| 652 | "interrupt-controller"); |
| 653 | if (mcp->irq && mcp->irq_controller && (type == MCP_TYPE_017)) |
| 654 | mirror = of_property_read_bool(mcp->chip.of_node, |
| 655 | "microchip,irq-mirror"); |
| 656 | |
| 657 | if ((status & IOCON_SEQOP) || !(status & IOCON_HAEN) || mirror) { |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 658 | /* mcp23s17 has IOCON twice, make sure they are in sync */ |
| 659 | status &= ~(IOCON_SEQOP | (IOCON_SEQOP << 8)); |
| 660 | status |= IOCON_HAEN | (IOCON_HAEN << 8); |
Lars Poeschel | 4e47f91 | 2014-01-16 11:44:15 +0100 | [diff] [blame] | 661 | status &= ~(IOCON_INTPOL | (IOCON_INTPOL << 8)); |
| 662 | if (mirror) |
| 663 | status |= IOCON_MIRROR | (IOCON_MIRROR << 8); |
| 664 | |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 665 | status = mcp->ops->write(mcp, MCP_IOCON, status); |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 666 | if (status < 0) |
| 667 | goto fail; |
| 668 | } |
| 669 | |
| 670 | /* configure ~100K pullups */ |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 671 | status = mcp->ops->write(mcp, MCP_GPPU, pullups); |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 672 | if (status < 0) |
| 673 | goto fail; |
| 674 | |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 675 | status = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache)); |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 676 | if (status < 0) |
| 677 | goto fail; |
| 678 | |
| 679 | /* disable inverter on input */ |
| 680 | if (mcp->cache[MCP_IPOL] != 0) { |
| 681 | mcp->cache[MCP_IPOL] = 0; |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 682 | status = mcp->ops->write(mcp, MCP_IPOL, 0); |
| 683 | if (status < 0) |
| 684 | goto fail; |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 685 | } |
| 686 | |
| 687 | /* disable irqs */ |
| 688 | if (mcp->cache[MCP_GPINTEN] != 0) { |
| 689 | mcp->cache[MCP_GPINTEN] = 0; |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 690 | status = mcp->ops->write(mcp, MCP_GPINTEN, 0); |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 691 | if (status < 0) |
| 692 | goto fail; |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 693 | } |
| 694 | |
| 695 | status = gpiochip_add(&mcp->chip); |
Lars Poeschel | 4e47f91 | 2014-01-16 11:44:15 +0100 | [diff] [blame] | 696 | if (status < 0) |
| 697 | goto fail; |
| 698 | |
| 699 | if (mcp->irq && mcp->irq_controller) { |
| 700 | status = mcp23s08_irq_setup(mcp); |
| 701 | if (status) { |
| 702 | mcp23s08_irq_teardown(mcp); |
| 703 | goto fail; |
| 704 | } |
| 705 | } |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 706 | fail: |
| 707 | if (status < 0) |
Peter Korsgaard | d62b98f | 2011-07-15 10:25:31 +0200 | [diff] [blame] | 708 | dev_dbg(dev, "can't setup chip %d, --> %d\n", |
| 709 | addr, status); |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 710 | return status; |
| 711 | } |
| 712 | |
Peter Korsgaard | 752ad5e | 2011-07-15 10:25:32 +0200 | [diff] [blame] | 713 | /*----------------------------------------------------------------------*/ |
| 714 | |
Lars Poeschel | 97ddb1c | 2013-04-04 12:02:02 +0200 | [diff] [blame] | 715 | #ifdef CONFIG_OF |
| 716 | #ifdef CONFIG_SPI_MASTER |
Jingoo Han | ac79180 | 2014-05-07 18:05:17 +0900 | [diff] [blame] | 717 | static const struct of_device_id mcp23s08_spi_of_match[] = { |
Lars Poeschel | 97ddb1c | 2013-04-04 12:02:02 +0200 | [diff] [blame] | 718 | { |
Lars Poeschel | 4597168 | 2013-08-28 10:38:50 +0200 | [diff] [blame] | 719 | .compatible = "microchip,mcp23s08", |
| 720 | .data = (void *) MCP_TYPE_S08, |
Lars Poeschel | 97ddb1c | 2013-04-04 12:02:02 +0200 | [diff] [blame] | 721 | }, |
| 722 | { |
Lars Poeschel | 4597168 | 2013-08-28 10:38:50 +0200 | [diff] [blame] | 723 | .compatible = "microchip,mcp23s17", |
| 724 | .data = (void *) MCP_TYPE_S17, |
| 725 | }, |
| 726 | /* NOTE: The use of the mcp prefix is deprecated and will be removed. */ |
| 727 | { |
| 728 | .compatible = "mcp,mcp23s08", |
| 729 | .data = (void *) MCP_TYPE_S08, |
| 730 | }, |
| 731 | { |
| 732 | .compatible = "mcp,mcp23s17", |
| 733 | .data = (void *) MCP_TYPE_S17, |
Lars Poeschel | 97ddb1c | 2013-04-04 12:02:02 +0200 | [diff] [blame] | 734 | }, |
| 735 | { }, |
| 736 | }; |
| 737 | MODULE_DEVICE_TABLE(of, mcp23s08_spi_of_match); |
| 738 | #endif |
| 739 | |
| 740 | #if IS_ENABLED(CONFIG_I2C) |
Jingoo Han | ac79180 | 2014-05-07 18:05:17 +0900 | [diff] [blame] | 741 | static const struct of_device_id mcp23s08_i2c_of_match[] = { |
Lars Poeschel | 97ddb1c | 2013-04-04 12:02:02 +0200 | [diff] [blame] | 742 | { |
Lars Poeschel | 4597168 | 2013-08-28 10:38:50 +0200 | [diff] [blame] | 743 | .compatible = "microchip,mcp23008", |
| 744 | .data = (void *) MCP_TYPE_008, |
Lars Poeschel | 97ddb1c | 2013-04-04 12:02:02 +0200 | [diff] [blame] | 745 | }, |
| 746 | { |
Lars Poeschel | 4597168 | 2013-08-28 10:38:50 +0200 | [diff] [blame] | 747 | .compatible = "microchip,mcp23017", |
| 748 | .data = (void *) MCP_TYPE_017, |
| 749 | }, |
| 750 | /* NOTE: The use of the mcp prefix is deprecated and will be removed. */ |
| 751 | { |
| 752 | .compatible = "mcp,mcp23008", |
| 753 | .data = (void *) MCP_TYPE_008, |
| 754 | }, |
| 755 | { |
| 756 | .compatible = "mcp,mcp23017", |
| 757 | .data = (void *) MCP_TYPE_017, |
Lars Poeschel | 97ddb1c | 2013-04-04 12:02:02 +0200 | [diff] [blame] | 758 | }, |
| 759 | { }, |
| 760 | }; |
| 761 | MODULE_DEVICE_TABLE(of, mcp23s08_i2c_of_match); |
| 762 | #endif |
| 763 | #endif /* CONFIG_OF */ |
| 764 | |
| 765 | |
Daniel M. Weeks | cbf24fa | 2012-11-06 23:51:05 -0500 | [diff] [blame] | 766 | #if IS_ENABLED(CONFIG_I2C) |
Peter Korsgaard | 752ad5e | 2011-07-15 10:25:32 +0200 | [diff] [blame] | 767 | |
Bill Pemberton | 3836309 | 2012-11-19 13:22:34 -0500 | [diff] [blame] | 768 | static int mcp230xx_probe(struct i2c_client *client, |
Peter Korsgaard | 752ad5e | 2011-07-15 10:25:32 +0200 | [diff] [blame] | 769 | const struct i2c_device_id *id) |
| 770 | { |
| 771 | struct mcp23s08_platform_data *pdata; |
| 772 | struct mcp23s08 *mcp; |
Lars Poeschel | 97ddb1c | 2013-04-04 12:02:02 +0200 | [diff] [blame] | 773 | int status, base, pullups; |
| 774 | const struct of_device_id *match; |
Peter Korsgaard | 752ad5e | 2011-07-15 10:25:32 +0200 | [diff] [blame] | 775 | |
Lars Poeschel | 97ddb1c | 2013-04-04 12:02:02 +0200 | [diff] [blame] | 776 | match = of_match_device(of_match_ptr(mcp23s08_i2c_of_match), |
| 777 | &client->dev); |
Jingoo Han | e56aee1 | 2013-07-30 17:08:05 +0900 | [diff] [blame] | 778 | pdata = dev_get_platdata(&client->dev); |
Daniel M. Weeks | 8a56406 | 2013-07-19 00:19:58 -0400 | [diff] [blame] | 779 | if (match || !pdata) { |
Lars Poeschel | 97ddb1c | 2013-04-04 12:02:02 +0200 | [diff] [blame] | 780 | base = -1; |
| 781 | pullups = 0; |
Lars Poeschel | 4e47f91 | 2014-01-16 11:44:15 +0100 | [diff] [blame] | 782 | client->irq = irq_of_parse_and_map(client->dev.of_node, 0); |
Lars Poeschel | 97ddb1c | 2013-04-04 12:02:02 +0200 | [diff] [blame] | 783 | } else { |
Daniel M. Weeks | 8a56406 | 2013-07-19 00:19:58 -0400 | [diff] [blame] | 784 | if (!gpio_is_valid(pdata->base)) { |
| 785 | dev_dbg(&client->dev, "invalid platform data\n"); |
Lars Poeschel | 97ddb1c | 2013-04-04 12:02:02 +0200 | [diff] [blame] | 786 | return -EINVAL; |
| 787 | } |
| 788 | base = pdata->base; |
| 789 | pullups = pdata->chip[0].pullups; |
Peter Korsgaard | 752ad5e | 2011-07-15 10:25:32 +0200 | [diff] [blame] | 790 | } |
| 791 | |
Gary Servin | 33bc8411 | 2014-03-06 20:25:26 -0300 | [diff] [blame] | 792 | mcp = kzalloc(sizeof(*mcp), GFP_KERNEL); |
Peter Korsgaard | 752ad5e | 2011-07-15 10:25:32 +0200 | [diff] [blame] | 793 | if (!mcp) |
| 794 | return -ENOMEM; |
| 795 | |
Lars Poeschel | 4e47f91 | 2014-01-16 11:44:15 +0100 | [diff] [blame] | 796 | mcp->irq = client->irq; |
Peter Korsgaard | 752ad5e | 2011-07-15 10:25:32 +0200 | [diff] [blame] | 797 | status = mcp23s08_probe_one(mcp, &client->dev, client, client->addr, |
Lars Poeschel | 97ddb1c | 2013-04-04 12:02:02 +0200 | [diff] [blame] | 798 | id->driver_data, base, pullups); |
Peter Korsgaard | 752ad5e | 2011-07-15 10:25:32 +0200 | [diff] [blame] | 799 | if (status) |
| 800 | goto fail; |
| 801 | |
| 802 | i2c_set_clientdata(client, mcp); |
| 803 | |
| 804 | return 0; |
| 805 | |
| 806 | fail: |
| 807 | kfree(mcp); |
| 808 | |
| 809 | return status; |
| 810 | } |
| 811 | |
Bill Pemberton | 206210c | 2012-11-19 13:25:50 -0500 | [diff] [blame] | 812 | static int mcp230xx_remove(struct i2c_client *client) |
Peter Korsgaard | 752ad5e | 2011-07-15 10:25:32 +0200 | [diff] [blame] | 813 | { |
| 814 | struct mcp23s08 *mcp = i2c_get_clientdata(client); |
Peter Korsgaard | 752ad5e | 2011-07-15 10:25:32 +0200 | [diff] [blame] | 815 | |
Lars Poeschel | 4e47f91 | 2014-01-16 11:44:15 +0100 | [diff] [blame] | 816 | if (client->irq && mcp->irq_controller) |
| 817 | mcp23s08_irq_teardown(mcp); |
| 818 | |
abdoulaye berthe | 9f5132a | 2014-07-12 22:30:12 +0200 | [diff] [blame] | 819 | gpiochip_remove(&mcp->chip); |
| 820 | kfree(mcp); |
Peter Korsgaard | 752ad5e | 2011-07-15 10:25:32 +0200 | [diff] [blame] | 821 | |
abdoulaye berthe | 9f5132a | 2014-07-12 22:30:12 +0200 | [diff] [blame] | 822 | return 0; |
Peter Korsgaard | 752ad5e | 2011-07-15 10:25:32 +0200 | [diff] [blame] | 823 | } |
| 824 | |
| 825 | static const struct i2c_device_id mcp230xx_id[] = { |
| 826 | { "mcp23008", MCP_TYPE_008 }, |
| 827 | { "mcp23017", MCP_TYPE_017 }, |
| 828 | { }, |
| 829 | }; |
| 830 | MODULE_DEVICE_TABLE(i2c, mcp230xx_id); |
| 831 | |
| 832 | static struct i2c_driver mcp230xx_driver = { |
| 833 | .driver = { |
| 834 | .name = "mcp230xx", |
| 835 | .owner = THIS_MODULE, |
Lars Poeschel | 97ddb1c | 2013-04-04 12:02:02 +0200 | [diff] [blame] | 836 | .of_match_table = of_match_ptr(mcp23s08_i2c_of_match), |
Peter Korsgaard | 752ad5e | 2011-07-15 10:25:32 +0200 | [diff] [blame] | 837 | }, |
| 838 | .probe = mcp230xx_probe, |
Bill Pemberton | 8283c4f | 2012-11-19 13:20:08 -0500 | [diff] [blame] | 839 | .remove = mcp230xx_remove, |
Peter Korsgaard | 752ad5e | 2011-07-15 10:25:32 +0200 | [diff] [blame] | 840 | .id_table = mcp230xx_id, |
| 841 | }; |
| 842 | |
| 843 | static int __init mcp23s08_i2c_init(void) |
| 844 | { |
| 845 | return i2c_add_driver(&mcp230xx_driver); |
| 846 | } |
| 847 | |
| 848 | static void mcp23s08_i2c_exit(void) |
| 849 | { |
| 850 | i2c_del_driver(&mcp230xx_driver); |
| 851 | } |
| 852 | |
| 853 | #else |
| 854 | |
| 855 | static int __init mcp23s08_i2c_init(void) { return 0; } |
| 856 | static void mcp23s08_i2c_exit(void) { } |
| 857 | |
| 858 | #endif /* CONFIG_I2C */ |
| 859 | |
| 860 | /*----------------------------------------------------------------------*/ |
| 861 | |
Peter Korsgaard | d62b98f | 2011-07-15 10:25:31 +0200 | [diff] [blame] | 862 | #ifdef CONFIG_SPI_MASTER |
| 863 | |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 864 | static int mcp23s08_probe(struct spi_device *spi) |
| 865 | { |
| 866 | struct mcp23s08_platform_data *pdata; |
| 867 | unsigned addr; |
Linus Walleij | 596a1c5 | 2014-05-28 09:14:06 +0200 | [diff] [blame] | 868 | int chips = 0; |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 869 | struct mcp23s08_driver_data *data; |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 870 | int status, type; |
Lars Poeschel | 97ddb1c | 2013-04-04 12:02:02 +0200 | [diff] [blame] | 871 | unsigned base = -1, |
| 872 | ngpio = 0, |
| 873 | pullups[ARRAY_SIZE(pdata->chip)]; |
| 874 | const struct of_device_id *match; |
| 875 | u32 spi_present_mask = 0; |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 876 | |
Lars Poeschel | 97ddb1c | 2013-04-04 12:02:02 +0200 | [diff] [blame] | 877 | match = of_match_device(of_match_ptr(mcp23s08_spi_of_match), &spi->dev); |
| 878 | if (match) { |
SeongJae Park | de755c3 | 2014-01-18 13:53:04 +0900 | [diff] [blame] | 879 | type = (int)(uintptr_t)match->data; |
Lars Poeschel | 97ddb1c | 2013-04-04 12:02:02 +0200 | [diff] [blame] | 880 | status = of_property_read_u32(spi->dev.of_node, |
Lars Poeschel | 4597168 | 2013-08-28 10:38:50 +0200 | [diff] [blame] | 881 | "microchip,spi-present-mask", &spi_present_mask); |
Lars Poeschel | 97ddb1c | 2013-04-04 12:02:02 +0200 | [diff] [blame] | 882 | if (status) { |
Lars Poeschel | 4597168 | 2013-08-28 10:38:50 +0200 | [diff] [blame] | 883 | status = of_property_read_u32(spi->dev.of_node, |
| 884 | "mcp,spi-present-mask", &spi_present_mask); |
| 885 | if (status) { |
| 886 | dev_err(&spi->dev, |
| 887 | "DT has no spi-present-mask\n"); |
| 888 | return -ENODEV; |
| 889 | } |
Lars Poeschel | 97ddb1c | 2013-04-04 12:02:02 +0200 | [diff] [blame] | 890 | } |
| 891 | if ((spi_present_mask <= 0) || (spi_present_mask >= 256)) { |
| 892 | dev_err(&spi->dev, "invalid spi-present-mask\n"); |
| 893 | return -ENODEV; |
| 894 | } |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 895 | |
Michael Welling | 99e4b98 | 2014-04-16 20:00:24 -0500 | [diff] [blame] | 896 | for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) { |
Lars Poeschel | 97ddb1c | 2013-04-04 12:02:02 +0200 | [diff] [blame] | 897 | pullups[addr] = 0; |
Michael Stickel | 3e3bed9 | 2014-05-26 10:03:16 +0200 | [diff] [blame] | 898 | if (spi_present_mask & (1 << addr)) |
| 899 | chips++; |
Michael Welling | 99e4b98 | 2014-04-16 20:00:24 -0500 | [diff] [blame] | 900 | } |
Lars Poeschel | 97ddb1c | 2013-04-04 12:02:02 +0200 | [diff] [blame] | 901 | } else { |
| 902 | type = spi_get_device_id(spi)->driver_data; |
Jingoo Han | e56aee1 | 2013-07-30 17:08:05 +0900 | [diff] [blame] | 903 | pdata = dev_get_platdata(&spi->dev); |
Lars Poeschel | 97ddb1c | 2013-04-04 12:02:02 +0200 | [diff] [blame] | 904 | if (!pdata || !gpio_is_valid(pdata->base)) { |
| 905 | dev_dbg(&spi->dev, |
| 906 | "invalid or missing platform data\n"); |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 907 | return -EINVAL; |
| 908 | } |
Lars Poeschel | 97ddb1c | 2013-04-04 12:02:02 +0200 | [diff] [blame] | 909 | |
| 910 | for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) { |
| 911 | if (!pdata->chip[addr].is_present) |
| 912 | continue; |
| 913 | chips++; |
| 914 | if ((type == MCP_TYPE_S08) && (addr > 3)) { |
| 915 | dev_err(&spi->dev, |
| 916 | "mcp23s08 only supports address 0..3\n"); |
| 917 | return -EINVAL; |
| 918 | } |
| 919 | spi_present_mask |= 1 << addr; |
| 920 | pullups[addr] = pdata->chip[addr].pullups; |
| 921 | } |
| 922 | |
Lars Poeschel | 97ddb1c | 2013-04-04 12:02:02 +0200 | [diff] [blame] | 923 | base = pdata->base; |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 924 | } |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 925 | |
Michael Welling | 99e4b98 | 2014-04-16 20:00:24 -0500 | [diff] [blame] | 926 | if (!chips) |
| 927 | return -ENODEV; |
| 928 | |
Gary Servin | 33bc8411 | 2014-03-06 20:25:26 -0300 | [diff] [blame] | 929 | data = kzalloc(sizeof(*data) + chips * sizeof(struct mcp23s08), |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 930 | GFP_KERNEL); |
| 931 | if (!data) |
| 932 | return -ENOMEM; |
| 933 | spi_set_drvdata(spi, data); |
| 934 | |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 935 | for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) { |
Lars Poeschel | 97ddb1c | 2013-04-04 12:02:02 +0200 | [diff] [blame] | 936 | if (!(spi_present_mask & (1 << addr))) |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 937 | continue; |
| 938 | chips--; |
| 939 | data->mcp[addr] = &data->chip[chips]; |
Peter Korsgaard | d62b98f | 2011-07-15 10:25:31 +0200 | [diff] [blame] | 940 | status = mcp23s08_probe_one(data->mcp[addr], &spi->dev, spi, |
| 941 | 0x40 | (addr << 1), type, base, |
Lars Poeschel | 97ddb1c | 2013-04-04 12:02:02 +0200 | [diff] [blame] | 942 | pullups[addr]); |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 943 | if (status < 0) |
| 944 | goto fail; |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 945 | |
Lars Poeschel | 97ddb1c | 2013-04-04 12:02:02 +0200 | [diff] [blame] | 946 | if (base != -1) |
| 947 | base += (type == MCP_TYPE_S17) ? 16 : 8; |
| 948 | ngpio += (type == MCP_TYPE_S17) ? 16 : 8; |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 949 | } |
Lars Poeschel | 97ddb1c | 2013-04-04 12:02:02 +0200 | [diff] [blame] | 950 | data->ngpio = ngpio; |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 951 | |
| 952 | /* NOTE: these chips have a relatively sane IRQ framework, with |
| 953 | * per-signal masking and level/edge triggering. It's not yet |
| 954 | * handled here... |
| 955 | */ |
| 956 | |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 957 | return 0; |
| 958 | |
| 959 | fail: |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 960 | for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) { |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 961 | |
| 962 | if (!data->mcp[addr]) |
| 963 | continue; |
abdoulaye berthe | 9f5132a | 2014-07-12 22:30:12 +0200 | [diff] [blame] | 964 | gpiochip_remove(&data->mcp[addr]->chip); |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 965 | } |
| 966 | kfree(data); |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 967 | return status; |
| 968 | } |
| 969 | |
| 970 | static int mcp23s08_remove(struct spi_device *spi) |
| 971 | { |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 972 | struct mcp23s08_driver_data *data = spi_get_drvdata(spi); |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 973 | unsigned addr; |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 974 | |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 975 | for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) { |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 976 | |
| 977 | if (!data->mcp[addr]) |
| 978 | continue; |
| 979 | |
abdoulaye berthe | 9f5132a | 2014-07-12 22:30:12 +0200 | [diff] [blame] | 980 | gpiochip_remove(&data->mcp[addr]->chip); |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 981 | } |
abdoulaye berthe | 9f5132a | 2014-07-12 22:30:12 +0200 | [diff] [blame] | 982 | kfree(data); |
| 983 | return 0; |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 984 | } |
| 985 | |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 986 | static const struct spi_device_id mcp23s08_ids[] = { |
| 987 | { "mcp23s08", MCP_TYPE_S08 }, |
| 988 | { "mcp23s17", MCP_TYPE_S17 }, |
| 989 | { }, |
| 990 | }; |
| 991 | MODULE_DEVICE_TABLE(spi, mcp23s08_ids); |
| 992 | |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 993 | static struct spi_driver mcp23s08_driver = { |
| 994 | .probe = mcp23s08_probe, |
| 995 | .remove = mcp23s08_remove, |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 996 | .id_table = mcp23s08_ids, |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 997 | .driver = { |
| 998 | .name = "mcp23s08", |
| 999 | .owner = THIS_MODULE, |
Lars Poeschel | 97ddb1c | 2013-04-04 12:02:02 +0200 | [diff] [blame] | 1000 | .of_match_table = of_match_ptr(mcp23s08_spi_of_match), |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 1001 | }, |
| 1002 | }; |
| 1003 | |
Peter Korsgaard | d62b98f | 2011-07-15 10:25:31 +0200 | [diff] [blame] | 1004 | static int __init mcp23s08_spi_init(void) |
| 1005 | { |
| 1006 | return spi_register_driver(&mcp23s08_driver); |
| 1007 | } |
| 1008 | |
| 1009 | static void mcp23s08_spi_exit(void) |
| 1010 | { |
| 1011 | spi_unregister_driver(&mcp23s08_driver); |
| 1012 | } |
| 1013 | |
| 1014 | #else |
| 1015 | |
| 1016 | static int __init mcp23s08_spi_init(void) { return 0; } |
| 1017 | static void mcp23s08_spi_exit(void) { } |
| 1018 | |
| 1019 | #endif /* CONFIG_SPI_MASTER */ |
| 1020 | |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 1021 | /*----------------------------------------------------------------------*/ |
| 1022 | |
| 1023 | static int __init mcp23s08_init(void) |
| 1024 | { |
Peter Korsgaard | 752ad5e | 2011-07-15 10:25:32 +0200 | [diff] [blame] | 1025 | int ret; |
| 1026 | |
| 1027 | ret = mcp23s08_spi_init(); |
| 1028 | if (ret) |
| 1029 | goto spi_fail; |
| 1030 | |
| 1031 | ret = mcp23s08_i2c_init(); |
| 1032 | if (ret) |
| 1033 | goto i2c_fail; |
| 1034 | |
| 1035 | return 0; |
| 1036 | |
| 1037 | i2c_fail: |
| 1038 | mcp23s08_spi_exit(); |
| 1039 | spi_fail: |
| 1040 | return ret; |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 1041 | } |
Peter Korsgaard | 752ad5e | 2011-07-15 10:25:32 +0200 | [diff] [blame] | 1042 | /* register after spi/i2c postcore initcall and before |
David Brownell | 673c0c0 | 2008-10-15 22:02:46 -0700 | [diff] [blame] | 1043 | * subsys initcalls that may rely on these GPIOs |
| 1044 | */ |
| 1045 | subsys_initcall(mcp23s08_init); |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 1046 | |
| 1047 | static void __exit mcp23s08_exit(void) |
| 1048 | { |
Peter Korsgaard | d62b98f | 2011-07-15 10:25:31 +0200 | [diff] [blame] | 1049 | mcp23s08_spi_exit(); |
Peter Korsgaard | 752ad5e | 2011-07-15 10:25:32 +0200 | [diff] [blame] | 1050 | mcp23s08_i2c_exit(); |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 1051 | } |
| 1052 | module_exit(mcp23s08_exit); |
| 1053 | |
| 1054 | MODULE_LICENSE("GPL"); |