blob: cde9746cda8eceb7e144fa80ca77177c5e222df4 [file] [log] [blame]
Wu Fengguang079d88c2010-03-08 10:44:23 +08001/*
2 *
3 * patch_hdmi.c - routines for HDMI/DisplayPort codecs
4 *
5 * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
Takashi Iwai84eb01b2010-09-07 12:27:25 +02006 * Copyright (c) 2006 ATI Technologies Inc.
7 * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
8 * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
Anssi Hannula5a6135842013-10-24 21:10:35 +03009 * Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
Wu Fengguang079d88c2010-03-08 10:44:23 +080010 *
11 * Authors:
12 * Wu Fengguang <wfg@linux.intel.com>
13 *
14 * Maintained by:
15 * Wu Fengguang <wfg@linux.intel.com>
16 *
17 * This program is free software; you can redistribute it and/or modify it
18 * under the terms of the GNU General Public License as published by the Free
19 * Software Foundation; either version 2 of the License, or (at your option)
20 * any later version.
21 *
22 * This program is distributed in the hope that it will be useful, but
23 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
24 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
25 * for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software Foundation,
29 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
30 */
31
Takashi Iwai84eb01b2010-09-07 12:27:25 +020032#include <linux/init.h>
33#include <linux/delay.h>
34#include <linux/slab.h>
Paul Gortmaker65a77212011-07-15 13:13:37 -040035#include <linux/module.h>
Takashi Iwai84eb01b2010-09-07 12:27:25 +020036#include <sound/core.h>
David Henningsson07acecc2011-05-19 11:46:03 +020037#include <sound/jack.h>
Wang Xingchao433968d2012-09-06 10:02:37 +080038#include <sound/asoundef.h>
Takashi Iwaid45e6882012-07-31 11:36:00 +020039#include <sound/tlv.h>
David Henningsson25adc132015-08-19 10:48:58 +020040#include <sound/hdaudio.h>
41#include <sound/hda_i915.h>
Subhransu S. Prusty67b90cb2016-03-04 19:59:46 +053042#include <sound/hda_chmap.h>
Takashi Iwai84eb01b2010-09-07 12:27:25 +020043#include "hda_codec.h"
44#include "hda_local.h"
Takashi Iwai1835a0f2011-10-27 22:12:46 +020045#include "hda_jack.h"
Takashi Iwai84eb01b2010-09-07 12:27:25 +020046
Takashi Iwai0ebaa242011-01-11 18:11:04 +010047static bool static_hdmi_pcm;
48module_param(static_hdmi_pcm, bool, 0644);
49MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
50
Takashi Iwai7639a062015-03-03 10:07:24 +010051#define is_haswell(codec) ((codec)->core.vendor_id == 0x80862807)
52#define is_broadwell(codec) ((codec)->core.vendor_id == 0x80862808)
53#define is_skylake(codec) ((codec)->core.vendor_id == 0x80862809)
Lu, Hane2656412015-11-11 16:54:27 +080054#define is_broxton(codec) ((codec)->core.vendor_id == 0x8086280a)
Libin Yang91815d82016-01-14 14:09:00 +080055#define is_kabylake(codec) ((codec)->core.vendor_id == 0x8086280b)
Libin Yang432ac1a2014-12-16 13:17:34 +080056#define is_haswell_plus(codec) (is_haswell(codec) || is_broadwell(codec) \
Libin Yang91815d82016-01-14 14:09:00 +080057 || is_skylake(codec) || is_broxton(codec) \
58 || is_kabylake(codec))
Mengdong Lin75dcbe42014-01-08 15:55:32 -050059
Takashi Iwai7639a062015-03-03 10:07:24 +010060#define is_valleyview(codec) ((codec)->core.vendor_id == 0x80862882)
61#define is_cherryview(codec) ((codec)->core.vendor_id == 0x80862883)
Libin Yangca2e7222014-08-19 16:20:12 +080062#define is_valleyview_plus(codec) (is_valleyview(codec) || is_cherryview(codec))
Mengdong Linfb87fa32013-09-04 16:36:57 -040063
Stephen Warren384a48d2011-06-01 11:14:21 -060064struct hdmi_spec_per_cvt {
65 hda_nid_t cvt_nid;
66 int assigned;
67 unsigned int channels_min;
68 unsigned int channels_max;
69 u32 rates;
70 u64 formats;
71 unsigned int maxbps;
72};
73
Takashi Iwai4eea3092013-02-07 18:18:19 +010074/* max. connections to a widget */
75#define HDA_MAX_CONNECTIONS 32
76
Stephen Warren384a48d2011-06-01 11:14:21 -060077struct hdmi_spec_per_pin {
78 hda_nid_t pin_nid;
Libin Yanga76056f2015-12-16 16:48:15 +080079 /* pin idx, different device entries on the same pin use the same idx */
80 int pin_nid_idx;
Stephen Warren384a48d2011-06-01 11:14:21 -060081 int num_mux_nids;
82 hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
Mengdong Lin2df67422014-03-20 13:01:06 +080083 int mux_idx;
Anssi Hannula1df5a062013-10-05 02:25:40 +030084 hda_nid_t cvt_nid;
Wu Fengguang744626d2011-11-16 16:29:47 +080085
86 struct hda_codec *codec;
Stephen Warren384a48d2011-06-01 11:14:21 -060087 struct hdmi_eld sink_eld;
Takashi Iwaia4e9a382013-10-17 18:21:12 +020088 struct mutex lock;
Wu Fengguang744626d2011-11-16 16:29:47 +080089 struct delayed_work work;
Libin Yang2bea2412016-01-12 11:13:26 +080090 struct hdmi_pcm *pcm; /* pointer to spec->pcm_rec[n] dynamically*/
Libin Yanga76056f2015-12-16 16:48:15 +080091 int pcm_idx; /* which pcm is attached. -1 means no pcm is attached */
Wu Fengguangc6e84532011-11-18 16:59:32 -060092 int repoll_count;
Takashi Iwaib0540872013-09-02 12:33:02 +020093 bool setup; /* the stream has been set up by prepare callback */
94 int channels; /* current number of channels */
Takashi Iwai1a6003b2012-09-06 17:42:08 +020095 bool non_pcm;
Takashi Iwaid45e6882012-07-31 11:36:00 +020096 bool chmap_set; /* channel-map override by ALSA API? */
97 unsigned char chmap[8]; /* ALSA API channel-map */
Jie Yangcd6a6502015-05-27 19:45:45 +080098#ifdef CONFIG_SND_PROC_FS
Takashi Iwaia4e9a382013-10-17 18:21:12 +020099 struct snd_info_entry *proc_entry;
100#endif
Stephen Warren384a48d2011-06-01 11:14:21 -0600101};
102
Anssi Hannula307229d2013-10-24 21:10:34 +0300103/* operations used by generic code that can be overridden by patches */
104struct hdmi_ops {
105 int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
106 unsigned char *buf, int *eld_size);
107
Anssi Hannula307229d2013-10-24 21:10:34 +0300108 void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
109 int ca, int active_channels, int conn_type);
110
111 /* enable/disable HBR (HD passthrough) */
112 int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid, bool hbr);
113
114 int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
115 hda_nid_t pin_nid, u32 stream_tag, int format);
116
Anssi Hannula307229d2013-10-24 21:10:34 +0300117};
118
Libin Yang2bea2412016-01-12 11:13:26 +0800119struct hdmi_pcm {
120 struct hda_pcm *pcm;
121 struct snd_jack *jack;
Libin Yangfb087ea2016-02-23 16:33:37 +0800122 struct snd_kcontrol *eld_ctl;
Libin Yang2bea2412016-01-12 11:13:26 +0800123};
124
Wu Fengguang079d88c2010-03-08 10:44:23 +0800125struct hdmi_spec {
126 int num_cvts;
Takashi Iwaibce0d2a2013-03-13 14:40:31 +0100127 struct snd_array cvts; /* struct hdmi_spec_per_cvt */
128 hda_nid_t cvt_nids[4]; /* only for haswell fix */
Stephen Warren384a48d2011-06-01 11:14:21 -0600129
Wu Fengguang079d88c2010-03-08 10:44:23 +0800130 int num_pins;
Takashi Iwaibce0d2a2013-03-13 14:40:31 +0100131 struct snd_array pins; /* struct hdmi_spec_per_pin */
Libin Yang2bea2412016-01-12 11:13:26 +0800132 struct hdmi_pcm pcm_rec[16];
Libin Yang42b29872015-12-16 13:42:42 +0800133 struct mutex pcm_lock;
Libin Yanga76056f2015-12-16 16:48:15 +0800134 /* pcm_bitmap means which pcms have been assigned to pins*/
135 unsigned long pcm_bitmap;
Libin Yang2bf3c852015-12-16 13:42:43 +0800136 int pcm_used; /* counter of pcm_rec[] */
Libin Yangac983792015-12-16 16:48:16 +0800137 /* bitmap shows whether the pcm is opened in user space
138 * bit 0 means the first playback PCM (PCM3);
139 * bit 1 means the second playback PCM, and so on.
140 */
141 unsigned long pcm_in_use;
Wu Fengguang079d88c2010-03-08 10:44:23 +0800142
David Henningsson4bd038f2013-02-19 16:11:25 +0100143 struct hdmi_eld temp_eld;
Anssi Hannula307229d2013-10-24 21:10:34 +0300144 struct hdmi_ops ops;
Stephen Warren75fae112014-01-30 11:52:16 -0700145
146 bool dyn_pin_out;
Libin Yang6590faa2015-12-16 13:42:41 +0800147 bool dyn_pcm_assign;
Wu Fengguang079d88c2010-03-08 10:44:23 +0800148 /*
Anssi Hannula5a6135842013-10-24 21:10:35 +0300149 * Non-generic VIA/NVIDIA specific
Wu Fengguang079d88c2010-03-08 10:44:23 +0800150 */
151 struct hda_multi_out multiout;
Takashi Iwaid0b12522012-06-15 14:34:42 +0200152 struct hda_pcm_stream pcm_playback;
David Henningsson25adc132015-08-19 10:48:58 +0200153
154 /* i915/powerwell (Haswell+/Valleyview+) specific */
155 struct i915_audio_component_audio_ops i915_audio_ops;
Takashi Iwai55913112015-12-10 13:03:29 +0100156 bool i915_bound; /* was i915 bound in this driver? */
Subhransu S. Prusty67b90cb2016-03-04 19:59:46 +0530157
158 struct hdac_chmap chmap;
Wu Fengguang079d88c2010-03-08 10:44:23 +0800159};
160
Takashi Iwaif4e30402015-12-10 13:01:28 +0100161#ifdef CONFIG_SND_HDA_I915
Takashi Iwai66032492015-12-01 16:49:35 +0100162#define codec_has_acomp(codec) \
163 ((codec)->bus->core.audio_component != NULL)
Takashi Iwaif4e30402015-12-10 13:01:28 +0100164#else
165#define codec_has_acomp(codec) false
166#endif
Wu Fengguang079d88c2010-03-08 10:44:23 +0800167
168struct hdmi_audio_infoframe {
169 u8 type; /* 0x84 */
170 u8 ver; /* 0x01 */
171 u8 len; /* 0x0a */
172
Wu Fengguang53d7d692010-09-21 14:25:49 +0800173 u8 checksum;
174
Wu Fengguang079d88c2010-03-08 10:44:23 +0800175 u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
176 u8 SS01_SF24;
177 u8 CXT04;
178 u8 CA;
179 u8 LFEPBL01_LSV36_DM_INH7;
Wu Fengguang53d7d692010-09-21 14:25:49 +0800180};
181
182struct dp_audio_infoframe {
183 u8 type; /* 0x84 */
184 u8 len; /* 0x1b */
185 u8 ver; /* 0x11 << 2 */
186
187 u8 CC02_CT47; /* match with HDMI infoframe from this on */
188 u8 SS01_SF24;
189 u8 CXT04;
190 u8 CA;
191 u8 LFEPBL01_LSV36_DM_INH7;
Wu Fengguang079d88c2010-03-08 10:44:23 +0800192};
193
Takashi Iwai2b203db2011-02-11 12:17:30 +0100194union audio_infoframe {
195 struct hdmi_audio_infoframe hdmi;
196 struct dp_audio_infoframe dp;
197 u8 bytes[0];
198};
199
Wu Fengguang079d88c2010-03-08 10:44:23 +0800200/*
Wu Fengguang079d88c2010-03-08 10:44:23 +0800201 * HDMI routines
202 */
203
Takashi Iwaibce0d2a2013-03-13 14:40:31 +0100204#define get_pin(spec, idx) \
205 ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
206#define get_cvt(spec, idx) \
207 ((struct hdmi_spec_per_cvt *)snd_array_elem(&spec->cvts, idx))
Libin Yang2bea2412016-01-12 11:13:26 +0800208/* obtain hdmi_pcm object assigned to idx */
209#define get_hdmi_pcm(spec, idx) (&(spec)->pcm_rec[idx])
210/* obtain hda_pcm object assigned to idx */
211#define get_pcm_rec(spec, idx) (get_hdmi_pcm(spec, idx)->pcm)
Takashi Iwaibce0d2a2013-03-13 14:40:31 +0100212
Takashi Iwai4e76a882014-02-25 12:21:03 +0100213static int pin_nid_to_pin_index(struct hda_codec *codec, hda_nid_t pin_nid)
Wu Fengguang079d88c2010-03-08 10:44:23 +0800214{
Takashi Iwai4e76a882014-02-25 12:21:03 +0100215 struct hdmi_spec *spec = codec->spec;
Stephen Warren384a48d2011-06-01 11:14:21 -0600216 int pin_idx;
Wu Fengguang079d88c2010-03-08 10:44:23 +0800217
Stephen Warren384a48d2011-06-01 11:14:21 -0600218 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
Takashi Iwaibce0d2a2013-03-13 14:40:31 +0100219 if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
Stephen Warren384a48d2011-06-01 11:14:21 -0600220 return pin_idx;
Wu Fengguang079d88c2010-03-08 10:44:23 +0800221
Takashi Iwai4e76a882014-02-25 12:21:03 +0100222 codec_warn(codec, "HDMI: pin nid %d not registered\n", pin_nid);
Stephen Warren384a48d2011-06-01 11:14:21 -0600223 return -EINVAL;
224}
225
Libin Yang2bf3c852015-12-16 13:42:43 +0800226static int hinfo_to_pcm_index(struct hda_codec *codec,
227 struct hda_pcm_stream *hinfo)
228{
229 struct hdmi_spec *spec = codec->spec;
230 int pcm_idx;
231
232 for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++)
233 if (get_pcm_rec(spec, pcm_idx)->stream == hinfo)
234 return pcm_idx;
235
236 codec_warn(codec, "HDMI: hinfo %p not registered\n", hinfo);
237 return -EINVAL;
238}
239
Takashi Iwai4e76a882014-02-25 12:21:03 +0100240static int hinfo_to_pin_index(struct hda_codec *codec,
Stephen Warren384a48d2011-06-01 11:14:21 -0600241 struct hda_pcm_stream *hinfo)
242{
Takashi Iwai4e76a882014-02-25 12:21:03 +0100243 struct hdmi_spec *spec = codec->spec;
Libin Yang6590faa2015-12-16 13:42:41 +0800244 struct hdmi_spec_per_pin *per_pin;
Stephen Warren384a48d2011-06-01 11:14:21 -0600245 int pin_idx;
246
Libin Yang6590faa2015-12-16 13:42:41 +0800247 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
248 per_pin = get_pin(spec, pin_idx);
Libin Yang2bea2412016-01-12 11:13:26 +0800249 if (per_pin->pcm &&
250 per_pin->pcm->pcm->stream == hinfo)
Stephen Warren384a48d2011-06-01 11:14:21 -0600251 return pin_idx;
Libin Yang6590faa2015-12-16 13:42:41 +0800252 }
Stephen Warren384a48d2011-06-01 11:14:21 -0600253
Libin Yang6590faa2015-12-16 13:42:41 +0800254 codec_dbg(codec, "HDMI: hinfo %p not registered\n", hinfo);
Stephen Warren384a48d2011-06-01 11:14:21 -0600255 return -EINVAL;
256}
257
Libin Yang022f3442016-02-03 10:48:34 +0800258static struct hdmi_spec_per_pin *pcm_idx_to_pin(struct hdmi_spec *spec,
259 int pcm_idx)
260{
261 int i;
262 struct hdmi_spec_per_pin *per_pin;
263
264 for (i = 0; i < spec->num_pins; i++) {
265 per_pin = get_pin(spec, i);
266 if (per_pin->pcm_idx == pcm_idx)
267 return per_pin;
268 }
269 return NULL;
270}
271
Takashi Iwai4e76a882014-02-25 12:21:03 +0100272static int cvt_nid_to_cvt_index(struct hda_codec *codec, hda_nid_t cvt_nid)
Stephen Warren384a48d2011-06-01 11:14:21 -0600273{
Takashi Iwai4e76a882014-02-25 12:21:03 +0100274 struct hdmi_spec *spec = codec->spec;
Stephen Warren384a48d2011-06-01 11:14:21 -0600275 int cvt_idx;
276
277 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
Takashi Iwaibce0d2a2013-03-13 14:40:31 +0100278 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
Stephen Warren384a48d2011-06-01 11:14:21 -0600279 return cvt_idx;
280
Takashi Iwai4e76a882014-02-25 12:21:03 +0100281 codec_warn(codec, "HDMI: cvt nid %d not registered\n", cvt_nid);
Wu Fengguang079d88c2010-03-08 10:44:23 +0800282 return -EINVAL;
283}
284
Pierre-Louis Bossart14bc52b2011-09-30 16:35:41 -0500285static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
286 struct snd_ctl_elem_info *uinfo)
287{
288 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
David Henningsson68e03de2013-02-19 16:11:23 +0100289 struct hdmi_spec *spec = codec->spec;
Takashi Iwaia4e9a382013-10-17 18:21:12 +0200290 struct hdmi_spec_per_pin *per_pin;
David Henningsson68e03de2013-02-19 16:11:23 +0100291 struct hdmi_eld *eld;
Libin Yangfb087ea2016-02-23 16:33:37 +0800292 int pcm_idx;
Pierre-Louis Bossart14bc52b2011-09-30 16:35:41 -0500293
Pierre-Louis Bossart14bc52b2011-09-30 16:35:41 -0500294 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
295
Libin Yangfb087ea2016-02-23 16:33:37 +0800296 pcm_idx = kcontrol->private_value;
297 mutex_lock(&spec->pcm_lock);
298 per_pin = pcm_idx_to_pin(spec, pcm_idx);
299 if (!per_pin) {
300 /* no pin is bound to the pcm */
301 uinfo->count = 0;
302 mutex_unlock(&spec->pcm_lock);
303 return 0;
304 }
Takashi Iwaia4e9a382013-10-17 18:21:12 +0200305 eld = &per_pin->sink_eld;
David Henningsson68e03de2013-02-19 16:11:23 +0100306 uinfo->count = eld->eld_valid ? eld->eld_size : 0;
Libin Yangfb087ea2016-02-23 16:33:37 +0800307 mutex_unlock(&spec->pcm_lock);
Pierre-Louis Bossart14bc52b2011-09-30 16:35:41 -0500308
309 return 0;
310}
311
312static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
313 struct snd_ctl_elem_value *ucontrol)
314{
315 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
David Henningsson68e03de2013-02-19 16:11:23 +0100316 struct hdmi_spec *spec = codec->spec;
Takashi Iwaia4e9a382013-10-17 18:21:12 +0200317 struct hdmi_spec_per_pin *per_pin;
David Henningsson68e03de2013-02-19 16:11:23 +0100318 struct hdmi_eld *eld;
Libin Yangfb087ea2016-02-23 16:33:37 +0800319 int pcm_idx;
Pierre-Louis Bossart14bc52b2011-09-30 16:35:41 -0500320
Libin Yangfb087ea2016-02-23 16:33:37 +0800321 pcm_idx = kcontrol->private_value;
322 mutex_lock(&spec->pcm_lock);
323 per_pin = pcm_idx_to_pin(spec, pcm_idx);
324 if (!per_pin) {
325 /* no pin is bound to the pcm */
326 memset(ucontrol->value.bytes.data, 0,
327 ARRAY_SIZE(ucontrol->value.bytes.data));
328 mutex_unlock(&spec->pcm_lock);
329 return 0;
330 }
Takashi Iwaia4e9a382013-10-17 18:21:12 +0200331 eld = &per_pin->sink_eld;
Pierre-Louis Bossart14bc52b2011-09-30 16:35:41 -0500332
David Henningsson360a8242016-02-05 09:05:41 +0100333 if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data) ||
334 eld->eld_size > ELD_MAX_SIZE) {
Libin Yangfb087ea2016-02-23 16:33:37 +0800335 mutex_unlock(&spec->pcm_lock);
David Henningsson68e03de2013-02-19 16:11:23 +0100336 snd_BUG();
337 return -EINVAL;
338 }
339
340 memset(ucontrol->value.bytes.data, 0,
341 ARRAY_SIZE(ucontrol->value.bytes.data));
342 if (eld->eld_valid)
343 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
344 eld->eld_size);
Libin Yangfb087ea2016-02-23 16:33:37 +0800345 mutex_unlock(&spec->pcm_lock);
Pierre-Louis Bossart14bc52b2011-09-30 16:35:41 -0500346
347 return 0;
348}
349
350static struct snd_kcontrol_new eld_bytes_ctl = {
351 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
352 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
353 .name = "ELD",
354 .info = hdmi_eld_ctl_info,
355 .get = hdmi_eld_ctl_get,
356};
357
Libin Yangfb087ea2016-02-23 16:33:37 +0800358static int hdmi_create_eld_ctl(struct hda_codec *codec, int pcm_idx,
Pierre-Louis Bossart14bc52b2011-09-30 16:35:41 -0500359 int device)
360{
361 struct snd_kcontrol *kctl;
362 struct hdmi_spec *spec = codec->spec;
363 int err;
364
365 kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
366 if (!kctl)
367 return -ENOMEM;
Libin Yangfb087ea2016-02-23 16:33:37 +0800368 kctl->private_value = pcm_idx;
Pierre-Louis Bossart14bc52b2011-09-30 16:35:41 -0500369 kctl->id.device = device;
370
Libin Yangfb087ea2016-02-23 16:33:37 +0800371 /* no pin nid is associated with the kctl now
372 * tbd: associate pin nid to eld ctl later
373 */
374 err = snd_hda_ctl_add(codec, 0, kctl);
Pierre-Louis Bossart14bc52b2011-09-30 16:35:41 -0500375 if (err < 0)
376 return err;
377
Libin Yangfb087ea2016-02-23 16:33:37 +0800378 get_hdmi_pcm(spec, pcm_idx)->eld_ctl = kctl;
Pierre-Louis Bossart14bc52b2011-09-30 16:35:41 -0500379 return 0;
380}
381
Wu Fengguang079d88c2010-03-08 10:44:23 +0800382#ifdef BE_PARANOID
383static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
384 int *packet_index, int *byte_index)
385{
386 int val;
387
388 val = snd_hda_codec_read(codec, pin_nid, 0,
389 AC_VERB_GET_HDMI_DIP_INDEX, 0);
390
391 *packet_index = val >> 5;
392 *byte_index = val & 0x1f;
393}
394#endif
395
396static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
397 int packet_index, int byte_index)
398{
399 int val;
400
401 val = (packet_index << 5) | (byte_index & 0x1f);
402
403 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
404}
405
406static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
407 unsigned char val)
408{
409 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
410}
411
Stephen Warren384a48d2011-06-01 11:14:21 -0600412static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
Wu Fengguang079d88c2010-03-08 10:44:23 +0800413{
Stephen Warren75fae112014-01-30 11:52:16 -0700414 struct hdmi_spec *spec = codec->spec;
415 int pin_out;
416
Wu Fengguang079d88c2010-03-08 10:44:23 +0800417 /* Unmute */
418 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
419 snd_hda_codec_write(codec, pin_nid, 0,
420 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
Stephen Warren75fae112014-01-30 11:52:16 -0700421
422 if (spec->dyn_pin_out)
423 /* Disable pin out until stream is active */
424 pin_out = 0;
425 else
426 /* Enable pin out: some machines with GM965 gets broken output
427 * when the pin is disabled or changed while using with HDMI
428 */
429 pin_out = PIN_OUT;
430
Wu Fengguang079d88c2010-03-08 10:44:23 +0800431 snd_hda_codec_write(codec, pin_nid, 0,
Stephen Warren75fae112014-01-30 11:52:16 -0700432 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
Wu Fengguang079d88c2010-03-08 10:44:23 +0800433}
434
Takashi Iwaia4e9a382013-10-17 18:21:12 +0200435/*
436 * ELD proc files
437 */
438
Jie Yangcd6a6502015-05-27 19:45:45 +0800439#ifdef CONFIG_SND_PROC_FS
Takashi Iwaia4e9a382013-10-17 18:21:12 +0200440static void print_eld_info(struct snd_info_entry *entry,
441 struct snd_info_buffer *buffer)
442{
443 struct hdmi_spec_per_pin *per_pin = entry->private_data;
444
445 mutex_lock(&per_pin->lock);
446 snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
447 mutex_unlock(&per_pin->lock);
448}
449
450static void write_eld_info(struct snd_info_entry *entry,
451 struct snd_info_buffer *buffer)
452{
453 struct hdmi_spec_per_pin *per_pin = entry->private_data;
454
455 mutex_lock(&per_pin->lock);
456 snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
457 mutex_unlock(&per_pin->lock);
458}
459
460static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
461{
462 char name[32];
463 struct hda_codec *codec = per_pin->codec;
464 struct snd_info_entry *entry;
465 int err;
466
467 snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
Takashi Iwai6efdd852015-02-27 16:09:22 +0100468 err = snd_card_proc_new(codec->card, name, &entry);
Takashi Iwaia4e9a382013-10-17 18:21:12 +0200469 if (err < 0)
470 return err;
471
472 snd_info_set_text_ops(entry, per_pin, print_eld_info);
473 entry->c.text.write = write_eld_info;
474 entry->mode |= S_IWUSR;
475 per_pin->proc_entry = entry;
476
477 return 0;
478}
479
480static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
481{
Markus Elfring1947a112015-06-28 11:15:28 +0200482 if (!per_pin->codec->bus->shutdown) {
Takashi Iwaic560a672015-04-22 18:26:38 +0200483 snd_info_free_entry(per_pin->proc_entry);
Takashi Iwaia4e9a382013-10-17 18:21:12 +0200484 per_pin->proc_entry = NULL;
485 }
486}
487#else
Takashi Iwaib55447a2013-10-21 16:31:45 +0200488static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
489 int index)
Takashi Iwaia4e9a382013-10-17 18:21:12 +0200490{
491 return 0;
492}
Takashi Iwaib55447a2013-10-21 16:31:45 +0200493static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
Takashi Iwaia4e9a382013-10-17 18:21:12 +0200494{
495}
496#endif
Wu Fengguang079d88c2010-03-08 10:44:23 +0800497
498/*
Wu Fengguang079d88c2010-03-08 10:44:23 +0800499 * Audio InfoFrame routines
500 */
501
502/*
503 * Enable Audio InfoFrame Transmission
504 */
505static void hdmi_start_infoframe_trans(struct hda_codec *codec,
506 hda_nid_t pin_nid)
507{
508 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
509 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
510 AC_DIPXMIT_BEST);
511}
512
513/*
514 * Disable Audio InfoFrame Transmission
515 */
516static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
517 hda_nid_t pin_nid)
518{
519 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
520 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
521 AC_DIPXMIT_DISABLE);
522}
523
524static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
525{
526#ifdef CONFIG_SND_DEBUG_VERBOSE
527 int i;
528 int size;
529
530 size = snd_hdmi_get_eld_size(codec, pin_nid);
Takashi Iwai4e76a882014-02-25 12:21:03 +0100531 codec_dbg(codec, "HDMI: ELD buf size is %d\n", size);
Wu Fengguang079d88c2010-03-08 10:44:23 +0800532
533 for (i = 0; i < 8; i++) {
534 size = snd_hda_codec_read(codec, pin_nid, 0,
535 AC_VERB_GET_HDMI_DIP_SIZE, i);
Takashi Iwai4e76a882014-02-25 12:21:03 +0100536 codec_dbg(codec, "HDMI: DIP GP[%d] buf size is %d\n", i, size);
Wu Fengguang079d88c2010-03-08 10:44:23 +0800537 }
538#endif
539}
540
541static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
542{
543#ifdef BE_PARANOID
544 int i, j;
545 int size;
546 int pi, bi;
547 for (i = 0; i < 8; i++) {
548 size = snd_hda_codec_read(codec, pin_nid, 0,
549 AC_VERB_GET_HDMI_DIP_SIZE, i);
550 if (size == 0)
551 continue;
552
553 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
554 for (j = 1; j < 1000; j++) {
555 hdmi_write_dip_byte(codec, pin_nid, 0x0);
556 hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
557 if (pi != i)
Takashi Iwai4e76a882014-02-25 12:21:03 +0100558 codec_dbg(codec, "dip index %d: %d != %d\n",
Wu Fengguang079d88c2010-03-08 10:44:23 +0800559 bi, pi, i);
560 if (bi == 0) /* byte index wrapped around */
561 break;
562 }
Takashi Iwai4e76a882014-02-25 12:21:03 +0100563 codec_dbg(codec,
Wu Fengguang079d88c2010-03-08 10:44:23 +0800564 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
565 i, size, j);
566 }
567#endif
568}
569
Wu Fengguang53d7d692010-09-21 14:25:49 +0800570static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
Wu Fengguang079d88c2010-03-08 10:44:23 +0800571{
Wu Fengguang53d7d692010-09-21 14:25:49 +0800572 u8 *bytes = (u8 *)hdmi_ai;
Wu Fengguang079d88c2010-03-08 10:44:23 +0800573 u8 sum = 0;
574 int i;
575
Wu Fengguang53d7d692010-09-21 14:25:49 +0800576 hdmi_ai->checksum = 0;
Wu Fengguang079d88c2010-03-08 10:44:23 +0800577
Wu Fengguang53d7d692010-09-21 14:25:49 +0800578 for (i = 0; i < sizeof(*hdmi_ai); i++)
Wu Fengguang079d88c2010-03-08 10:44:23 +0800579 sum += bytes[i];
580
Wu Fengguang53d7d692010-09-21 14:25:49 +0800581 hdmi_ai->checksum = -sum;
Wu Fengguang079d88c2010-03-08 10:44:23 +0800582}
583
584static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
585 hda_nid_t pin_nid,
Wu Fengguang53d7d692010-09-21 14:25:49 +0800586 u8 *dip, int size)
Wu Fengguang079d88c2010-03-08 10:44:23 +0800587{
Wu Fengguang079d88c2010-03-08 10:44:23 +0800588 int i;
589
590 hdmi_debug_dip_size(codec, pin_nid);
591 hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
592
Wu Fengguang079d88c2010-03-08 10:44:23 +0800593 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
Wu Fengguang53d7d692010-09-21 14:25:49 +0800594 for (i = 0; i < size; i++)
595 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
Wu Fengguang079d88c2010-03-08 10:44:23 +0800596}
597
598static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
Wu Fengguang53d7d692010-09-21 14:25:49 +0800599 u8 *dip, int size)
Wu Fengguang079d88c2010-03-08 10:44:23 +0800600{
Wu Fengguang079d88c2010-03-08 10:44:23 +0800601 u8 val;
602 int i;
603
604 if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
605 != AC_DIPXMIT_BEST)
606 return false;
607
608 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
Wu Fengguang53d7d692010-09-21 14:25:49 +0800609 for (i = 0; i < size; i++) {
Wu Fengguang079d88c2010-03-08 10:44:23 +0800610 val = snd_hda_codec_read(codec, pin_nid, 0,
611 AC_VERB_GET_HDMI_DIP_DATA, 0);
Wu Fengguang53d7d692010-09-21 14:25:49 +0800612 if (val != dip[i])
Wu Fengguang079d88c2010-03-08 10:44:23 +0800613 return false;
614 }
615
616 return true;
617}
618
Anssi Hannula307229d2013-10-24 21:10:34 +0300619static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
620 hda_nid_t pin_nid,
621 int ca, int active_channels,
622 int conn_type)
623{
624 union audio_infoframe ai;
625
Mengdong Lincaaf5ef2014-03-11 17:12:52 -0400626 memset(&ai, 0, sizeof(ai));
Anssi Hannula307229d2013-10-24 21:10:34 +0300627 if (conn_type == 0) { /* HDMI */
628 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
629
630 hdmi_ai->type = 0x84;
631 hdmi_ai->ver = 0x01;
632 hdmi_ai->len = 0x0a;
633 hdmi_ai->CC02_CT47 = active_channels - 1;
634 hdmi_ai->CA = ca;
635 hdmi_checksum_audio_infoframe(hdmi_ai);
636 } else if (conn_type == 1) { /* DisplayPort */
637 struct dp_audio_infoframe *dp_ai = &ai.dp;
638
639 dp_ai->type = 0x84;
640 dp_ai->len = 0x1b;
641 dp_ai->ver = 0x11 << 2;
642 dp_ai->CC02_CT47 = active_channels - 1;
643 dp_ai->CA = ca;
644 } else {
Takashi Iwai4e76a882014-02-25 12:21:03 +0100645 codec_dbg(codec, "HDMI: unknown connection type at pin %d\n",
Anssi Hannula307229d2013-10-24 21:10:34 +0300646 pin_nid);
647 return;
648 }
649
650 /*
651 * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
652 * sizeof(*dp_ai) to avoid partial match/update problems when
653 * the user switches between HDMI/DP monitors.
654 */
655 if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
656 sizeof(ai))) {
Takashi Iwai4e76a882014-02-25 12:21:03 +0100657 codec_dbg(codec,
658 "hdmi_pin_setup_infoframe: pin=%d channels=%d ca=0x%02x\n",
Anssi Hannula307229d2013-10-24 21:10:34 +0300659 pin_nid,
660 active_channels, ca);
661 hdmi_stop_infoframe_trans(codec, pin_nid);
662 hdmi_fill_audio_infoframe(codec, pin_nid,
663 ai.bytes, sizeof(ai));
664 hdmi_start_infoframe_trans(codec, pin_nid);
665 }
666}
667
Takashi Iwaib0540872013-09-02 12:33:02 +0200668static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
669 struct hdmi_spec_per_pin *per_pin,
670 bool non_pcm)
Wu Fengguang079d88c2010-03-08 10:44:23 +0800671{
Anssi Hannula307229d2013-10-24 21:10:34 +0300672 struct hdmi_spec *spec = codec->spec;
Subhransu S. Prusty739ffee2016-03-04 19:59:49 +0530673 struct hdac_chmap *chmap = &spec->chmap;
Stephen Warren384a48d2011-06-01 11:14:21 -0600674 hda_nid_t pin_nid = per_pin->pin_nid;
Takashi Iwaib0540872013-09-02 12:33:02 +0200675 int channels = per_pin->channels;
Anssi Hannula1df5a062013-10-05 02:25:40 +0300676 int active_channels;
Stephen Warren384a48d2011-06-01 11:14:21 -0600677 struct hdmi_eld *eld;
Subhransu S. Prusty828cb4e2016-03-04 19:59:50 +0530678 int ca;
Wu Fengguang079d88c2010-03-08 10:44:23 +0800679
Takashi Iwaib0540872013-09-02 12:33:02 +0200680 if (!channels)
681 return;
682
Mengdong Lin75dcbe42014-01-08 15:55:32 -0500683 if (is_haswell_plus(codec))
Mengdong Lin58f7d282013-09-04 16:37:12 -0400684 snd_hda_codec_write(codec, pin_nid, 0,
685 AC_VERB_SET_AMP_GAIN_MUTE,
686 AMP_OUT_UNMUTE);
687
Takashi Iwaibce0d2a2013-03-13 14:40:31 +0100688 eld = &per_pin->sink_eld;
Wu Fengguang079d88c2010-03-08 10:44:23 +0800689
Subhransu S. Prustybb63f722016-03-04 19:59:52 +0530690 ca = snd_hdac_channel_allocation(&codec->core,
Subhransu S. Prusty828cb4e2016-03-04 19:59:50 +0530691 eld->info.spk_alloc, channels,
692 per_pin->chmap_set, non_pcm, per_pin->chmap);
Wu Fengguang079d88c2010-03-08 10:44:23 +0800693
Subhransu S. Prustybb63f722016-03-04 19:59:52 +0530694 active_channels = snd_hdac_get_active_channels(ca);
Anssi Hannula1df5a062013-10-05 02:25:40 +0300695
Subhransu S. Prusty739ffee2016-03-04 19:59:49 +0530696 chmap->ops.set_channel_count(&codec->core, per_pin->cvt_nid,
697 active_channels);
Anssi Hannula1df5a062013-10-05 02:25:40 +0300698
Stephen Warren384a48d2011-06-01 11:14:21 -0600699 /*
Anssi Hannula39edac72013-10-07 19:24:52 +0300700 * always configure channel mapping, it may have been changed by the
701 * user in the meantime
702 */
Subhransu S. Prustybb63f722016-03-04 19:59:52 +0530703 snd_hdac_setup_channel_mapping(&spec->chmap,
Subhransu S. Prusty828cb4e2016-03-04 19:59:50 +0530704 pin_nid, non_pcm, ca, channels,
705 per_pin->chmap, per_pin->chmap_set);
Anssi Hannula39edac72013-10-07 19:24:52 +0300706
Anssi Hannula307229d2013-10-24 21:10:34 +0300707 spec->ops.pin_setup_infoframe(codec, pin_nid, ca, active_channels,
708 eld->info.conn_type);
Wang Xingchao433968d2012-09-06 10:02:37 +0800709
Takashi Iwai1a6003b2012-09-06 17:42:08 +0200710 per_pin->non_pcm = non_pcm;
Wu Fengguang079d88c2010-03-08 10:44:23 +0800711}
712
Wu Fengguang079d88c2010-03-08 10:44:23 +0800713/*
714 * Unsolicited events
715 */
716
Takashi Iwaiefe47102013-11-07 13:38:23 +0100717static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
Takashi Iwai38faddb2010-07-28 14:21:55 +0200718
Takashi Iwai1a4f69d2014-09-11 15:22:46 +0200719static void check_presence_and_report(struct hda_codec *codec, hda_nid_t nid)
Wu Fengguang079d88c2010-03-08 10:44:23 +0800720{
721 struct hdmi_spec *spec = codec->spec;
Takashi Iwai1a4f69d2014-09-11 15:22:46 +0200722 int pin_idx = pin_nid_to_pin_index(codec, nid);
723
David Henningsson20ce9022013-12-04 10:19:41 +0800724 if (pin_idx < 0)
725 return;
David Henningsson20ce9022013-12-04 10:19:41 +0800726 if (hdmi_present_sense(get_pin(spec, pin_idx), 1))
727 snd_hda_jack_report_sync(codec);
728}
729
Takashi Iwai1a4f69d2014-09-11 15:22:46 +0200730static void jack_callback(struct hda_codec *codec,
731 struct hda_jack_callback *jack)
732{
Takashi Iwai2ebab402016-02-09 10:23:52 +0100733 check_presence_and_report(codec, jack->nid);
Takashi Iwai1a4f69d2014-09-11 15:22:46 +0200734}
735
David Henningsson20ce9022013-12-04 10:19:41 +0800736static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
737{
Takashi Iwai3a938972011-10-28 01:16:55 +0200738 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
Takashi Iwai3a938972011-10-28 01:16:55 +0200739 struct hda_jack_tbl *jack;
Mengdong Lin2e59e5a2013-08-26 21:35:49 -0400740 int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
Takashi Iwai3a938972011-10-28 01:16:55 +0200741
742 jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
743 if (!jack)
744 return;
Takashi Iwai3a938972011-10-28 01:16:55 +0200745 jack->jack_dirty = 1;
Wu Fengguang079d88c2010-03-08 10:44:23 +0800746
Takashi Iwai4e76a882014-02-25 12:21:03 +0100747 codec_dbg(codec,
Mengdong Lin2e59e5a2013-08-26 21:35:49 -0400748 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
David Henningsson20ce9022013-12-04 10:19:41 +0800749 codec->addr, jack->nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
Fengguang Wufae3d882012-04-10 17:00:35 +0800750 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
Wu Fengguang079d88c2010-03-08 10:44:23 +0800751
Takashi Iwai1a4f69d2014-09-11 15:22:46 +0200752 check_presence_and_report(codec, jack->nid);
Wu Fengguang079d88c2010-03-08 10:44:23 +0800753}
754
755static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
756{
757 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
758 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
759 int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
760 int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
761
Takashi Iwai4e76a882014-02-25 12:21:03 +0100762 codec_info(codec,
Takashi Iwaie9ea8e82012-06-21 11:41:05 +0200763 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
Stephen Warren384a48d2011-06-01 11:14:21 -0600764 codec->addr,
Wu Fengguang079d88c2010-03-08 10:44:23 +0800765 tag,
766 subtag,
767 cp_state,
768 cp_ready);
769
770 /* TODO */
771 if (cp_state)
772 ;
773 if (cp_ready)
774 ;
775}
776
777
778static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
779{
Wu Fengguang079d88c2010-03-08 10:44:23 +0800780 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
781 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
782
Takashi Iwai3a938972011-10-28 01:16:55 +0200783 if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
Takashi Iwai4e76a882014-02-25 12:21:03 +0100784 codec_dbg(codec, "Unexpected HDMI event tag 0x%x\n", tag);
Wu Fengguang079d88c2010-03-08 10:44:23 +0800785 return;
786 }
787
788 if (subtag == 0)
789 hdmi_intrinsic_event(codec, res);
790 else
791 hdmi_non_intrinsic_event(codec, res);
792}
793
Mengdong Lin58f7d282013-09-04 16:37:12 -0400794static void haswell_verify_D0(struct hda_codec *codec,
Wang Xingchao53b434f2013-06-18 10:41:53 +0800795 hda_nid_t cvt_nid, hda_nid_t nid)
David Henningsson83f26ad2013-04-10 12:26:07 +0200796{
Mengdong Lin58f7d282013-09-04 16:37:12 -0400797 int pwr;
David Henningsson83f26ad2013-04-10 12:26:07 +0200798
Wang Xingchao53b434f2013-06-18 10:41:53 +0800799 /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
800 * thus pins could only choose converter 0 for use. Make sure the
801 * converters are in correct power state */
Takashi Iwaifd678ca2013-06-18 16:28:36 +0200802 if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
Wang Xingchao53b434f2013-06-18 10:41:53 +0800803 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
804
Takashi Iwaifd678ca2013-06-18 16:28:36 +0200805 if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
David Henningsson83f26ad2013-04-10 12:26:07 +0200806 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
807 AC_PWRST_D0);
808 msleep(40);
809 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
810 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
Takashi Iwai4e76a882014-02-25 12:21:03 +0100811 codec_dbg(codec, "Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
David Henningsson83f26ad2013-04-10 12:26:07 +0200812 }
David Henningsson83f26ad2013-04-10 12:26:07 +0200813}
814
Wu Fengguang079d88c2010-03-08 10:44:23 +0800815/*
816 * Callbacks
817 */
818
Takashi Iwai92f10b32010-08-03 14:21:00 +0200819/* HBR should be Non-PCM, 8 channels */
820#define is_hbr_format(format) \
821 ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
822
Anssi Hannula307229d2013-10-24 21:10:34 +0300823static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
824 bool hbr)
Wu Fengguang079d88c2010-03-08 10:44:23 +0800825{
Anssi Hannula307229d2013-10-24 21:10:34 +0300826 int pinctl, new_pinctl;
David Henningsson83f26ad2013-04-10 12:26:07 +0200827
Stephen Warren384a48d2011-06-01 11:14:21 -0600828 if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
829 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
Anssi Hannulaea87d1c2010-08-03 13:28:58 +0300830 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
831
Anssi Hannula13122e62013-11-10 20:56:10 +0200832 if (pinctl < 0)
833 return hbr ? -EINVAL : 0;
834
Anssi Hannulaea87d1c2010-08-03 13:28:58 +0300835 new_pinctl = pinctl & ~AC_PINCTL_EPT;
Anssi Hannula307229d2013-10-24 21:10:34 +0300836 if (hbr)
Anssi Hannulaea87d1c2010-08-03 13:28:58 +0300837 new_pinctl |= AC_PINCTL_EPT_HBR;
838 else
839 new_pinctl |= AC_PINCTL_EPT_NATIVE;
840
Takashi Iwai4e76a882014-02-25 12:21:03 +0100841 codec_dbg(codec,
842 "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
Stephen Warren384a48d2011-06-01 11:14:21 -0600843 pin_nid,
Anssi Hannulaea87d1c2010-08-03 13:28:58 +0300844 pinctl == new_pinctl ? "" : "new-",
845 new_pinctl);
846
847 if (pinctl != new_pinctl)
Stephen Warren384a48d2011-06-01 11:14:21 -0600848 snd_hda_codec_write(codec, pin_nid, 0,
Anssi Hannulaea87d1c2010-08-03 13:28:58 +0300849 AC_VERB_SET_PIN_WIDGET_CONTROL,
850 new_pinctl);
Anssi Hannula307229d2013-10-24 21:10:34 +0300851 } else if (hbr)
Anssi Hannulaea87d1c2010-08-03 13:28:58 +0300852 return -EINVAL;
Anssi Hannula307229d2013-10-24 21:10:34 +0300853
854 return 0;
855}
856
857static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
858 hda_nid_t pin_nid, u32 stream_tag, int format)
859{
860 struct hdmi_spec *spec = codec->spec;
861 int err;
862
Mengdong Lin75dcbe42014-01-08 15:55:32 -0500863 if (is_haswell_plus(codec))
Anssi Hannula307229d2013-10-24 21:10:34 +0300864 haswell_verify_D0(codec, cvt_nid, pin_nid);
865
866 err = spec->ops.pin_hbr_setup(codec, pin_nid, is_hbr_format(format));
867
868 if (err) {
Takashi Iwai4e76a882014-02-25 12:21:03 +0100869 codec_dbg(codec, "hdmi_setup_stream: HBR is not supported\n");
Anssi Hannula307229d2013-10-24 21:10:34 +0300870 return err;
Anssi Hannulaea87d1c2010-08-03 13:28:58 +0300871 }
Wu Fengguang079d88c2010-03-08 10:44:23 +0800872
Stephen Warren384a48d2011-06-01 11:14:21 -0600873 snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
Anssi Hannulaea87d1c2010-08-03 13:28:58 +0300874 return 0;
Wu Fengguang079d88c2010-03-08 10:44:23 +0800875}
876
Libin Yang42b29872015-12-16 13:42:42 +0800877/* Try to find an available converter
878 * If pin_idx is less then zero, just try to find an available converter.
879 * Otherwise, try to find an available converter and get the cvt mux index
880 * of the pin.
881 */
Wang Xingchao7ef166b2013-06-18 21:42:14 +0800882static int hdmi_choose_cvt(struct hda_codec *codec,
883 int pin_idx, int *cvt_id, int *mux_id)
Takashi Iwaibbbe3392010-08-13 08:45:23 +0200884{
885 struct hdmi_spec *spec = codec->spec;
Stephen Warren384a48d2011-06-01 11:14:21 -0600886 struct hdmi_spec_per_pin *per_pin;
Stephen Warren384a48d2011-06-01 11:14:21 -0600887 struct hdmi_spec_per_cvt *per_cvt = NULL;
Wang Xingchao7ef166b2013-06-18 21:42:14 +0800888 int cvt_idx, mux_idx = 0;
Takashi Iwaibbbe3392010-08-13 08:45:23 +0200889
Libin Yang42b29872015-12-16 13:42:42 +0800890 /* pin_idx < 0 means no pin will be bound to the converter */
891 if (pin_idx < 0)
892 per_pin = NULL;
893 else
894 per_pin = get_pin(spec, pin_idx);
Takashi Iwaibbbe3392010-08-13 08:45:23 +0200895
Stephen Warren384a48d2011-06-01 11:14:21 -0600896 /* Dynamically assign converter to stream */
897 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
Takashi Iwaibce0d2a2013-03-13 14:40:31 +0100898 per_cvt = get_cvt(spec, cvt_idx);
Stephen Warren384a48d2011-06-01 11:14:21 -0600899
900 /* Must not already be assigned */
901 if (per_cvt->assigned)
902 continue;
Libin Yang42b29872015-12-16 13:42:42 +0800903 if (per_pin == NULL)
904 break;
Stephen Warren384a48d2011-06-01 11:14:21 -0600905 /* Must be in pin's mux's list of converters */
906 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
907 if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
908 break;
909 /* Not in mux list */
910 if (mux_idx == per_pin->num_mux_nids)
911 continue;
912 break;
913 }
Wang Xingchao7ef166b2013-06-18 21:42:14 +0800914
Stephen Warren384a48d2011-06-01 11:14:21 -0600915 /* No free converters */
916 if (cvt_idx == spec->num_cvts)
Libin Yang42b29872015-12-16 13:42:42 +0800917 return -EBUSY;
Stephen Warren384a48d2011-06-01 11:14:21 -0600918
Libin Yang42b29872015-12-16 13:42:42 +0800919 if (per_pin != NULL)
920 per_pin->mux_idx = mux_idx;
Mengdong Lin2df67422014-03-20 13:01:06 +0800921
Wang Xingchao7ef166b2013-06-18 21:42:14 +0800922 if (cvt_id)
923 *cvt_id = cvt_idx;
924 if (mux_id)
925 *mux_id = mux_idx;
926
927 return 0;
928}
929
Mengdong Lin2df67422014-03-20 13:01:06 +0800930/* Assure the pin select the right convetor */
931static void intel_verify_pin_cvt_connect(struct hda_codec *codec,
932 struct hdmi_spec_per_pin *per_pin)
933{
934 hda_nid_t pin_nid = per_pin->pin_nid;
935 int mux_idx, curr;
936
937 mux_idx = per_pin->mux_idx;
938 curr = snd_hda_codec_read(codec, pin_nid, 0,
939 AC_VERB_GET_CONNECT_SEL, 0);
940 if (curr != mux_idx)
941 snd_hda_codec_write_cache(codec, pin_nid, 0,
942 AC_VERB_SET_CONNECT_SEL,
943 mux_idx);
944}
945
Libin Yang42b29872015-12-16 13:42:42 +0800946/* get the mux index for the converter of the pins
947 * converter's mux index is the same for all pins on Intel platform
948 */
949static int intel_cvt_id_to_mux_idx(struct hdmi_spec *spec,
950 hda_nid_t cvt_nid)
951{
952 int i;
953
954 for (i = 0; i < spec->num_cvts; i++)
955 if (spec->cvt_nids[i] == cvt_nid)
956 return i;
957 return -EINVAL;
958}
959
Mengdong Lin300016b2013-11-04 01:13:13 -0500960/* Intel HDMI workaround to fix audio routing issue:
961 * For some Intel display codecs, pins share the same connection list.
962 * So a conveter can be selected by multiple pins and playback on any of these
963 * pins will generate sound on the external display, because audio flows from
964 * the same converter to the display pipeline. Also muting one pin may make
965 * other pins have no sound output.
966 * So this function assures that an assigned converter for a pin is not selected
967 * by any other pins.
968 */
969static void intel_not_share_assigned_cvt(struct hda_codec *codec,
Mengdong Linf82d7d12013-09-21 20:34:45 -0400970 hda_nid_t pin_nid, int mux_idx)
Wang Xingchao7ef166b2013-06-18 21:42:14 +0800971{
972 struct hdmi_spec *spec = codec->spec;
Takashi Iwai7639a062015-03-03 10:07:24 +0100973 hda_nid_t nid;
Mengdong Linf82d7d12013-09-21 20:34:45 -0400974 int cvt_idx, curr;
975 struct hdmi_spec_per_cvt *per_cvt;
Wang Xingchao7ef166b2013-06-18 21:42:14 +0800976
Mengdong Linf82d7d12013-09-21 20:34:45 -0400977 /* configure all pins, including "no physical connection" ones */
Takashi Iwai7639a062015-03-03 10:07:24 +0100978 for_each_hda_codec_node(nid, codec) {
Mengdong Linf82d7d12013-09-21 20:34:45 -0400979 unsigned int wid_caps = get_wcaps(codec, nid);
980 unsigned int wid_type = get_wcaps_type(wid_caps);
Wang Xingchao7ef166b2013-06-18 21:42:14 +0800981
Mengdong Linf82d7d12013-09-21 20:34:45 -0400982 if (wid_type != AC_WID_PIN)
Wang Xingchao7ef166b2013-06-18 21:42:14 +0800983 continue;
984
Mengdong Linf82d7d12013-09-21 20:34:45 -0400985 if (nid == pin_nid)
986 continue;
Wang Xingchao7ef166b2013-06-18 21:42:14 +0800987
Mengdong Linf82d7d12013-09-21 20:34:45 -0400988 curr = snd_hda_codec_read(codec, nid, 0,
989 AC_VERB_GET_CONNECT_SEL, 0);
990 if (curr != mux_idx)
991 continue;
992
993 /* choose an unassigned converter. The conveters in the
994 * connection list are in the same order as in the codec.
995 */
996 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
997 per_cvt = get_cvt(spec, cvt_idx);
998 if (!per_cvt->assigned) {
Takashi Iwai4e76a882014-02-25 12:21:03 +0100999 codec_dbg(codec,
1000 "choose cvt %d for pin nid %d\n",
Mengdong Linf82d7d12013-09-21 20:34:45 -04001001 cvt_idx, nid);
1002 snd_hda_codec_write_cache(codec, nid, 0,
Wang Xingchao7ef166b2013-06-18 21:42:14 +08001003 AC_VERB_SET_CONNECT_SEL,
Mengdong Linf82d7d12013-09-21 20:34:45 -04001004 cvt_idx);
1005 break;
1006 }
Wang Xingchao7ef166b2013-06-18 21:42:14 +08001007 }
1008 }
1009}
1010
Libin Yang42b29872015-12-16 13:42:42 +08001011/* A wrapper of intel_not_share_asigned_cvt() */
1012static void intel_not_share_assigned_cvt_nid(struct hda_codec *codec,
1013 hda_nid_t pin_nid, hda_nid_t cvt_nid)
1014{
1015 int mux_idx;
1016 struct hdmi_spec *spec = codec->spec;
1017
1018 if (!is_haswell_plus(codec) && !is_valleyview_plus(codec))
1019 return;
1020
1021 /* On Intel platform, the mapping of converter nid to
1022 * mux index of the pins are always the same.
1023 * The pin nid may be 0, this means all pins will not
1024 * share the converter.
1025 */
1026 mux_idx = intel_cvt_id_to_mux_idx(spec, cvt_nid);
1027 if (mux_idx >= 0)
1028 intel_not_share_assigned_cvt(codec, pin_nid, mux_idx);
1029}
1030
1031/* called in hdmi_pcm_open when no pin is assigned to the PCM
1032 * in dyn_pcm_assign mode.
1033 */
1034static int hdmi_pcm_open_no_pin(struct hda_pcm_stream *hinfo,
1035 struct hda_codec *codec,
1036 struct snd_pcm_substream *substream)
1037{
1038 struct hdmi_spec *spec = codec->spec;
1039 struct snd_pcm_runtime *runtime = substream->runtime;
Libin Yangac983792015-12-16 16:48:16 +08001040 int cvt_idx, pcm_idx;
Libin Yang42b29872015-12-16 13:42:42 +08001041 struct hdmi_spec_per_cvt *per_cvt = NULL;
1042 int err;
1043
Libin Yangac983792015-12-16 16:48:16 +08001044 pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1045 if (pcm_idx < 0)
1046 return -EINVAL;
1047
Libin Yang42b29872015-12-16 13:42:42 +08001048 err = hdmi_choose_cvt(codec, -1, &cvt_idx, NULL);
1049 if (err)
1050 return err;
1051
1052 per_cvt = get_cvt(spec, cvt_idx);
1053 per_cvt->assigned = 1;
1054 hinfo->nid = per_cvt->cvt_nid;
1055
1056 intel_not_share_assigned_cvt_nid(codec, 0, per_cvt->cvt_nid);
1057
Libin Yangac983792015-12-16 16:48:16 +08001058 set_bit(pcm_idx, &spec->pcm_in_use);
Libin Yang42b29872015-12-16 13:42:42 +08001059 /* todo: setup spdif ctls assign */
1060
1061 /* Initially set the converter's capabilities */
1062 hinfo->channels_min = per_cvt->channels_min;
1063 hinfo->channels_max = per_cvt->channels_max;
1064 hinfo->rates = per_cvt->rates;
1065 hinfo->formats = per_cvt->formats;
1066 hinfo->maxbps = per_cvt->maxbps;
1067
1068 /* Store the updated parameters */
1069 runtime->hw.channels_min = hinfo->channels_min;
1070 runtime->hw.channels_max = hinfo->channels_max;
1071 runtime->hw.formats = hinfo->formats;
1072 runtime->hw.rates = hinfo->rates;
1073
1074 snd_pcm_hw_constraint_step(substream->runtime, 0,
1075 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1076 return 0;
1077}
1078
Wang Xingchao7ef166b2013-06-18 21:42:14 +08001079/*
1080 * HDA PCM callbacks
1081 */
1082static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1083 struct hda_codec *codec,
1084 struct snd_pcm_substream *substream)
1085{
1086 struct hdmi_spec *spec = codec->spec;
1087 struct snd_pcm_runtime *runtime = substream->runtime;
Libin Yang2bf3c852015-12-16 13:42:43 +08001088 int pin_idx, cvt_idx, pcm_idx, mux_idx = 0;
Wang Xingchao7ef166b2013-06-18 21:42:14 +08001089 struct hdmi_spec_per_pin *per_pin;
1090 struct hdmi_eld *eld;
1091 struct hdmi_spec_per_cvt *per_cvt = NULL;
1092 int err;
1093
1094 /* Validate hinfo */
Libin Yang2bf3c852015-12-16 13:42:43 +08001095 pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1096 if (pcm_idx < 0)
Wang Xingchao7ef166b2013-06-18 21:42:14 +08001097 return -EINVAL;
Libin Yang2bf3c852015-12-16 13:42:43 +08001098
Libin Yang42b29872015-12-16 13:42:42 +08001099 mutex_lock(&spec->pcm_lock);
Wang Xingchao7ef166b2013-06-18 21:42:14 +08001100 pin_idx = hinfo_to_pin_index(codec, hinfo);
Libin Yang42b29872015-12-16 13:42:42 +08001101 if (!spec->dyn_pcm_assign) {
1102 if (snd_BUG_ON(pin_idx < 0)) {
1103 mutex_unlock(&spec->pcm_lock);
1104 return -EINVAL;
1105 }
1106 } else {
1107 /* no pin is assigned to the PCM
1108 * PA need pcm open successfully when probe
1109 */
1110 if (pin_idx < 0) {
1111 err = hdmi_pcm_open_no_pin(hinfo, codec, substream);
1112 mutex_unlock(&spec->pcm_lock);
1113 return err;
1114 }
1115 }
Wang Xingchao7ef166b2013-06-18 21:42:14 +08001116
1117 err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, &mux_idx);
Libin Yang42b29872015-12-16 13:42:42 +08001118 if (err < 0) {
1119 mutex_unlock(&spec->pcm_lock);
Wang Xingchao7ef166b2013-06-18 21:42:14 +08001120 return err;
Libin Yang42b29872015-12-16 13:42:42 +08001121 }
Wang Xingchao7ef166b2013-06-18 21:42:14 +08001122
1123 per_cvt = get_cvt(spec, cvt_idx);
Stephen Warren384a48d2011-06-01 11:14:21 -06001124 /* Claim converter */
1125 per_cvt->assigned = 1;
Libin Yang42b29872015-12-16 13:42:42 +08001126
Libin Yangac983792015-12-16 16:48:16 +08001127 set_bit(pcm_idx, &spec->pcm_in_use);
Libin Yang42b29872015-12-16 13:42:42 +08001128 per_pin = get_pin(spec, pin_idx);
Anssi Hannula1df5a062013-10-05 02:25:40 +03001129 per_pin->cvt_nid = per_cvt->cvt_nid;
Stephen Warren384a48d2011-06-01 11:14:21 -06001130 hinfo->nid = per_cvt->cvt_nid;
1131
Takashi Iwaibddee962013-06-18 16:14:22 +02001132 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
Stephen Warren384a48d2011-06-01 11:14:21 -06001133 AC_VERB_SET_CONNECT_SEL,
1134 mux_idx);
Wang Xingchao7ef166b2013-06-18 21:42:14 +08001135
1136 /* configure unused pins to choose other converters */
Libin Yangca2e7222014-08-19 16:20:12 +08001137 if (is_haswell_plus(codec) || is_valleyview_plus(codec))
Mengdong Lin300016b2013-11-04 01:13:13 -05001138 intel_not_share_assigned_cvt(codec, per_pin->pin_nid, mux_idx);
Wang Xingchao7ef166b2013-06-18 21:42:14 +08001139
Libin Yang2bf3c852015-12-16 13:42:43 +08001140 snd_hda_spdif_ctls_assign(codec, pcm_idx, per_cvt->cvt_nid);
Takashi Iwaibbbe3392010-08-13 08:45:23 +02001141
Stephen Warren2def8172011-06-01 11:14:20 -06001142 /* Initially set the converter's capabilities */
Stephen Warren384a48d2011-06-01 11:14:21 -06001143 hinfo->channels_min = per_cvt->channels_min;
1144 hinfo->channels_max = per_cvt->channels_max;
1145 hinfo->rates = per_cvt->rates;
1146 hinfo->formats = per_cvt->formats;
1147 hinfo->maxbps = per_cvt->maxbps;
Stephen Warren2def8172011-06-01 11:14:20 -06001148
Libin Yang42b29872015-12-16 13:42:42 +08001149 eld = &per_pin->sink_eld;
Stephen Warren384a48d2011-06-01 11:14:21 -06001150 /* Restrict capabilities by ELD if this isn't disabled */
Stephen Warrenc3d52102011-06-01 11:14:16 -06001151 if (!static_hdmi_pcm && eld->eld_valid) {
David Henningsson1613d6b2013-02-19 16:11:24 +01001152 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
Takashi Iwaibbbe3392010-08-13 08:45:23 +02001153 if (hinfo->channels_min > hinfo->channels_max ||
Takashi Iwai2ad779b2013-02-01 14:01:27 +01001154 !hinfo->rates || !hinfo->formats) {
1155 per_cvt->assigned = 0;
1156 hinfo->nid = 0;
Libin Yang2bf3c852015-12-16 13:42:43 +08001157 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
Libin Yang42b29872015-12-16 13:42:42 +08001158 mutex_unlock(&spec->pcm_lock);
Takashi Iwaibbbe3392010-08-13 08:45:23 +02001159 return -ENODEV;
Takashi Iwai2ad779b2013-02-01 14:01:27 +01001160 }
Takashi Iwaibbbe3392010-08-13 08:45:23 +02001161 }
Stephen Warren2def8172011-06-01 11:14:20 -06001162
Libin Yang42b29872015-12-16 13:42:42 +08001163 mutex_unlock(&spec->pcm_lock);
Stephen Warren2def8172011-06-01 11:14:20 -06001164 /* Store the updated parameters */
Takashi Iwai639cef02011-01-14 10:30:46 +01001165 runtime->hw.channels_min = hinfo->channels_min;
1166 runtime->hw.channels_max = hinfo->channels_max;
1167 runtime->hw.formats = hinfo->formats;
1168 runtime->hw.rates = hinfo->rates;
Takashi Iwai4fe2ca12011-01-14 10:33:26 +01001169
1170 snd_pcm_hw_constraint_step(substream->runtime, 0,
1171 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
Takashi Iwaibbbe3392010-08-13 08:45:23 +02001172 return 0;
1173}
1174
1175/*
Wu Fengguang079d88c2010-03-08 10:44:23 +08001176 * HDA/HDMI auto parsing
1177 */
Stephen Warren384a48d2011-06-01 11:14:21 -06001178static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
Wu Fengguang079d88c2010-03-08 10:44:23 +08001179{
1180 struct hdmi_spec *spec = codec->spec;
Takashi Iwaibce0d2a2013-03-13 14:40:31 +01001181 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
Stephen Warren384a48d2011-06-01 11:14:21 -06001182 hda_nid_t pin_nid = per_pin->pin_nid;
Wu Fengguang079d88c2010-03-08 10:44:23 +08001183
1184 if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
Takashi Iwai4e76a882014-02-25 12:21:03 +01001185 codec_warn(codec,
1186 "HDMI: pin %d wcaps %#x does not support connection list\n",
Wu Fengguang079d88c2010-03-08 10:44:23 +08001187 pin_nid, get_wcaps(codec, pin_nid));
1188 return -EINVAL;
1189 }
1190
Stephen Warren384a48d2011-06-01 11:14:21 -06001191 per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1192 per_pin->mux_nids,
1193 HDA_MAX_CONNECTIONS);
Wu Fengguang079d88c2010-03-08 10:44:23 +08001194
1195 return 0;
1196}
1197
Libin Yanga76056f2015-12-16 16:48:15 +08001198static int hdmi_find_pcm_slot(struct hdmi_spec *spec,
1199 struct hdmi_spec_per_pin *per_pin)
1200{
1201 int i;
1202
1203 /* try the prefer PCM */
1204 if (!test_bit(per_pin->pin_nid_idx, &spec->pcm_bitmap))
1205 return per_pin->pin_nid_idx;
1206
1207 /* have a second try; check the "reserved area" over num_pins */
1208 for (i = spec->num_pins; i < spec->pcm_used; i++) {
1209 if (!test_bit(i, &spec->pcm_bitmap))
1210 return i;
1211 }
1212
1213 /* the last try; check the empty slots in pins */
1214 for (i = 0; i < spec->num_pins; i++) {
1215 if (!test_bit(i, &spec->pcm_bitmap))
1216 return i;
1217 }
1218 return -EBUSY;
1219}
1220
1221static void hdmi_attach_hda_pcm(struct hdmi_spec *spec,
1222 struct hdmi_spec_per_pin *per_pin)
1223{
1224 int idx;
1225
1226 /* pcm already be attached to the pin */
1227 if (per_pin->pcm)
1228 return;
1229 idx = hdmi_find_pcm_slot(spec, per_pin);
Libin Yangd10a80d2016-03-01 15:18:26 +08001230 if (idx == -EBUSY)
Libin Yanga76056f2015-12-16 16:48:15 +08001231 return;
1232 per_pin->pcm_idx = idx;
Libin Yang2bea2412016-01-12 11:13:26 +08001233 per_pin->pcm = get_hdmi_pcm(spec, idx);
Libin Yanga76056f2015-12-16 16:48:15 +08001234 set_bit(idx, &spec->pcm_bitmap);
1235}
1236
1237static void hdmi_detach_hda_pcm(struct hdmi_spec *spec,
1238 struct hdmi_spec_per_pin *per_pin)
1239{
1240 int idx;
1241
1242 /* pcm already be detached from the pin */
1243 if (!per_pin->pcm)
1244 return;
1245 idx = per_pin->pcm_idx;
1246 per_pin->pcm_idx = -1;
1247 per_pin->pcm = NULL;
1248 if (idx >= 0 && idx < spec->pcm_used)
1249 clear_bit(idx, &spec->pcm_bitmap);
1250}
1251
Libin Yangac983792015-12-16 16:48:16 +08001252static int hdmi_get_pin_cvt_mux(struct hdmi_spec *spec,
1253 struct hdmi_spec_per_pin *per_pin, hda_nid_t cvt_nid)
1254{
1255 int mux_idx;
1256
1257 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1258 if (per_pin->mux_nids[mux_idx] == cvt_nid)
1259 break;
1260 return mux_idx;
1261}
1262
1263static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid);
1264
1265static void hdmi_pcm_setup_pin(struct hdmi_spec *spec,
1266 struct hdmi_spec_per_pin *per_pin)
1267{
1268 struct hda_codec *codec = per_pin->codec;
1269 struct hda_pcm *pcm;
1270 struct hda_pcm_stream *hinfo;
1271 struct snd_pcm_substream *substream;
1272 int mux_idx;
1273 bool non_pcm;
1274
1275 if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
Libin Yang2bea2412016-01-12 11:13:26 +08001276 pcm = get_pcm_rec(spec, per_pin->pcm_idx);
Libin Yangac983792015-12-16 16:48:16 +08001277 else
1278 return;
1279 if (!test_bit(per_pin->pcm_idx, &spec->pcm_in_use))
1280 return;
1281
1282 /* hdmi audio only uses playback and one substream */
1283 hinfo = pcm->stream;
1284 substream = pcm->pcm->streams[0].substream;
1285
1286 per_pin->cvt_nid = hinfo->nid;
1287
1288 mux_idx = hdmi_get_pin_cvt_mux(spec, per_pin, hinfo->nid);
1289 if (mux_idx < per_pin->num_mux_nids)
1290 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1291 AC_VERB_SET_CONNECT_SEL,
1292 mux_idx);
1293 snd_hda_spdif_ctls_assign(codec, per_pin->pcm_idx, hinfo->nid);
1294
1295 non_pcm = check_non_pcm_per_cvt(codec, hinfo->nid);
1296 if (substream->runtime)
1297 per_pin->channels = substream->runtime->channels;
1298 per_pin->setup = true;
1299 per_pin->mux_idx = mux_idx;
1300
1301 hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1302}
1303
1304static void hdmi_pcm_reset_pin(struct hdmi_spec *spec,
1305 struct hdmi_spec_per_pin *per_pin)
1306{
1307 if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1308 snd_hda_spdif_ctls_unassign(per_pin->codec, per_pin->pcm_idx);
1309
1310 per_pin->chmap_set = false;
1311 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1312
1313 per_pin->setup = false;
1314 per_pin->channels = 0;
1315}
1316
Takashi Iwaie90247f2015-11-13 09:12:12 +01001317/* update per_pin ELD from the given new ELD;
1318 * setup info frame and notification accordingly
1319 */
1320static void update_eld(struct hda_codec *codec,
1321 struct hdmi_spec_per_pin *per_pin,
1322 struct hdmi_eld *eld)
1323{
1324 struct hdmi_eld *pin_eld = &per_pin->sink_eld;
Libin Yanga76056f2015-12-16 16:48:15 +08001325 struct hdmi_spec *spec = codec->spec;
Takashi Iwaie90247f2015-11-13 09:12:12 +01001326 bool old_eld_valid = pin_eld->eld_valid;
1327 bool eld_changed;
Libin Yangfb087ea2016-02-23 16:33:37 +08001328 int pcm_idx = -1;
Takashi Iwaie90247f2015-11-13 09:12:12 +01001329
Libin Yangfb087ea2016-02-23 16:33:37 +08001330 /* for monitor disconnection, save pcm_idx firstly */
1331 pcm_idx = per_pin->pcm_idx;
Libin Yanga76056f2015-12-16 16:48:15 +08001332 if (spec->dyn_pcm_assign) {
Libin Yangac983792015-12-16 16:48:16 +08001333 if (eld->eld_valid) {
Libin Yanga76056f2015-12-16 16:48:15 +08001334 hdmi_attach_hda_pcm(spec, per_pin);
Libin Yangac983792015-12-16 16:48:16 +08001335 hdmi_pcm_setup_pin(spec, per_pin);
1336 } else {
1337 hdmi_pcm_reset_pin(spec, per_pin);
Libin Yanga76056f2015-12-16 16:48:15 +08001338 hdmi_detach_hda_pcm(spec, per_pin);
Libin Yangac983792015-12-16 16:48:16 +08001339 }
Libin Yanga76056f2015-12-16 16:48:15 +08001340 }
Libin Yangfb087ea2016-02-23 16:33:37 +08001341 /* if pcm_idx == -1, it means this is in monitor connection event
1342 * we can get the correct pcm_idx now.
1343 */
1344 if (pcm_idx == -1)
1345 pcm_idx = per_pin->pcm_idx;
Libin Yanga76056f2015-12-16 16:48:15 +08001346
Takashi Iwaie90247f2015-11-13 09:12:12 +01001347 if (eld->eld_valid)
1348 snd_hdmi_show_eld(codec, &eld->info);
1349
1350 eld_changed = (pin_eld->eld_valid != eld->eld_valid);
1351 if (eld->eld_valid && pin_eld->eld_valid)
1352 if (pin_eld->eld_size != eld->eld_size ||
1353 memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1354 eld->eld_size) != 0)
1355 eld_changed = true;
1356
1357 pin_eld->eld_valid = eld->eld_valid;
1358 pin_eld->eld_size = eld->eld_size;
1359 if (eld->eld_valid)
1360 memcpy(pin_eld->eld_buffer, eld->eld_buffer, eld->eld_size);
1361 pin_eld->info = eld->info;
1362
1363 /*
1364 * Re-setup pin and infoframe. This is needed e.g. when
1365 * - sink is first plugged-in
1366 * - transcoder can change during stream playback on Haswell
1367 * and this can make HW reset converter selection on a pin.
1368 */
1369 if (eld->eld_valid && !old_eld_valid && per_pin->setup) {
1370 if (is_haswell_plus(codec) || is_valleyview_plus(codec)) {
1371 intel_verify_pin_cvt_connect(codec, per_pin);
1372 intel_not_share_assigned_cvt(codec, per_pin->pin_nid,
1373 per_pin->mux_idx);
1374 }
1375
1376 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1377 }
1378
Libin Yangfb087ea2016-02-23 16:33:37 +08001379 if (eld_changed && pcm_idx >= 0)
Takashi Iwaie90247f2015-11-13 09:12:12 +01001380 snd_ctl_notify(codec->card,
1381 SNDRV_CTL_EVENT_MASK_VALUE |
1382 SNDRV_CTL_EVENT_MASK_INFO,
Libin Yangfb087ea2016-02-23 16:33:37 +08001383 &get_hdmi_pcm(spec, pcm_idx)->eld_ctl->id);
Takashi Iwaie90247f2015-11-13 09:12:12 +01001384}
1385
Takashi Iwai788d4412015-11-12 15:36:13 +01001386/* update ELD and jack state via HD-audio verbs */
1387static bool hdmi_present_sense_via_verbs(struct hdmi_spec_per_pin *per_pin,
1388 int repoll)
Wu Fengguang079d88c2010-03-08 10:44:23 +08001389{
David Henningsson464837a2013-11-07 13:38:25 +01001390 struct hda_jack_tbl *jack;
Wu Fengguang744626d2011-11-16 16:29:47 +08001391 struct hda_codec *codec = per_pin->codec;
David Henningsson4bd038f2013-02-19 16:11:25 +01001392 struct hdmi_spec *spec = codec->spec;
1393 struct hdmi_eld *eld = &spec->temp_eld;
1394 struct hdmi_eld *pin_eld = &per_pin->sink_eld;
Wu Fengguang744626d2011-11-16 16:29:47 +08001395 hda_nid_t pin_nid = per_pin->pin_nid;
Stephen Warren5d44f922011-05-24 17:11:17 -06001396 /*
1397 * Always execute a GetPinSense verb here, even when called from
1398 * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1399 * response's PD bit is not the real PD value, but indicates that
1400 * the real PD value changed. An older version of the HD-audio
1401 * specification worked this way. Hence, we just ignore the data in
1402 * the unsolicited response to avoid custom WARs.
1403 */
David Henningssonda4a7a32013-12-18 10:46:04 +01001404 int present;
Takashi Iwaiefe47102013-11-07 13:38:23 +01001405 bool ret;
Takashi Iwai9a5e5232015-12-10 14:35:09 +01001406 bool do_repoll = false;
Wu Fengguang079d88c2010-03-08 10:44:23 +08001407
Takashi Iwai664c7152015-04-08 11:43:14 +02001408 snd_hda_power_up_pm(codec);
David Henningssonda4a7a32013-12-18 10:46:04 +01001409 present = snd_hda_pin_sense(codec, pin_nid);
1410
Takashi Iwaia4e9a382013-10-17 18:21:12 +02001411 mutex_lock(&per_pin->lock);
David Henningsson4bd038f2013-02-19 16:11:25 +01001412 pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1413 if (pin_eld->monitor_present)
1414 eld->eld_valid = !!(present & AC_PINSENSE_ELDV);
1415 else
1416 eld->eld_valid = false;
Stephen Warren5d44f922011-05-24 17:11:17 -06001417
Takashi Iwai4e76a882014-02-25 12:21:03 +01001418 codec_dbg(codec,
Stephen Warren384a48d2011-06-01 11:14:21 -06001419 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
Mengdong Lin10250912013-03-28 05:21:28 -04001420 codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
Stephen Warren5d44f922011-05-24 17:11:17 -06001421
David Henningsson4bd038f2013-02-19 16:11:25 +01001422 if (eld->eld_valid) {
Anssi Hannula307229d2013-10-24 21:10:34 +03001423 if (spec->ops.pin_get_eld(codec, pin_nid, eld->eld_buffer,
David Henningsson1613d6b2013-02-19 16:11:24 +01001424 &eld->eld_size) < 0)
David Henningsson4bd038f2013-02-19 16:11:25 +01001425 eld->eld_valid = false;
David Henningsson1613d6b2013-02-19 16:11:24 +01001426 else {
Takashi Iwai79514d42014-06-06 18:04:34 +02001427 if (snd_hdmi_parse_eld(codec, &eld->info, eld->eld_buffer,
David Henningsson1613d6b2013-02-19 16:11:24 +01001428 eld->eld_size) < 0)
David Henningsson4bd038f2013-02-19 16:11:25 +01001429 eld->eld_valid = false;
David Henningsson1613d6b2013-02-19 16:11:24 +01001430 }
Takashi Iwai9a5e5232015-12-10 14:35:09 +01001431 if (!eld->eld_valid && repoll)
1432 do_repoll = true;
Wu Fengguang744626d2011-11-16 16:29:47 +08001433 }
David Henningsson4bd038f2013-02-19 16:11:25 +01001434
Takashi Iwai9a5e5232015-12-10 14:35:09 +01001435 if (do_repoll)
Takashi Iwaie90247f2015-11-13 09:12:12 +01001436 schedule_delayed_work(&per_pin->work, msecs_to_jiffies(300));
1437 else
1438 update_eld(codec, per_pin, eld);
Anssi Hannula6acce402014-10-19 19:25:19 +03001439
Takashi Iwaiaff747eb2013-11-07 16:39:37 +01001440 ret = !repoll || !pin_eld->monitor_present || pin_eld->eld_valid;
David Henningsson464837a2013-11-07 13:38:25 +01001441
1442 jack = snd_hda_jack_tbl_get(codec, pin_nid);
1443 if (jack)
1444 jack->block_report = !ret;
1445
Takashi Iwaia4e9a382013-10-17 18:21:12 +02001446 mutex_unlock(&per_pin->lock);
Takashi Iwai664c7152015-04-08 11:43:14 +02001447 snd_hda_power_down_pm(codec);
Takashi Iwaiefe47102013-11-07 13:38:23 +01001448 return ret;
Wu Fengguang079d88c2010-03-08 10:44:23 +08001449}
1450
Libin Yang31842702016-02-19 15:42:06 +08001451static struct snd_jack *pin_idx_to_jack(struct hda_codec *codec,
1452 struct hdmi_spec_per_pin *per_pin)
1453{
1454 struct hdmi_spec *spec = codec->spec;
1455 struct snd_jack *jack = NULL;
1456 struct hda_jack_tbl *jack_tbl;
1457
1458 /* if !dyn_pcm_assign, get jack from hda_jack_tbl
1459 * in !dyn_pcm_assign case, spec->pcm_rec[].jack is not
1460 * NULL even after snd_hda_jack_tbl_clear() is called to
1461 * free snd_jack. This may cause access invalid memory
1462 * when calling snd_jack_report
1463 */
1464 if (per_pin->pcm_idx >= 0 && spec->dyn_pcm_assign)
1465 jack = spec->pcm_rec[per_pin->pcm_idx].jack;
1466 else if (!spec->dyn_pcm_assign) {
1467 jack_tbl = snd_hda_jack_tbl_get(codec, per_pin->pin_nid);
1468 if (jack_tbl)
1469 jack = jack_tbl->jack;
1470 }
1471 return jack;
1472}
1473
Takashi Iwai788d4412015-11-12 15:36:13 +01001474/* update ELD and jack state via audio component */
1475static void sync_eld_via_acomp(struct hda_codec *codec,
1476 struct hdmi_spec_per_pin *per_pin)
1477{
Takashi Iwai788d4412015-11-12 15:36:13 +01001478 struct hdmi_spec *spec = codec->spec;
1479 struct hdmi_eld *eld = &spec->temp_eld;
Libin Yang25e4abb2016-01-12 11:13:27 +08001480 struct snd_jack *jack = NULL;
Takashi Iwai788d4412015-11-12 15:36:13 +01001481 int size;
1482
Takashi Iwaie2dc7d72015-12-01 12:39:38 +01001483 mutex_lock(&per_pin->lock);
1484 size = snd_hdac_acomp_get_eld(&codec->bus->core, per_pin->pin_nid,
1485 &eld->monitor_present, eld->eld_buffer,
1486 ELD_MAX_SIZE);
1487 if (size < 0)
1488 goto unlock;
1489 if (size > 0) {
1490 size = min(size, ELD_MAX_SIZE);
1491 if (snd_hdmi_parse_eld(codec, &eld->info,
1492 eld->eld_buffer, size) < 0)
1493 size = -EINVAL;
Takashi Iwai788d4412015-11-12 15:36:13 +01001494 }
Takashi Iwaie2dc7d72015-12-01 12:39:38 +01001495
1496 if (size > 0) {
1497 eld->eld_valid = true;
1498 eld->eld_size = size;
1499 } else {
1500 eld->eld_valid = false;
1501 eld->eld_size = 0;
1502 }
1503
Libin Yang25e4abb2016-01-12 11:13:27 +08001504 /* pcm_idx >=0 before update_eld() means it is in monitor
1505 * disconnected event. Jack must be fetched before update_eld()
1506 */
Libin Yang31842702016-02-19 15:42:06 +08001507 jack = pin_idx_to_jack(codec, per_pin);
Takashi Iwaie2dc7d72015-12-01 12:39:38 +01001508 update_eld(codec, per_pin, eld);
Libin Yang31842702016-02-19 15:42:06 +08001509 if (jack == NULL)
1510 jack = pin_idx_to_jack(codec, per_pin);
Libin Yang25e4abb2016-01-12 11:13:27 +08001511 if (jack == NULL)
1512 goto unlock;
1513 snd_jack_report(jack,
Takashi Iwaie2dc7d72015-12-01 12:39:38 +01001514 eld->monitor_present ? SND_JACK_AVOUT : 0);
1515 unlock:
1516 mutex_unlock(&per_pin->lock);
Takashi Iwai788d4412015-11-12 15:36:13 +01001517}
1518
1519static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1520{
1521 struct hda_codec *codec = per_pin->codec;
Libin Yanga76056f2015-12-16 16:48:15 +08001522 struct hdmi_spec *spec = codec->spec;
1523 int ret;
Takashi Iwai788d4412015-11-12 15:36:13 +01001524
Libin Yanga76056f2015-12-16 16:48:15 +08001525 mutex_lock(&spec->pcm_lock);
Takashi Iwai788d4412015-11-12 15:36:13 +01001526 if (codec_has_acomp(codec)) {
1527 sync_eld_via_acomp(codec, per_pin);
Libin Yanga76056f2015-12-16 16:48:15 +08001528 ret = false; /* don't call snd_hda_jack_report_sync() */
Takashi Iwai788d4412015-11-12 15:36:13 +01001529 } else {
Libin Yanga76056f2015-12-16 16:48:15 +08001530 ret = hdmi_present_sense_via_verbs(per_pin, repoll);
Takashi Iwai788d4412015-11-12 15:36:13 +01001531 }
Libin Yanga76056f2015-12-16 16:48:15 +08001532 mutex_unlock(&spec->pcm_lock);
1533
1534 return ret;
Takashi Iwai788d4412015-11-12 15:36:13 +01001535}
1536
Wu Fengguang744626d2011-11-16 16:29:47 +08001537static void hdmi_repoll_eld(struct work_struct *work)
1538{
1539 struct hdmi_spec_per_pin *per_pin =
1540 container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1541
Wu Fengguangc6e84532011-11-18 16:59:32 -06001542 if (per_pin->repoll_count++ > 6)
1543 per_pin->repoll_count = 0;
1544
Takashi Iwaiefe47102013-11-07 13:38:23 +01001545 if (hdmi_present_sense(per_pin, per_pin->repoll_count))
1546 snd_hda_jack_report_sync(per_pin->codec);
Wu Fengguang744626d2011-11-16 16:29:47 +08001547}
1548
Takashi Iwaic88d4e82013-02-08 17:10:04 -05001549static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1550 hda_nid_t nid);
1551
Wu Fengguang079d88c2010-03-08 10:44:23 +08001552static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1553{
1554 struct hdmi_spec *spec = codec->spec;
Stephen Warren384a48d2011-06-01 11:14:21 -06001555 unsigned int caps, config;
1556 int pin_idx;
1557 struct hdmi_spec_per_pin *per_pin;
David Henningsson07acecc2011-05-19 11:46:03 +02001558 int err;
Wu Fengguang079d88c2010-03-08 10:44:23 +08001559
Takashi Iwaiefc2f8de2012-11-21 14:27:37 +01001560 caps = snd_hda_query_pin_caps(codec, pin_nid);
Stephen Warren384a48d2011-06-01 11:14:21 -06001561 if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1562 return 0;
1563
Takashi Iwaiefc2f8de2012-11-21 14:27:37 +01001564 config = snd_hda_codec_get_pincfg(codec, pin_nid);
Stephen Warren384a48d2011-06-01 11:14:21 -06001565 if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1566 return 0;
1567
Mengdong Lin75dcbe42014-01-08 15:55:32 -05001568 if (is_haswell_plus(codec))
Takashi Iwaic88d4e82013-02-08 17:10:04 -05001569 intel_haswell_fixup_connect_list(codec, pin_nid);
1570
Stephen Warren384a48d2011-06-01 11:14:21 -06001571 pin_idx = spec->num_pins;
Takashi Iwaibce0d2a2013-03-13 14:40:31 +01001572 per_pin = snd_array_new(&spec->pins);
1573 if (!per_pin)
1574 return -ENOMEM;
Stephen Warren384a48d2011-06-01 11:14:21 -06001575
1576 per_pin->pin_nid = pin_nid;
Takashi Iwai1a6003b2012-09-06 17:42:08 +02001577 per_pin->non_pcm = false;
Libin Yanga76056f2015-12-16 16:48:15 +08001578 if (spec->dyn_pcm_assign)
1579 per_pin->pcm_idx = -1;
Libin Yang2bea2412016-01-12 11:13:26 +08001580 else {
1581 per_pin->pcm = get_hdmi_pcm(spec, pin_idx);
Libin Yanga76056f2015-12-16 16:48:15 +08001582 per_pin->pcm_idx = pin_idx;
Libin Yang2bea2412016-01-12 11:13:26 +08001583 }
Libin Yanga76056f2015-12-16 16:48:15 +08001584 per_pin->pin_nid_idx = pin_idx;
Wu Fengguang079d88c2010-03-08 10:44:23 +08001585
Stephen Warren384a48d2011-06-01 11:14:21 -06001586 err = hdmi_read_pin_conn(codec, pin_idx);
1587 if (err < 0)
1588 return err;
Wu Fengguang079d88c2010-03-08 10:44:23 +08001589
Wu Fengguang079d88c2010-03-08 10:44:23 +08001590 spec->num_pins++;
1591
Stephen Warren384a48d2011-06-01 11:14:21 -06001592 return 0;
Wu Fengguang079d88c2010-03-08 10:44:23 +08001593}
1594
Stephen Warren384a48d2011-06-01 11:14:21 -06001595static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
Wu Fengguang079d88c2010-03-08 10:44:23 +08001596{
1597 struct hdmi_spec *spec = codec->spec;
Stephen Warren384a48d2011-06-01 11:14:21 -06001598 struct hdmi_spec_per_cvt *per_cvt;
1599 unsigned int chans;
1600 int err;
Wu Fengguang079d88c2010-03-08 10:44:23 +08001601
Stephen Warren384a48d2011-06-01 11:14:21 -06001602 chans = get_wcaps(codec, cvt_nid);
1603 chans = get_wcaps_channels(chans);
1604
Takashi Iwaibce0d2a2013-03-13 14:40:31 +01001605 per_cvt = snd_array_new(&spec->cvts);
1606 if (!per_cvt)
1607 return -ENOMEM;
Stephen Warren384a48d2011-06-01 11:14:21 -06001608
1609 per_cvt->cvt_nid = cvt_nid;
1610 per_cvt->channels_min = 2;
Takashi Iwaid45e6882012-07-31 11:36:00 +02001611 if (chans <= 16) {
Stephen Warren384a48d2011-06-01 11:14:21 -06001612 per_cvt->channels_max = chans;
Subhransu S. Prusty67b90cb2016-03-04 19:59:46 +05301613 if (chans > spec->chmap.channels_max)
1614 spec->chmap.channels_max = chans;
Takashi Iwaid45e6882012-07-31 11:36:00 +02001615 }
Stephen Warren384a48d2011-06-01 11:14:21 -06001616
1617 err = snd_hda_query_supported_pcm(codec, cvt_nid,
1618 &per_cvt->rates,
1619 &per_cvt->formats,
1620 &per_cvt->maxbps);
1621 if (err < 0)
1622 return err;
1623
Takashi Iwaibce0d2a2013-03-13 14:40:31 +01001624 if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1625 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1626 spec->num_cvts++;
Wu Fengguang079d88c2010-03-08 10:44:23 +08001627
1628 return 0;
1629}
1630
1631static int hdmi_parse_codec(struct hda_codec *codec)
1632{
1633 hda_nid_t nid;
1634 int i, nodes;
1635
Takashi Iwai7639a062015-03-03 10:07:24 +01001636 nodes = snd_hda_get_sub_nodes(codec, codec->core.afg, &nid);
Wu Fengguang079d88c2010-03-08 10:44:23 +08001637 if (!nid || nodes < 0) {
Takashi Iwai4e76a882014-02-25 12:21:03 +01001638 codec_warn(codec, "HDMI: failed to get afg sub nodes\n");
Wu Fengguang079d88c2010-03-08 10:44:23 +08001639 return -EINVAL;
1640 }
1641
1642 for (i = 0; i < nodes; i++, nid++) {
1643 unsigned int caps;
1644 unsigned int type;
1645
Takashi Iwaiefc2f8de2012-11-21 14:27:37 +01001646 caps = get_wcaps(codec, nid);
Wu Fengguang079d88c2010-03-08 10:44:23 +08001647 type = get_wcaps_type(caps);
1648
1649 if (!(caps & AC_WCAP_DIGITAL))
1650 continue;
1651
1652 switch (type) {
1653 case AC_WID_AUD_OUT:
Stephen Warren384a48d2011-06-01 11:14:21 -06001654 hdmi_add_cvt(codec, nid);
Wu Fengguang079d88c2010-03-08 10:44:23 +08001655 break;
1656 case AC_WID_PIN:
Wu Fengguang3eaead52010-05-14 16:36:15 +08001657 hdmi_add_pin(codec, nid);
Wu Fengguang079d88c2010-03-08 10:44:23 +08001658 break;
1659 }
1660 }
1661
Wu Fengguang079d88c2010-03-08 10:44:23 +08001662 return 0;
1663}
1664
Takashi Iwai84eb01b2010-09-07 12:27:25 +02001665/*
1666 */
Takashi Iwai1a6003b2012-09-06 17:42:08 +02001667static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1668{
1669 struct hda_spdif_out *spdif;
1670 bool non_pcm;
1671
1672 mutex_lock(&codec->spdif_mutex);
1673 spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1674 non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1675 mutex_unlock(&codec->spdif_mutex);
1676 return non_pcm;
1677}
1678
Takashi Iwai84eb01b2010-09-07 12:27:25 +02001679/*
1680 * HDMI callbacks
1681 */
1682
1683static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1684 struct hda_codec *codec,
1685 unsigned int stream_tag,
1686 unsigned int format,
1687 struct snd_pcm_substream *substream)
1688{
Stephen Warren384a48d2011-06-01 11:14:21 -06001689 hda_nid_t cvt_nid = hinfo->nid;
1690 struct hdmi_spec *spec = codec->spec;
Libin Yang42b29872015-12-16 13:42:42 +08001691 int pin_idx;
1692 struct hdmi_spec_per_pin *per_pin;
1693 hda_nid_t pin_nid;
Libin Yangddd621f2015-09-02 14:11:40 +08001694 struct snd_pcm_runtime *runtime = substream->runtime;
Takashi Iwai1a6003b2012-09-06 17:42:08 +02001695 bool non_pcm;
Stephen Warren75fae112014-01-30 11:52:16 -07001696 int pinctl;
Libin Yang42b29872015-12-16 13:42:42 +08001697 int err;
Takashi Iwai1a6003b2012-09-06 17:42:08 +02001698
Libin Yang42b29872015-12-16 13:42:42 +08001699 mutex_lock(&spec->pcm_lock);
1700 pin_idx = hinfo_to_pin_index(codec, hinfo);
1701 if (spec->dyn_pcm_assign && pin_idx < 0) {
1702 /* when dyn_pcm_assign and pcm is not bound to a pin
1703 * skip pin setup and return 0 to make audio playback
1704 * be ongoing
1705 */
1706 intel_not_share_assigned_cvt_nid(codec, 0, cvt_nid);
1707 snd_hda_codec_setup_stream(codec, cvt_nid,
1708 stream_tag, 0, format);
1709 mutex_unlock(&spec->pcm_lock);
1710 return 0;
1711 }
1712
1713 if (snd_BUG_ON(pin_idx < 0)) {
1714 mutex_unlock(&spec->pcm_lock);
1715 return -EINVAL;
1716 }
1717 per_pin = get_pin(spec, pin_idx);
1718 pin_nid = per_pin->pin_nid;
Libin Yangca2e7222014-08-19 16:20:12 +08001719 if (is_haswell_plus(codec) || is_valleyview_plus(codec)) {
Mengdong Lin2df67422014-03-20 13:01:06 +08001720 /* Verify pin:cvt selections to avoid silent audio after S3.
1721 * After S3, the audio driver restores pin:cvt selections
1722 * but this can happen before gfx is ready and such selection
1723 * is overlooked by HW. Thus multiple pins can share a same
1724 * default convertor and mute control will affect each other,
1725 * which can cause a resumed audio playback become silent
1726 * after S3.
1727 */
1728 intel_verify_pin_cvt_connect(codec, per_pin);
1729 intel_not_share_assigned_cvt(codec, pin_nid, per_pin->mux_idx);
1730 }
1731
Libin Yangddd621f2015-09-02 14:11:40 +08001732 /* Call sync_audio_rate to set the N/CTS/M manually if necessary */
1733 /* Todo: add DP1.2 MST audio support later */
Takashi Iwaie2dc7d72015-12-01 12:39:38 +01001734 snd_hdac_sync_audio_rate(&codec->bus->core, pin_nid, runtime->rate);
Libin Yangddd621f2015-09-02 14:11:40 +08001735
Takashi Iwai1a6003b2012-09-06 17:42:08 +02001736 non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
Takashi Iwaia4e9a382013-10-17 18:21:12 +02001737 mutex_lock(&per_pin->lock);
Takashi Iwaib0540872013-09-02 12:33:02 +02001738 per_pin->channels = substream->runtime->channels;
1739 per_pin->setup = true;
Takashi Iwai84eb01b2010-09-07 12:27:25 +02001740
Takashi Iwaib0540872013-09-02 12:33:02 +02001741 hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
Takashi Iwaia4e9a382013-10-17 18:21:12 +02001742 mutex_unlock(&per_pin->lock);
Stephen Warren75fae112014-01-30 11:52:16 -07001743 if (spec->dyn_pin_out) {
1744 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1745 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1746 snd_hda_codec_write(codec, pin_nid, 0,
1747 AC_VERB_SET_PIN_WIDGET_CONTROL,
1748 pinctl | PIN_OUT);
1749 }
1750
Libin Yang42b29872015-12-16 13:42:42 +08001751 err = spec->ops.setup_stream(codec, cvt_nid, pin_nid,
1752 stream_tag, format);
1753 mutex_unlock(&spec->pcm_lock);
1754 return err;
Takashi Iwai84eb01b2010-09-07 12:27:25 +02001755}
1756
Takashi Iwai8dfaa572012-08-06 14:49:36 +02001757static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1758 struct hda_codec *codec,
1759 struct snd_pcm_substream *substream)
1760{
1761 snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1762 return 0;
1763}
1764
Takashi Iwaif2ad24f2012-07-26 18:08:14 +02001765static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1766 struct hda_codec *codec,
1767 struct snd_pcm_substream *substream)
Stephen Warren384a48d2011-06-01 11:14:21 -06001768{
1769 struct hdmi_spec *spec = codec->spec;
Libin Yang2bf3c852015-12-16 13:42:43 +08001770 int cvt_idx, pin_idx, pcm_idx;
Stephen Warren384a48d2011-06-01 11:14:21 -06001771 struct hdmi_spec_per_cvt *per_cvt;
1772 struct hdmi_spec_per_pin *per_pin;
Stephen Warren75fae112014-01-30 11:52:16 -07001773 int pinctl;
Stephen Warren384a48d2011-06-01 11:14:21 -06001774
Stephen Warren384a48d2011-06-01 11:14:21 -06001775 if (hinfo->nid) {
Libin Yang2bf3c852015-12-16 13:42:43 +08001776 pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1777 if (snd_BUG_ON(pcm_idx < 0))
1778 return -EINVAL;
Takashi Iwai4e76a882014-02-25 12:21:03 +01001779 cvt_idx = cvt_nid_to_cvt_index(codec, hinfo->nid);
Stephen Warren384a48d2011-06-01 11:14:21 -06001780 if (snd_BUG_ON(cvt_idx < 0))
1781 return -EINVAL;
Takashi Iwaibce0d2a2013-03-13 14:40:31 +01001782 per_cvt = get_cvt(spec, cvt_idx);
Stephen Warren384a48d2011-06-01 11:14:21 -06001783
1784 snd_BUG_ON(!per_cvt->assigned);
1785 per_cvt->assigned = 0;
1786 hinfo->nid = 0;
1787
Libin Yang42b29872015-12-16 13:42:42 +08001788 mutex_lock(&spec->pcm_lock);
Libin Yangb09887f82016-01-29 13:53:27 +08001789 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
Libin Yangac983792015-12-16 16:48:16 +08001790 clear_bit(pcm_idx, &spec->pcm_in_use);
Takashi Iwai4e76a882014-02-25 12:21:03 +01001791 pin_idx = hinfo_to_pin_index(codec, hinfo);
Libin Yang42b29872015-12-16 13:42:42 +08001792 if (spec->dyn_pcm_assign && pin_idx < 0) {
1793 mutex_unlock(&spec->pcm_lock);
1794 return 0;
1795 }
1796
1797 if (snd_BUG_ON(pin_idx < 0)) {
1798 mutex_unlock(&spec->pcm_lock);
Stephen Warren384a48d2011-06-01 11:14:21 -06001799 return -EINVAL;
Libin Yang42b29872015-12-16 13:42:42 +08001800 }
Takashi Iwaibce0d2a2013-03-13 14:40:31 +01001801 per_pin = get_pin(spec, pin_idx);
Stephen Warren384a48d2011-06-01 11:14:21 -06001802
Stephen Warren75fae112014-01-30 11:52:16 -07001803 if (spec->dyn_pin_out) {
1804 pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
1805 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1806 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1807 AC_VERB_SET_PIN_WIDGET_CONTROL,
1808 pinctl & ~PIN_OUT);
1809 }
1810
Takashi Iwaia4e9a382013-10-17 18:21:12 +02001811 mutex_lock(&per_pin->lock);
Takashi Iwaid45e6882012-07-31 11:36:00 +02001812 per_pin->chmap_set = false;
1813 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
Takashi Iwaib0540872013-09-02 12:33:02 +02001814
1815 per_pin->setup = false;
1816 per_pin->channels = 0;
Takashi Iwaia4e9a382013-10-17 18:21:12 +02001817 mutex_unlock(&per_pin->lock);
Libin Yang42b29872015-12-16 13:42:42 +08001818 mutex_unlock(&spec->pcm_lock);
Stephen Warren384a48d2011-06-01 11:14:21 -06001819 }
Takashi Iwaid45e6882012-07-31 11:36:00 +02001820
Stephen Warren384a48d2011-06-01 11:14:21 -06001821 return 0;
1822}
1823
1824static const struct hda_pcm_ops generic_ops = {
1825 .open = hdmi_pcm_open,
Takashi Iwaif2ad24f2012-07-26 18:08:14 +02001826 .close = hdmi_pcm_close,
Stephen Warren384a48d2011-06-01 11:14:21 -06001827 .prepare = generic_hdmi_playback_pcm_prepare,
Takashi Iwai8dfaa572012-08-06 14:49:36 +02001828 .cleanup = generic_hdmi_playback_pcm_cleanup,
Takashi Iwai84eb01b2010-09-07 12:27:25 +02001829};
1830
Subhransu S. Prusty9b3dc8a2016-03-04 19:59:47 +05301831static void hdmi_get_chmap(struct hdac_device *hdac, int pcm_idx,
1832 unsigned char *chmap)
1833{
1834 struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
1835 struct hdmi_spec *spec = codec->spec;
1836 struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
1837
1838 /* chmap is already set to 0 in caller */
1839 if (!per_pin)
1840 return;
1841
1842 memcpy(chmap, per_pin->chmap, ARRAY_SIZE(per_pin->chmap));
1843}
1844
1845static void hdmi_set_chmap(struct hdac_device *hdac, int pcm_idx,
1846 unsigned char *chmap, int prepared)
1847{
1848 struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
1849 struct hdmi_spec *spec = codec->spec;
1850 struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
1851
1852 mutex_lock(&per_pin->lock);
1853 per_pin->chmap_set = true;
1854 memcpy(per_pin->chmap, chmap, ARRAY_SIZE(per_pin->chmap));
1855 if (prepared)
1856 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1857 mutex_unlock(&per_pin->lock);
1858}
1859
1860static bool is_hdmi_pcm_attached(struct hdac_device *hdac, int pcm_idx)
1861{
1862 struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
1863 struct hdmi_spec *spec = codec->spec;
1864 struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
1865
1866 return per_pin ? true:false;
1867}
1868
Takashi Iwai84eb01b2010-09-07 12:27:25 +02001869static int generic_hdmi_build_pcms(struct hda_codec *codec)
1870{
1871 struct hdmi_spec *spec = codec->spec;
Stephen Warren384a48d2011-06-01 11:14:21 -06001872 int pin_idx;
Takashi Iwai84eb01b2010-09-07 12:27:25 +02001873
Stephen Warren384a48d2011-06-01 11:14:21 -06001874 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1875 struct hda_pcm *info;
Takashi Iwai84eb01b2010-09-07 12:27:25 +02001876 struct hda_pcm_stream *pstr;
1877
Takashi Iwaibbbc7e82015-02-27 17:43:19 +01001878 info = snd_hda_codec_pcm_new(codec, "HDMI %d", pin_idx);
Takashi Iwaibce0d2a2013-03-13 14:40:31 +01001879 if (!info)
1880 return -ENOMEM;
Libin Yang2bea2412016-01-12 11:13:26 +08001881
1882 spec->pcm_rec[pin_idx].pcm = info;
Libin Yang2bf3c852015-12-16 13:42:43 +08001883 spec->pcm_used++;
Takashi Iwai84eb01b2010-09-07 12:27:25 +02001884 info->pcm_type = HDA_PCM_TYPE_HDMI;
Takashi Iwaid45e6882012-07-31 11:36:00 +02001885 info->own_chmap = true;
Stephen Warren384a48d2011-06-01 11:14:21 -06001886
Takashi Iwai84eb01b2010-09-07 12:27:25 +02001887 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
Stephen Warren384a48d2011-06-01 11:14:21 -06001888 pstr->substreams = 1;
1889 pstr->ops = generic_ops;
1890 /* other pstr fields are set in open */
Takashi Iwai84eb01b2010-09-07 12:27:25 +02001891 }
1892
1893 return 0;
1894}
1895
Libin Yang25e4abb2016-01-12 11:13:27 +08001896static void free_hdmi_jack_priv(struct snd_jack *jack)
Takashi Iwai788d4412015-11-12 15:36:13 +01001897{
Libin Yang25e4abb2016-01-12 11:13:27 +08001898 struct hdmi_pcm *pcm = jack->private_data;
Takashi Iwai788d4412015-11-12 15:36:13 +01001899
Libin Yang25e4abb2016-01-12 11:13:27 +08001900 pcm->jack = NULL;
Takashi Iwai788d4412015-11-12 15:36:13 +01001901}
1902
Libin Yang25e4abb2016-01-12 11:13:27 +08001903static int add_hdmi_jack_kctl(struct hda_codec *codec,
1904 struct hdmi_spec *spec,
1905 int pcm_idx,
Takashi Iwai788d4412015-11-12 15:36:13 +01001906 const char *name)
1907{
1908 struct snd_jack *jack;
1909 int err;
1910
1911 err = snd_jack_new(codec->card, name, SND_JACK_AVOUT, &jack,
1912 true, false);
1913 if (err < 0)
1914 return err;
Libin Yang25e4abb2016-01-12 11:13:27 +08001915
1916 spec->pcm_rec[pcm_idx].jack = jack;
1917 jack->private_data = &spec->pcm_rec[pcm_idx];
1918 jack->private_free = free_hdmi_jack_priv;
Takashi Iwai788d4412015-11-12 15:36:13 +01001919 return 0;
1920}
1921
Libin Yang25e4abb2016-01-12 11:13:27 +08001922static int generic_hdmi_build_jack(struct hda_codec *codec, int pcm_idx)
David Henningsson0b6c49b2011-08-23 16:56:03 +02001923{
Takashi Iwai31ef2252011-12-01 17:41:36 +01001924 char hdmi_str[32] = "HDMI/DP";
David Henningsson0b6c49b2011-08-23 16:56:03 +02001925 struct hdmi_spec *spec = codec->spec;
Libin Yang25e4abb2016-01-12 11:13:27 +08001926 struct hdmi_spec_per_pin *per_pin;
1927 struct hda_jack_tbl *jack;
1928 int pcmdev = get_pcm_rec(spec, pcm_idx)->device;
Takashi Iwai909cadc2015-11-12 11:52:13 +01001929 bool phantom_jack;
Libin Yang25e4abb2016-01-12 11:13:27 +08001930 int ret;
David Henningsson0b6c49b2011-08-23 16:56:03 +02001931
Takashi Iwai31ef2252011-12-01 17:41:36 +01001932 if (pcmdev > 0)
1933 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
Libin Yang25e4abb2016-01-12 11:13:27 +08001934
1935 if (spec->dyn_pcm_assign)
1936 return add_hdmi_jack_kctl(codec, spec, pcm_idx, hdmi_str);
1937
1938 /* for !dyn_pcm_assign, we still use hda_jack for compatibility */
1939 /* if !dyn_pcm_assign, it must be non-MST mode.
1940 * This means pcms and pins are statically mapped.
1941 * And pcm_idx is pin_idx.
1942 */
1943 per_pin = get_pin(spec, pcm_idx);
Takashi Iwai909cadc2015-11-12 11:52:13 +01001944 phantom_jack = !is_jack_detectable(codec, per_pin->pin_nid);
1945 if (phantom_jack)
David Henningsson30efd8d2013-02-22 10:16:28 +01001946 strncat(hdmi_str, " Phantom",
1947 sizeof(hdmi_str) - strlen(hdmi_str) - 1);
Libin Yang25e4abb2016-01-12 11:13:27 +08001948 ret = snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str,
1949 phantom_jack);
1950 if (ret < 0)
1951 return ret;
1952 jack = snd_hda_jack_tbl_get(codec, per_pin->pin_nid);
1953 if (jack == NULL)
1954 return 0;
1955 /* assign jack->jack to pcm_rec[].jack to
1956 * align with dyn_pcm_assign mode
1957 */
1958 spec->pcm_rec[pcm_idx].jack = jack->jack;
1959 return 0;
David Henningsson0b6c49b2011-08-23 16:56:03 +02001960}
1961
Takashi Iwai84eb01b2010-09-07 12:27:25 +02001962static int generic_hdmi_build_controls(struct hda_codec *codec)
1963{
1964 struct hdmi_spec *spec = codec->spec;
1965 int err;
Libin Yang25e4abb2016-01-12 11:13:27 +08001966 int pin_idx, pcm_idx;
1967
1968
1969 for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
1970 err = generic_hdmi_build_jack(codec, pcm_idx);
1971 if (err < 0)
1972 return err;
Libin Yangb09887f82016-01-29 13:53:27 +08001973
1974 /* create the spdif for each pcm
1975 * pin will be bound when monitor is connected
1976 */
1977 if (spec->dyn_pcm_assign)
1978 err = snd_hda_create_dig_out_ctls(codec,
1979 0, spec->cvt_nids[0],
1980 HDA_PCM_TYPE_HDMI);
1981 else {
1982 struct hdmi_spec_per_pin *per_pin =
1983 get_pin(spec, pcm_idx);
1984 err = snd_hda_create_dig_out_ctls(codec,
1985 per_pin->pin_nid,
1986 per_pin->mux_nids[0],
1987 HDA_PCM_TYPE_HDMI);
1988 }
1989 if (err < 0)
1990 return err;
1991 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
Libin Yangfb087ea2016-02-23 16:33:37 +08001992
1993 /* add control for ELD Bytes */
1994 err = hdmi_create_eld_ctl(codec, pcm_idx,
1995 get_pcm_rec(spec, pcm_idx)->device);
1996 if (err < 0)
1997 return err;
Libin Yang25e4abb2016-01-12 11:13:27 +08001998 }
Takashi Iwai84eb01b2010-09-07 12:27:25 +02001999
Stephen Warren384a48d2011-06-01 11:14:21 -06002000 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
Takashi Iwaibce0d2a2013-03-13 14:40:31 +01002001 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
David Henningsson0b6c49b2011-08-23 16:56:03 +02002002
Takashi Iwai82b1d732011-12-20 15:53:07 +01002003 hdmi_present_sense(per_pin, 0);
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002004 }
2005
Takashi Iwaid45e6882012-07-31 11:36:00 +02002006 /* add channel maps */
Libin Yang022f3442016-02-03 10:48:34 +08002007 for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
Takashi Iwaibbbc7e82015-02-27 17:43:19 +01002008 struct hda_pcm *pcm;
Takashi Iwai2ca320e2013-08-22 09:55:36 +02002009
Libin Yang022f3442016-02-03 10:48:34 +08002010 pcm = get_pcm_rec(spec, pcm_idx);
Takashi Iwaibbbc7e82015-02-27 17:43:19 +01002011 if (!pcm || !pcm->pcm)
Takashi Iwai2ca320e2013-08-22 09:55:36 +02002012 break;
Subhransu S. Prusty2f6e8a82016-03-04 19:59:51 +05302013 err = snd_hdac_add_chmap_ctls(pcm->pcm, pcm_idx, &spec->chmap);
Takashi Iwaid45e6882012-07-31 11:36:00 +02002014 if (err < 0)
2015 return err;
Takashi Iwaid45e6882012-07-31 11:36:00 +02002016 }
2017
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002018 return 0;
2019}
2020
Takashi Iwai8b8d6542012-06-20 16:32:22 +02002021static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2022{
2023 struct hdmi_spec *spec = codec->spec;
2024 int pin_idx;
2025
2026 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
Takashi Iwaibce0d2a2013-03-13 14:40:31 +01002027 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
Takashi Iwai8b8d6542012-06-20 16:32:22 +02002028
2029 per_pin->codec = codec;
Takashi Iwaia4e9a382013-10-17 18:21:12 +02002030 mutex_init(&per_pin->lock);
Takashi Iwai8b8d6542012-06-20 16:32:22 +02002031 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
Takashi Iwaia4e9a382013-10-17 18:21:12 +02002032 eld_proc_new(per_pin, pin_idx);
Takashi Iwai8b8d6542012-06-20 16:32:22 +02002033 }
2034 return 0;
2035}
2036
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002037static int generic_hdmi_init(struct hda_codec *codec)
2038{
2039 struct hdmi_spec *spec = codec->spec;
Stephen Warren384a48d2011-06-01 11:14:21 -06002040 int pin_idx;
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002041
Stephen Warren384a48d2011-06-01 11:14:21 -06002042 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
Takashi Iwaibce0d2a2013-03-13 14:40:31 +01002043 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
Stephen Warren384a48d2011-06-01 11:14:21 -06002044 hda_nid_t pin_nid = per_pin->pin_nid;
Stephen Warren384a48d2011-06-01 11:14:21 -06002045
2046 hdmi_init_pin(codec, pin_nid);
Takashi Iwai788d4412015-11-12 15:36:13 +01002047 if (!codec_has_acomp(codec))
2048 snd_hda_jack_detect_enable_callback(codec, pin_nid,
2049 codec->jackpoll_interval > 0 ?
2050 jack_callback : NULL);
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002051 }
2052 return 0;
2053}
2054
Takashi Iwaibce0d2a2013-03-13 14:40:31 +01002055static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2056{
2057 snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2058 snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
Takashi Iwaibce0d2a2013-03-13 14:40:31 +01002059}
2060
2061static void hdmi_array_free(struct hdmi_spec *spec)
2062{
2063 snd_array_free(&spec->pins);
2064 snd_array_free(&spec->cvts);
Takashi Iwaibce0d2a2013-03-13 14:40:31 +01002065}
2066
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002067static void generic_hdmi_free(struct hda_codec *codec)
2068{
2069 struct hdmi_spec *spec = codec->spec;
Libin Yang25e4abb2016-01-12 11:13:27 +08002070 int pin_idx, pcm_idx;
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002071
Takashi Iwai66032492015-12-01 16:49:35 +01002072 if (codec_has_acomp(codec))
David Henningsson25adc132015-08-19 10:48:58 +02002073 snd_hdac_i915_register_notifier(NULL);
2074
Stephen Warren384a48d2011-06-01 11:14:21 -06002075 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
Takashi Iwaibce0d2a2013-03-13 14:40:31 +01002076 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
Takashi Iwai2f35c632015-02-27 22:43:26 +01002077 cancel_delayed_work_sync(&per_pin->work);
Takashi Iwaia4e9a382013-10-17 18:21:12 +02002078 eld_proc_free(per_pin);
Libin Yang25e4abb2016-01-12 11:13:27 +08002079 }
2080
2081 for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2082 if (spec->pcm_rec[pcm_idx].jack == NULL)
2083 continue;
2084 if (spec->dyn_pcm_assign)
2085 snd_device_free(codec->card,
2086 spec->pcm_rec[pcm_idx].jack);
2087 else
2088 spec->pcm_rec[pcm_idx].jack = NULL;
Stephen Warren384a48d2011-06-01 11:14:21 -06002089 }
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002090
Takashi Iwai55913112015-12-10 13:03:29 +01002091 if (spec->i915_bound)
2092 snd_hdac_i915_exit(&codec->bus->core);
Takashi Iwaibce0d2a2013-03-13 14:40:31 +01002093 hdmi_array_free(spec);
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002094 kfree(spec);
2095}
2096
Wang Xingchao28cb72e2013-06-24 07:45:23 -04002097#ifdef CONFIG_PM
2098static int generic_hdmi_resume(struct hda_codec *codec)
2099{
2100 struct hdmi_spec *spec = codec->spec;
2101 int pin_idx;
2102
Pierre Ossmana2833682014-06-18 21:48:09 +02002103 codec->patch_ops.init(codec);
Takashi Iwaieeecd9d2015-02-25 15:18:50 +01002104 regcache_sync(codec->core.regmap);
Wang Xingchao28cb72e2013-06-24 07:45:23 -04002105
2106 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2107 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2108 hdmi_present_sense(per_pin, 1);
2109 }
2110 return 0;
2111}
2112#endif
2113
Takashi Iwaifb79e1e2011-05-02 12:17:41 +02002114static const struct hda_codec_ops generic_hdmi_patch_ops = {
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002115 .init = generic_hdmi_init,
2116 .free = generic_hdmi_free,
2117 .build_pcms = generic_hdmi_build_pcms,
2118 .build_controls = generic_hdmi_build_controls,
2119 .unsol_event = hdmi_unsol_event,
Wang Xingchao28cb72e2013-06-24 07:45:23 -04002120#ifdef CONFIG_PM
2121 .resume = generic_hdmi_resume,
2122#endif
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002123};
2124
Anssi Hannula307229d2013-10-24 21:10:34 +03002125static const struct hdmi_ops generic_standard_hdmi_ops = {
2126 .pin_get_eld = snd_hdmi_get_eld,
Anssi Hannula307229d2013-10-24 21:10:34 +03002127 .pin_setup_infoframe = hdmi_pin_setup_infoframe,
2128 .pin_hbr_setup = hdmi_pin_hbr_setup,
2129 .setup_stream = hdmi_setup_stream,
Subhransu S. Prusty67b90cb2016-03-04 19:59:46 +05302130};
2131
Takashi Iwaic88d4e82013-02-08 17:10:04 -05002132static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2133 hda_nid_t nid)
Mengdong Lin6ffe1682012-12-18 16:59:15 -05002134{
Takashi Iwaic88d4e82013-02-08 17:10:04 -05002135 struct hdmi_spec *spec = codec->spec;
2136 hda_nid_t conns[4];
2137 int nconns;
Mengdong Lin6ffe1682012-12-18 16:59:15 -05002138
Takashi Iwaic88d4e82013-02-08 17:10:04 -05002139 nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
2140 if (nconns == spec->num_cvts &&
2141 !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
Mengdong Lin6ffe1682012-12-18 16:59:15 -05002142 return;
2143
Takashi Iwaic88d4e82013-02-08 17:10:04 -05002144 /* override pins connection list */
Takashi Iwai4e76a882014-02-25 12:21:03 +01002145 codec_dbg(codec, "hdmi: haswell: override pin connection 0x%x\n", nid);
Takashi Iwaic88d4e82013-02-08 17:10:04 -05002146 snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
Mengdong Lin6ffe1682012-12-18 16:59:15 -05002147}
2148
Mengdong Lin1611a9c2013-02-08 17:09:52 -05002149#define INTEL_VENDOR_NID 0x08
2150#define INTEL_GET_VENDOR_VERB 0xf81
2151#define INTEL_SET_VENDOR_VERB 0x781
2152#define INTEL_EN_DP12 0x02 /* enable DP 1.2 features */
2153#define INTEL_EN_ALL_PIN_CVTS 0x01 /* enable 2nd & 3rd pins and convertors */
2154
2155static void intel_haswell_enable_all_pins(struct hda_codec *codec,
Takashi Iwai17df3f52013-05-08 08:09:34 +02002156 bool update_tree)
Mengdong Lin1611a9c2013-02-08 17:09:52 -05002157{
2158 unsigned int vendor_param;
2159
Mengdong Lin1611a9c2013-02-08 17:09:52 -05002160 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2161 INTEL_GET_VENDOR_VERB, 0);
2162 if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2163 return;
2164
2165 vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2166 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2167 INTEL_SET_VENDOR_VERB, vendor_param);
2168 if (vendor_param == -1)
2169 return;
2170
Takashi Iwai17df3f52013-05-08 08:09:34 +02002171 if (update_tree)
2172 snd_hda_codec_update_widgets(codec);
Mengdong Lin1611a9c2013-02-08 17:09:52 -05002173}
2174
Takashi Iwaic88d4e82013-02-08 17:10:04 -05002175static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2176{
2177 unsigned int vendor_param;
2178
2179 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2180 INTEL_GET_VENDOR_VERB, 0);
2181 if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2182 return;
2183
2184 /* enable DP1.2 mode */
2185 vendor_param |= INTEL_EN_DP12;
Takashi Iwaia551d912015-02-26 12:34:49 +01002186 snd_hdac_regmap_add_vendor_verb(&codec->core, INTEL_SET_VENDOR_VERB);
Takashi Iwaic88d4e82013-02-08 17:10:04 -05002187 snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
2188 INTEL_SET_VENDOR_VERB, vendor_param);
2189}
2190
Takashi Iwai17df3f52013-05-08 08:09:34 +02002191/* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2192 * Otherwise you may get severe h/w communication errors.
2193 */
2194static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2195 unsigned int power_state)
2196{
2197 if (power_state == AC_PWRST_D0) {
2198 intel_haswell_enable_all_pins(codec, false);
2199 intel_haswell_fixup_enable_dp12(codec);
2200 }
Takashi Iwaic88d4e82013-02-08 17:10:04 -05002201
Takashi Iwai17df3f52013-05-08 08:09:34 +02002202 snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2203 snd_hda_codec_set_power_to_all(codec, fg, power_state);
2204}
Mengdong Lin6ffe1682012-12-18 16:59:15 -05002205
David Henningssonf0675d42015-09-03 11:51:34 +02002206static void intel_pin_eld_notify(void *audio_ptr, int port)
David Henningsson25adc132015-08-19 10:48:58 +02002207{
2208 struct hda_codec *codec = audio_ptr;
2209 int pin_nid = port + 0x04;
2210
Takashi Iwai4f8e4f32016-03-10 12:02:49 +01002211 /* we assume only from port-B to port-D */
2212 if (port < 1 || port > 3)
2213 return;
2214
Takashi Iwai8ae743e2015-11-27 14:23:00 +01002215 /* skip notification during system suspend (but not in runtime PM);
2216 * the state will be updated at resume
2217 */
2218 if (snd_power_get_state(codec->card) != SNDRV_CTL_POWER_D0)
2219 return;
Takashi Iwaieb399d32015-11-27 14:53:35 +01002220 /* ditto during suspend/resume process itself */
2221 if (atomic_read(&(codec)->core.in_pm))
2222 return;
Takashi Iwai8ae743e2015-11-27 14:23:00 +01002223
David Henningsson25adc132015-08-19 10:48:58 +02002224 check_presence_and_report(codec, pin_nid);
2225}
2226
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002227static int patch_generic_hdmi(struct hda_codec *codec)
2228{
2229 struct hdmi_spec *spec;
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002230
2231 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2232 if (spec == NULL)
2233 return -ENOMEM;
2234
Anssi Hannula307229d2013-10-24 21:10:34 +03002235 spec->ops = generic_standard_hdmi_ops;
Libin Yang42b29872015-12-16 13:42:42 +08002236 mutex_init(&spec->pcm_lock);
Subhransu S. Prusty739ffee2016-03-04 19:59:49 +05302237 snd_hdac_register_chmap_ops(&codec->core, &spec->chmap);
2238
Subhransu S. Prusty739ffee2016-03-04 19:59:49 +05302239 spec->chmap.ops.get_chmap = hdmi_get_chmap;
2240 spec->chmap.ops.set_chmap = hdmi_set_chmap;
2241 spec->chmap.ops.is_pcm_attached = is_hdmi_pcm_attached;
2242
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002243 codec->spec = spec;
Takashi Iwaibce0d2a2013-03-13 14:40:31 +01002244 hdmi_array_init(spec, 4);
Mengdong Lin6ffe1682012-12-18 16:59:15 -05002245
Takashi Iwaib62232d2016-03-15 18:15:26 +01002246 /* Try to bind with i915 for Intel HSW+ codecs (if not done yet) */
Takashi Iwai55913112015-12-10 13:03:29 +01002247 if (!codec_has_acomp(codec) &&
Takashi Iwaib62232d2016-03-15 18:15:26 +01002248 (codec->core.vendor_id >> 16) == 0x8086 &&
2249 is_haswell_plus(codec))
Takashi Iwai55913112015-12-10 13:03:29 +01002250 if (!snd_hdac_i915_init(&codec->bus->core))
2251 spec->i915_bound = true;
2252
Mengdong Lin75dcbe42014-01-08 15:55:32 -05002253 if (is_haswell_plus(codec)) {
Takashi Iwai17df3f52013-05-08 08:09:34 +02002254 intel_haswell_enable_all_pins(codec, true);
Takashi Iwaic88d4e82013-02-08 17:10:04 -05002255 intel_haswell_fixup_enable_dp12(codec);
Takashi Iwai17df3f52013-05-08 08:09:34 +02002256 }
Mengdong Lin6ffe1682012-12-18 16:59:15 -05002257
Mengdong Lin2bd1f73f2015-04-29 17:43:43 +08002258 /* For Valleyview/Cherryview, only the display codec is in the display
2259 * power well and can use link_power ops to request/release the power.
2260 * For Haswell/Broadwell, the controller is also in the power well and
2261 * can cover the codec power request, and so need not set this flag.
2262 * For previous platforms, there is no such power well feature.
2263 */
Lu, Hanff9d8852015-11-19 23:25:13 +08002264 if (is_valleyview_plus(codec) || is_skylake(codec) ||
2265 is_broxton(codec))
Mengdong Lin2bd1f73f2015-04-29 17:43:43 +08002266 codec->core.link_power_control = 1;
2267
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002268 if (hdmi_parse_codec(codec) < 0) {
Takashi Iwai55913112015-12-10 13:03:29 +01002269 if (spec->i915_bound)
2270 snd_hdac_i915_exit(&codec->bus->core);
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002271 codec->spec = NULL;
2272 kfree(spec);
2273 return -EINVAL;
2274 }
2275 codec->patch_ops = generic_hdmi_patch_ops;
Mengdong Lin75dcbe42014-01-08 15:55:32 -05002276 if (is_haswell_plus(codec)) {
Takashi Iwai17df3f52013-05-08 08:09:34 +02002277 codec->patch_ops.set_power_state = haswell_set_power_state;
Mengdong Lin5dc989b2013-08-26 21:35:41 -04002278 codec->dp_mst = true;
2279 }
Takashi Iwai17df3f52013-05-08 08:09:34 +02002280
Lu, Han2377c3c2015-06-09 16:50:38 +08002281 /* Enable runtime pm for HDMI audio codec of HSW/BDW/SKL/BYT/BSW */
2282 if (is_haswell_plus(codec) || is_valleyview_plus(codec))
2283 codec->auto_runtime_pm = 1;
2284
Takashi Iwai8b8d6542012-06-20 16:32:22 +02002285 generic_hdmi_init_per_pins(codec);
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002286
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002287
Libin Yang790b4152016-03-04 14:33:43 +08002288 if (codec_has_acomp(codec)) {
2289 codec->depop_delay = 0;
2290 spec->i915_audio_ops.audio_ptr = codec;
2291 /* intel_audio_codec_enable() or intel_audio_codec_disable()
2292 * will call pin_eld_notify with using audio_ptr pointer
2293 * We need make sure audio_ptr is really setup
2294 */
2295 wmb();
2296 spec->i915_audio_ops.pin_eld_notify = intel_pin_eld_notify;
2297 snd_hdac_i915_register_notifier(&spec->i915_audio_ops);
2298 }
2299
Libin Yang25e4abb2016-01-12 11:13:27 +08002300 WARN_ON(spec->dyn_pcm_assign && !codec_has_acomp(codec));
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002301 return 0;
2302}
2303
2304/*
Stephen Warren3aaf8982011-06-01 11:14:19 -06002305 * Shared non-generic implementations
2306 */
2307
2308static int simple_playback_build_pcms(struct hda_codec *codec)
2309{
2310 struct hdmi_spec *spec = codec->spec;
Takashi Iwaibce0d2a2013-03-13 14:40:31 +01002311 struct hda_pcm *info;
Takashi Iwai8ceb3322012-06-21 08:23:27 +02002312 unsigned int chans;
2313 struct hda_pcm_stream *pstr;
Takashi Iwaibce0d2a2013-03-13 14:40:31 +01002314 struct hdmi_spec_per_cvt *per_cvt;
Stephen Warren3aaf8982011-06-01 11:14:19 -06002315
Takashi Iwaibce0d2a2013-03-13 14:40:31 +01002316 per_cvt = get_cvt(spec, 0);
2317 chans = get_wcaps(codec, per_cvt->cvt_nid);
Takashi Iwai8ceb3322012-06-21 08:23:27 +02002318 chans = get_wcaps_channels(chans);
Stephen Warren3aaf8982011-06-01 11:14:19 -06002319
Takashi Iwaibbbc7e82015-02-27 17:43:19 +01002320 info = snd_hda_codec_pcm_new(codec, "HDMI 0");
Takashi Iwaibce0d2a2013-03-13 14:40:31 +01002321 if (!info)
2322 return -ENOMEM;
Libin Yang2bea2412016-01-12 11:13:26 +08002323 spec->pcm_rec[0].pcm = info;
Takashi Iwai8ceb3322012-06-21 08:23:27 +02002324 info->pcm_type = HDA_PCM_TYPE_HDMI;
2325 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2326 *pstr = spec->pcm_playback;
Takashi Iwaibce0d2a2013-03-13 14:40:31 +01002327 pstr->nid = per_cvt->cvt_nid;
Takashi Iwai8ceb3322012-06-21 08:23:27 +02002328 if (pstr->channels_max <= 2 && chans && chans <= 16)
2329 pstr->channels_max = chans;
Stephen Warren3aaf8982011-06-01 11:14:19 -06002330
2331 return 0;
2332}
2333
Takashi Iwai4b6ace92012-06-15 11:53:32 +02002334/* unsolicited event for jack sensing */
2335static void simple_hdmi_unsol_event(struct hda_codec *codec,
2336 unsigned int res)
2337{
Takashi Iwai9dd8cf12012-06-21 10:43:15 +02002338 snd_hda_jack_set_dirty_all(codec);
Takashi Iwai4b6ace92012-06-15 11:53:32 +02002339 snd_hda_jack_report_sync(codec);
2340}
2341
2342/* generic_hdmi_build_jack can be used for simple_hdmi, too,
2343 * as long as spec->pins[] is set correctly
2344 */
2345#define simple_hdmi_build_jack generic_hdmi_build_jack
2346
Stephen Warren3aaf8982011-06-01 11:14:19 -06002347static int simple_playback_build_controls(struct hda_codec *codec)
2348{
2349 struct hdmi_spec *spec = codec->spec;
Takashi Iwaibce0d2a2013-03-13 14:40:31 +01002350 struct hdmi_spec_per_cvt *per_cvt;
Stephen Warren3aaf8982011-06-01 11:14:19 -06002351 int err;
Stephen Warren3aaf8982011-06-01 11:14:19 -06002352
Takashi Iwaibce0d2a2013-03-13 14:40:31 +01002353 per_cvt = get_cvt(spec, 0);
Anssi Hannulac9a63382013-12-10 22:46:34 +02002354 err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
2355 per_cvt->cvt_nid,
2356 HDA_PCM_TYPE_HDMI);
Takashi Iwai8ceb3322012-06-21 08:23:27 +02002357 if (err < 0)
2358 return err;
2359 return simple_hdmi_build_jack(codec, 0);
Stephen Warren3aaf8982011-06-01 11:14:19 -06002360}
2361
Takashi Iwai4f0110c2012-06-15 12:45:43 +02002362static int simple_playback_init(struct hda_codec *codec)
2363{
2364 struct hdmi_spec *spec = codec->spec;
Takashi Iwaibce0d2a2013-03-13 14:40:31 +01002365 struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
2366 hda_nid_t pin = per_pin->pin_nid;
Takashi Iwai4f0110c2012-06-15 12:45:43 +02002367
Takashi Iwai8ceb3322012-06-21 08:23:27 +02002368 snd_hda_codec_write(codec, pin, 0,
2369 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
2370 /* some codecs require to unmute the pin */
2371 if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
2372 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
2373 AMP_OUT_UNMUTE);
Takashi Iwai62f949b2014-09-11 14:06:53 +02002374 snd_hda_jack_detect_enable(codec, pin);
Takashi Iwai4f0110c2012-06-15 12:45:43 +02002375 return 0;
2376}
2377
Stephen Warren3aaf8982011-06-01 11:14:19 -06002378static void simple_playback_free(struct hda_codec *codec)
2379{
2380 struct hdmi_spec *spec = codec->spec;
2381
Takashi Iwaibce0d2a2013-03-13 14:40:31 +01002382 hdmi_array_free(spec);
Stephen Warren3aaf8982011-06-01 11:14:19 -06002383 kfree(spec);
2384}
2385
2386/*
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002387 * Nvidia specific implementations
2388 */
2389
2390#define Nv_VERB_SET_Channel_Allocation 0xF79
2391#define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
2392#define Nv_VERB_SET_Audio_Protection_On 0xF98
2393#define Nv_VERB_SET_Audio_Protection_Off 0xF99
2394
2395#define nvhdmi_master_con_nid_7x 0x04
2396#define nvhdmi_master_pin_nid_7x 0x05
2397
Takashi Iwaifb79e1e2011-05-02 12:17:41 +02002398static const hda_nid_t nvhdmi_con_nids_7x[4] = {
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002399 /*front, rear, clfe, rear_surr */
2400 0x6, 0x8, 0xa, 0xc,
2401};
2402
Takashi Iwaiceaa86b2012-06-15 14:38:31 +02002403static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
2404 /* set audio protect on */
2405 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2406 /* enable digital output on pin widget */
2407 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2408 {} /* terminator */
2409};
2410
2411static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002412 /* set audio protect on */
2413 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2414 /* enable digital output on pin widget */
2415 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2416 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2417 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2418 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2419 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2420 {} /* terminator */
2421};
2422
2423#ifdef LIMITED_RATE_FMT_SUPPORT
2424/* support only the safe format and rate */
2425#define SUPPORTED_RATES SNDRV_PCM_RATE_48000
2426#define SUPPORTED_MAXBPS 16
2427#define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
2428#else
2429/* support all rates and formats */
2430#define SUPPORTED_RATES \
2431 (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2432 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2433 SNDRV_PCM_RATE_192000)
2434#define SUPPORTED_MAXBPS 24
2435#define SUPPORTED_FORMATS \
2436 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2437#endif
2438
Takashi Iwaiceaa86b2012-06-15 14:38:31 +02002439static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002440{
Takashi Iwaiceaa86b2012-06-15 14:38:31 +02002441 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
2442 return 0;
2443}
2444
2445static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
2446{
2447 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002448 return 0;
2449}
2450
Nitin Daga393004b2011-01-10 21:49:31 +05302451static unsigned int channels_2_6_8[] = {
2452 2, 6, 8
2453};
2454
2455static unsigned int channels_2_8[] = {
2456 2, 8
2457};
2458
2459static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
2460 .count = ARRAY_SIZE(channels_2_6_8),
2461 .list = channels_2_6_8,
2462 .mask = 0,
2463};
2464
2465static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
2466 .count = ARRAY_SIZE(channels_2_8),
2467 .list = channels_2_8,
2468 .mask = 0,
2469};
2470
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002471static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
2472 struct hda_codec *codec,
2473 struct snd_pcm_substream *substream)
2474{
2475 struct hdmi_spec *spec = codec->spec;
Nitin Daga393004b2011-01-10 21:49:31 +05302476 struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
2477
Takashi Iwaib9a94a92015-10-01 16:20:04 +02002478 switch (codec->preset->vendor_id) {
Nitin Daga393004b2011-01-10 21:49:31 +05302479 case 0x10de0002:
2480 case 0x10de0003:
2481 case 0x10de0005:
2482 case 0x10de0006:
2483 hw_constraints_channels = &hw_constraints_2_8_channels;
2484 break;
2485 case 0x10de0007:
2486 hw_constraints_channels = &hw_constraints_2_6_8_channels;
2487 break;
2488 default:
2489 break;
2490 }
2491
2492 if (hw_constraints_channels != NULL) {
2493 snd_pcm_hw_constraint_list(substream->runtime, 0,
2494 SNDRV_PCM_HW_PARAM_CHANNELS,
2495 hw_constraints_channels);
Takashi Iwaiad09fc92011-01-14 09:42:27 +01002496 } else {
2497 snd_pcm_hw_constraint_step(substream->runtime, 0,
2498 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
Nitin Daga393004b2011-01-10 21:49:31 +05302499 }
2500
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002501 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2502}
2503
2504static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
2505 struct hda_codec *codec,
2506 struct snd_pcm_substream *substream)
2507{
2508 struct hdmi_spec *spec = codec->spec;
2509 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2510}
2511
2512static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2513 struct hda_codec *codec,
2514 unsigned int stream_tag,
2515 unsigned int format,
2516 struct snd_pcm_substream *substream)
2517{
2518 struct hdmi_spec *spec = codec->spec;
2519 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2520 stream_tag, format, substream);
2521}
2522
Takashi Iwaid0b12522012-06-15 14:34:42 +02002523static const struct hda_pcm_stream simple_pcm_playback = {
2524 .substreams = 1,
2525 .channels_min = 2,
2526 .channels_max = 2,
2527 .ops = {
2528 .open = simple_playback_pcm_open,
2529 .close = simple_playback_pcm_close,
2530 .prepare = simple_playback_pcm_prepare
2531 },
2532};
2533
2534static const struct hda_codec_ops simple_hdmi_patch_ops = {
2535 .build_controls = simple_playback_build_controls,
2536 .build_pcms = simple_playback_build_pcms,
2537 .init = simple_playback_init,
2538 .free = simple_playback_free,
Takashi Iwai250e41a2012-06-15 14:40:21 +02002539 .unsol_event = simple_hdmi_unsol_event,
Takashi Iwaid0b12522012-06-15 14:34:42 +02002540};
2541
2542static int patch_simple_hdmi(struct hda_codec *codec,
2543 hda_nid_t cvt_nid, hda_nid_t pin_nid)
2544{
2545 struct hdmi_spec *spec;
Takashi Iwaibce0d2a2013-03-13 14:40:31 +01002546 struct hdmi_spec_per_cvt *per_cvt;
2547 struct hdmi_spec_per_pin *per_pin;
Takashi Iwaid0b12522012-06-15 14:34:42 +02002548
2549 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2550 if (!spec)
2551 return -ENOMEM;
2552
2553 codec->spec = spec;
Takashi Iwaibce0d2a2013-03-13 14:40:31 +01002554 hdmi_array_init(spec, 1);
Takashi Iwaid0b12522012-06-15 14:34:42 +02002555
2556 spec->multiout.num_dacs = 0; /* no analog */
2557 spec->multiout.max_channels = 2;
2558 spec->multiout.dig_out_nid = cvt_nid;
2559 spec->num_cvts = 1;
2560 spec->num_pins = 1;
Takashi Iwaibce0d2a2013-03-13 14:40:31 +01002561 per_pin = snd_array_new(&spec->pins);
2562 per_cvt = snd_array_new(&spec->cvts);
2563 if (!per_pin || !per_cvt) {
2564 simple_playback_free(codec);
2565 return -ENOMEM;
2566 }
2567 per_cvt->cvt_nid = cvt_nid;
2568 per_pin->pin_nid = pin_nid;
Takashi Iwaid0b12522012-06-15 14:34:42 +02002569 spec->pcm_playback = simple_pcm_playback;
2570
2571 codec->patch_ops = simple_hdmi_patch_ops;
2572
2573 return 0;
2574}
2575
Aaron Plattner1f348522011-04-06 17:19:04 -07002576static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
2577 int channels)
2578{
2579 unsigned int chanmask;
2580 int chan = channels ? (channels - 1) : 1;
2581
2582 switch (channels) {
2583 default:
2584 case 0:
2585 case 2:
2586 chanmask = 0x00;
2587 break;
2588 case 4:
2589 chanmask = 0x08;
2590 break;
2591 case 6:
2592 chanmask = 0x0b;
2593 break;
2594 case 8:
2595 chanmask = 0x13;
2596 break;
2597 }
2598
2599 /* Set the audio infoframe channel allocation and checksum fields. The
2600 * channel count is computed implicitly by the hardware. */
2601 snd_hda_codec_write(codec, 0x1, 0,
2602 Nv_VERB_SET_Channel_Allocation, chanmask);
2603
2604 snd_hda_codec_write(codec, 0x1, 0,
2605 Nv_VERB_SET_Info_Frame_Checksum,
2606 (0x71 - chan - chanmask));
2607}
2608
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002609static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
2610 struct hda_codec *codec,
2611 struct snd_pcm_substream *substream)
2612{
2613 struct hdmi_spec *spec = codec->spec;
2614 int i;
2615
2616 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
2617 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
2618 for (i = 0; i < 4; i++) {
2619 /* set the stream id */
2620 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2621 AC_VERB_SET_CHANNEL_STREAMID, 0);
2622 /* set the stream format */
2623 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2624 AC_VERB_SET_STREAM_FORMAT, 0);
2625 }
2626
Aaron Plattner1f348522011-04-06 17:19:04 -07002627 /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2628 * streams are disabled. */
2629 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2630
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002631 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2632}
2633
2634static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
2635 struct hda_codec *codec,
2636 unsigned int stream_tag,
2637 unsigned int format,
2638 struct snd_pcm_substream *substream)
2639{
2640 int chs;
Takashi Iwai112daa72011-11-02 21:40:06 +01002641 unsigned int dataDCC2, channel_id;
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002642 int i;
Stephen Warren7c935972011-06-01 11:14:17 -06002643 struct hdmi_spec *spec = codec->spec;
Takashi Iwaie3245cd2012-05-10 10:21:29 +02002644 struct hda_spdif_out *spdif;
Takashi Iwaibce0d2a2013-03-13 14:40:31 +01002645 struct hdmi_spec_per_cvt *per_cvt;
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002646
2647 mutex_lock(&codec->spdif_mutex);
Takashi Iwaibce0d2a2013-03-13 14:40:31 +01002648 per_cvt = get_cvt(spec, 0);
2649 spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002650
2651 chs = substream->runtime->channels;
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002652
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002653 dataDCC2 = 0x2;
2654
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002655 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
Stephen Warren7c935972011-06-01 11:14:17 -06002656 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002657 snd_hda_codec_write(codec,
2658 nvhdmi_master_con_nid_7x,
2659 0,
2660 AC_VERB_SET_DIGI_CONVERT_1,
Stephen Warren7c935972011-06-01 11:14:17 -06002661 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002662
2663 /* set the stream id */
2664 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2665 AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
2666
2667 /* set the stream format */
2668 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2669 AC_VERB_SET_STREAM_FORMAT, format);
2670
2671 /* turn on again (if needed) */
2672 /* enable and set the channel status audio/data flag */
Stephen Warren7c935972011-06-01 11:14:17 -06002673 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002674 snd_hda_codec_write(codec,
2675 nvhdmi_master_con_nid_7x,
2676 0,
2677 AC_VERB_SET_DIGI_CONVERT_1,
Stephen Warren7c935972011-06-01 11:14:17 -06002678 spdif->ctls & 0xff);
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002679 snd_hda_codec_write(codec,
2680 nvhdmi_master_con_nid_7x,
2681 0,
2682 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2683 }
2684
2685 for (i = 0; i < 4; i++) {
2686 if (chs == 2)
2687 channel_id = 0;
2688 else
2689 channel_id = i * 2;
2690
2691 /* turn off SPDIF once;
2692 *otherwise the IEC958 bits won't be updated
2693 */
2694 if (codec->spdif_status_reset &&
Stephen Warren7c935972011-06-01 11:14:17 -06002695 (spdif->ctls & AC_DIG1_ENABLE))
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002696 snd_hda_codec_write(codec,
2697 nvhdmi_con_nids_7x[i],
2698 0,
2699 AC_VERB_SET_DIGI_CONVERT_1,
Stephen Warren7c935972011-06-01 11:14:17 -06002700 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002701 /* set the stream id */
2702 snd_hda_codec_write(codec,
2703 nvhdmi_con_nids_7x[i],
2704 0,
2705 AC_VERB_SET_CHANNEL_STREAMID,
2706 (stream_tag << 4) | channel_id);
2707 /* set the stream format */
2708 snd_hda_codec_write(codec,
2709 nvhdmi_con_nids_7x[i],
2710 0,
2711 AC_VERB_SET_STREAM_FORMAT,
2712 format);
2713 /* turn on again (if needed) */
2714 /* enable and set the channel status audio/data flag */
2715 if (codec->spdif_status_reset &&
Stephen Warren7c935972011-06-01 11:14:17 -06002716 (spdif->ctls & AC_DIG1_ENABLE)) {
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002717 snd_hda_codec_write(codec,
2718 nvhdmi_con_nids_7x[i],
2719 0,
2720 AC_VERB_SET_DIGI_CONVERT_1,
Stephen Warren7c935972011-06-01 11:14:17 -06002721 spdif->ctls & 0xff);
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002722 snd_hda_codec_write(codec,
2723 nvhdmi_con_nids_7x[i],
2724 0,
2725 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2726 }
2727 }
2728
Aaron Plattner1f348522011-04-06 17:19:04 -07002729 nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002730
2731 mutex_unlock(&codec->spdif_mutex);
2732 return 0;
2733}
2734
Takashi Iwaifb79e1e2011-05-02 12:17:41 +02002735static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002736 .substreams = 1,
2737 .channels_min = 2,
2738 .channels_max = 8,
2739 .nid = nvhdmi_master_con_nid_7x,
2740 .rates = SUPPORTED_RATES,
2741 .maxbps = SUPPORTED_MAXBPS,
2742 .formats = SUPPORTED_FORMATS,
2743 .ops = {
2744 .open = simple_playback_pcm_open,
2745 .close = nvhdmi_8ch_7x_pcm_close,
2746 .prepare = nvhdmi_8ch_7x_pcm_prepare
2747 },
2748};
2749
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002750static int patch_nvhdmi_2ch(struct hda_codec *codec)
2751{
2752 struct hdmi_spec *spec;
Takashi Iwaid0b12522012-06-15 14:34:42 +02002753 int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
2754 nvhdmi_master_pin_nid_7x);
2755 if (err < 0)
2756 return err;
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002757
Takashi Iwaiceaa86b2012-06-15 14:38:31 +02002758 codec->patch_ops.init = nvhdmi_7x_init_2ch;
Takashi Iwaid0b12522012-06-15 14:34:42 +02002759 /* override the PCM rates, etc, as the codec doesn't give full list */
2760 spec = codec->spec;
2761 spec->pcm_playback.rates = SUPPORTED_RATES;
2762 spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
2763 spec->pcm_playback.formats = SUPPORTED_FORMATS;
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002764 return 0;
2765}
2766
Takashi Iwai53775b02012-08-01 12:17:41 +02002767static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
2768{
2769 struct hdmi_spec *spec = codec->spec;
2770 int err = simple_playback_build_pcms(codec);
Takashi Iwaibce0d2a2013-03-13 14:40:31 +01002771 if (!err) {
2772 struct hda_pcm *info = get_pcm_rec(spec, 0);
2773 info->own_chmap = true;
2774 }
Takashi Iwai53775b02012-08-01 12:17:41 +02002775 return err;
2776}
2777
2778static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
2779{
2780 struct hdmi_spec *spec = codec->spec;
Takashi Iwaibce0d2a2013-03-13 14:40:31 +01002781 struct hda_pcm *info;
Takashi Iwai53775b02012-08-01 12:17:41 +02002782 struct snd_pcm_chmap *chmap;
2783 int err;
2784
2785 err = simple_playback_build_controls(codec);
2786 if (err < 0)
2787 return err;
2788
2789 /* add channel maps */
Takashi Iwaibce0d2a2013-03-13 14:40:31 +01002790 info = get_pcm_rec(spec, 0);
2791 err = snd_pcm_add_chmap_ctls(info->pcm,
Takashi Iwai53775b02012-08-01 12:17:41 +02002792 SNDRV_PCM_STREAM_PLAYBACK,
2793 snd_pcm_alt_chmaps, 8, 0, &chmap);
2794 if (err < 0)
2795 return err;
Takashi Iwaib9a94a92015-10-01 16:20:04 +02002796 switch (codec->preset->vendor_id) {
Takashi Iwai53775b02012-08-01 12:17:41 +02002797 case 0x10de0002:
2798 case 0x10de0003:
2799 case 0x10de0005:
2800 case 0x10de0006:
2801 chmap->channel_mask = (1U << 2) | (1U << 8);
2802 break;
2803 case 0x10de0007:
2804 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
2805 }
2806 return 0;
2807}
2808
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002809static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
2810{
2811 struct hdmi_spec *spec;
2812 int err = patch_nvhdmi_2ch(codec);
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002813 if (err < 0)
2814 return err;
2815 spec = codec->spec;
2816 spec->multiout.max_channels = 8;
Takashi Iwaid0b12522012-06-15 14:34:42 +02002817 spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
Takashi Iwaiceaa86b2012-06-15 14:38:31 +02002818 codec->patch_ops.init = nvhdmi_7x_init_8ch;
Takashi Iwai53775b02012-08-01 12:17:41 +02002819 codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
2820 codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
Aaron Plattner1f348522011-04-06 17:19:04 -07002821
2822 /* Initialize the audio infoframe channel mask and checksum to something
2823 * valid */
2824 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2825
Takashi Iwai84eb01b2010-09-07 12:27:25 +02002826 return 0;
2827}
2828
2829/*
Anssi Hannula611885b2013-11-03 17:15:00 +02002830 * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
2831 * - 0x10de0015
2832 * - 0x10de0040
2833 */
Subhransu S. Prusty67b90cb2016-03-04 19:59:46 +05302834static int nvhdmi_chmap_cea_alloc_validate_get_type(struct hdac_chmap *chmap,
Subhransu S. Prustyf3022402016-03-04 19:59:48 +05302835 struct hdac_cea_channel_speaker_allocation *cap, int channels)
Anssi Hannula611885b2013-11-03 17:15:00 +02002836{
2837 if (cap->ca_index == 0x00 && channels == 2)
2838 return SNDRV_CTL_TLVT_CHMAP_FIXED;
2839
Subhransu S. Prusty028cb682016-03-14 10:35:06 +05302840 /* If the speaker allocation matches the channel count, it is OK. */
2841 if (cap->channels != channels)
2842 return -1;
2843
2844 /* all channels are remappable freely */
2845 return SNDRV_CTL_TLVT_CHMAP_VAR;
Anssi Hannula611885b2013-11-03 17:15:00 +02002846}
2847
Subhransu S. Prusty828cb4e2016-03-04 19:59:50 +05302848static int nvhdmi_chmap_validate(struct hdac_chmap *chmap,
2849 int ca, int chs, unsigned char *map)
Anssi Hannula611885b2013-11-03 17:15:00 +02002850{
2851 if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
2852 return -EINVAL;
2853
2854 return 0;
2855}
2856
2857static int patch_nvhdmi(struct hda_codec *codec)
2858{
2859 struct hdmi_spec *spec;
2860 int err;
2861
2862 err = patch_generic_hdmi(codec);
2863 if (err)
2864 return err;
2865
2866 spec = codec->spec;
Stephen Warren75fae112014-01-30 11:52:16 -07002867 spec->dyn_pin_out = true;
Anssi Hannula611885b2013-11-03 17:15:00 +02002868
Subhransu S. Prusty67b90cb2016-03-04 19:59:46 +05302869 spec->chmap.ops.chmap_cea_alloc_validate_get_type =
Anssi Hannula611885b2013-11-03 17:15:00 +02002870 nvhdmi_chmap_cea_alloc_validate_get_type;
Subhransu S. Prusty67b90cb2016-03-04 19:59:46 +05302871 spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
Anssi Hannula611885b2013-11-03 17:15:00 +02002872
2873 return 0;
2874}
2875
2876/*
Thierry Reding26e9a962015-05-05 14:56:20 +02002877 * The HDA codec on NVIDIA Tegra contains two scratch registers that are
2878 * accessed using vendor-defined verbs. These registers can be used for
2879 * interoperability between the HDA and HDMI drivers.
2880 */
2881
2882/* Audio Function Group node */
2883#define NVIDIA_AFG_NID 0x01
2884
2885/*
2886 * The SCRATCH0 register is used to notify the HDMI codec of changes in audio
2887 * format. On Tegra, bit 31 is used as a trigger that causes an interrupt to
2888 * be raised in the HDMI codec. The remainder of the bits is arbitrary. This
2889 * implementation stores the HDA format (see AC_FMT_*) in bits [15:0] and an
2890 * additional bit (at position 30) to signal the validity of the format.
2891 *
2892 * | 31 | 30 | 29 16 | 15 0 |
2893 * +---------+-------+--------+--------+
2894 * | TRIGGER | VALID | UNUSED | FORMAT |
2895 * +-----------------------------------|
2896 *
2897 * Note that for the trigger bit to take effect it needs to change value
2898 * (i.e. it needs to be toggled).
2899 */
2900#define NVIDIA_GET_SCRATCH0 0xfa6
2901#define NVIDIA_SET_SCRATCH0_BYTE0 0xfa7
2902#define NVIDIA_SET_SCRATCH0_BYTE1 0xfa8
2903#define NVIDIA_SET_SCRATCH0_BYTE2 0xfa9
2904#define NVIDIA_SET_SCRATCH0_BYTE3 0xfaa
2905#define NVIDIA_SCRATCH_TRIGGER (1 << 7)
2906#define NVIDIA_SCRATCH_VALID (1 << 6)
2907
2908#define NVIDIA_GET_SCRATCH1 0xfab
2909#define NVIDIA_SET_SCRATCH1_BYTE0 0xfac
2910#define NVIDIA_SET_SCRATCH1_BYTE1 0xfad
2911#define NVIDIA_SET_SCRATCH1_BYTE2 0xfae
2912#define NVIDIA_SET_SCRATCH1_BYTE3 0xfaf
2913
2914/*
2915 * The format parameter is the HDA audio format (see AC_FMT_*). If set to 0,
2916 * the format is invalidated so that the HDMI codec can be disabled.
2917 */
2918static void tegra_hdmi_set_format(struct hda_codec *codec, unsigned int format)
2919{
2920 unsigned int value;
2921
2922 /* bits [31:30] contain the trigger and valid bits */
2923 value = snd_hda_codec_read(codec, NVIDIA_AFG_NID, 0,
2924 NVIDIA_GET_SCRATCH0, 0);
2925 value = (value >> 24) & 0xff;
2926
2927 /* bits [15:0] are used to store the HDA format */
2928 snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
2929 NVIDIA_SET_SCRATCH0_BYTE0,
2930 (format >> 0) & 0xff);
2931 snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
2932 NVIDIA_SET_SCRATCH0_BYTE1,
2933 (format >> 8) & 0xff);
2934
2935 /* bits [16:24] are unused */
2936 snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
2937 NVIDIA_SET_SCRATCH0_BYTE2, 0);
2938
2939 /*
2940 * Bit 30 signals that the data is valid and hence that HDMI audio can
2941 * be enabled.
2942 */
2943 if (format == 0)
2944 value &= ~NVIDIA_SCRATCH_VALID;
2945 else
2946 value |= NVIDIA_SCRATCH_VALID;
2947
2948 /*
2949 * Whenever the trigger bit is toggled, an interrupt is raised in the
2950 * HDMI codec. The HDMI driver will use that as trigger to update its
2951 * configuration.
2952 */
2953 value ^= NVIDIA_SCRATCH_TRIGGER;
2954
2955 snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
2956 NVIDIA_SET_SCRATCH0_BYTE3, value);
2957}
2958
2959static int tegra_hdmi_pcm_prepare(struct hda_pcm_stream *hinfo,
2960 struct hda_codec *codec,
2961 unsigned int stream_tag,
2962 unsigned int format,
2963 struct snd_pcm_substream *substream)
2964{
2965 int err;
2966
2967 err = generic_hdmi_playback_pcm_prepare(hinfo, codec, stream_tag,
2968 format, substream);
2969 if (err < 0)
2970 return err;
2971
2972 /* notify the HDMI codec of the format change */
2973 tegra_hdmi_set_format(codec, format);
2974
2975 return 0;
2976}
2977
2978static int tegra_hdmi_pcm_cleanup(struct hda_pcm_stream *hinfo,
2979 struct hda_codec *codec,
2980 struct snd_pcm_substream *substream)
2981{
2982 /* invalidate the format in the HDMI codec */
2983 tegra_hdmi_set_format(codec, 0);
2984
2985 return generic_hdmi_playback_pcm_cleanup(hinfo, codec, substream);
2986}
2987
2988static struct hda_pcm *hda_find_pcm_by_type(struct hda_codec *codec, int type)
2989{
2990 struct hdmi_spec *spec = codec->spec;
2991 unsigned int i;
2992
2993 for (i = 0; i < spec->num_pins; i++) {
2994 struct hda_pcm *pcm = get_pcm_rec(spec, i);
2995
2996 if (pcm->pcm_type == type)
2997 return pcm;
2998 }
2999
3000 return NULL;
3001}
3002
3003static int tegra_hdmi_build_pcms(struct hda_codec *codec)
3004{
3005 struct hda_pcm_stream *stream;
3006 struct hda_pcm *pcm;
3007 int err;
3008
3009 err = generic_hdmi_build_pcms(codec);
3010 if (err < 0)
3011 return err;
3012
3013 pcm = hda_find_pcm_by_type(codec, HDA_PCM_TYPE_HDMI);
3014 if (!pcm)
3015 return -ENODEV;
3016
3017 /*
3018 * Override ->prepare() and ->cleanup() operations to notify the HDMI
3019 * codec about format changes.
3020 */
3021 stream = &pcm->stream[SNDRV_PCM_STREAM_PLAYBACK];
3022 stream->ops.prepare = tegra_hdmi_pcm_prepare;
3023 stream->ops.cleanup = tegra_hdmi_pcm_cleanup;
3024
3025 return 0;
3026}
3027
3028static int patch_tegra_hdmi(struct hda_codec *codec)
3029{
3030 int err;
3031
3032 err = patch_generic_hdmi(codec);
3033 if (err)
3034 return err;
3035
3036 codec->patch_ops.build_pcms = tegra_hdmi_build_pcms;
3037
3038 return 0;
3039}
3040
3041/*
Anssi Hannula5a6135842013-10-24 21:10:35 +03003042 * ATI/AMD-specific implementations
Takashi Iwai84eb01b2010-09-07 12:27:25 +02003043 */
3044
Anssi Hannula5a6135842013-10-24 21:10:35 +03003045#define is_amdhdmi_rev3_or_later(codec) \
Takashi Iwai7639a062015-03-03 10:07:24 +01003046 ((codec)->core.vendor_id == 0x1002aa01 && \
3047 ((codec)->core.revision_id & 0xff00) >= 0x0300)
Anssi Hannula5a6135842013-10-24 21:10:35 +03003048#define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
Takashi Iwai84eb01b2010-09-07 12:27:25 +02003049
Anssi Hannula5a6135842013-10-24 21:10:35 +03003050/* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
3051#define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
3052#define ATI_VERB_SET_DOWNMIX_INFO 0x772
3053#define ATI_VERB_SET_MULTICHANNEL_01 0x777
3054#define ATI_VERB_SET_MULTICHANNEL_23 0x778
3055#define ATI_VERB_SET_MULTICHANNEL_45 0x779
3056#define ATI_VERB_SET_MULTICHANNEL_67 0x77a
Anssi Hannula461cf6b2013-10-24 21:10:37 +03003057#define ATI_VERB_SET_HBR_CONTROL 0x77c
Anssi Hannula5a6135842013-10-24 21:10:35 +03003058#define ATI_VERB_SET_MULTICHANNEL_1 0x785
3059#define ATI_VERB_SET_MULTICHANNEL_3 0x786
3060#define ATI_VERB_SET_MULTICHANNEL_5 0x787
3061#define ATI_VERB_SET_MULTICHANNEL_7 0x788
3062#define ATI_VERB_SET_MULTICHANNEL_MODE 0x789
3063#define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
3064#define ATI_VERB_GET_DOWNMIX_INFO 0xf72
3065#define ATI_VERB_GET_MULTICHANNEL_01 0xf77
3066#define ATI_VERB_GET_MULTICHANNEL_23 0xf78
3067#define ATI_VERB_GET_MULTICHANNEL_45 0xf79
3068#define ATI_VERB_GET_MULTICHANNEL_67 0xf7a
Anssi Hannula461cf6b2013-10-24 21:10:37 +03003069#define ATI_VERB_GET_HBR_CONTROL 0xf7c
Anssi Hannula5a6135842013-10-24 21:10:35 +03003070#define ATI_VERB_GET_MULTICHANNEL_1 0xf85
3071#define ATI_VERB_GET_MULTICHANNEL_3 0xf86
3072#define ATI_VERB_GET_MULTICHANNEL_5 0xf87
3073#define ATI_VERB_GET_MULTICHANNEL_7 0xf88
3074#define ATI_VERB_GET_MULTICHANNEL_MODE 0xf89
3075
Anssi Hannula84d69e72013-10-24 21:10:38 +03003076/* AMD specific HDA cvt verbs */
3077#define ATI_VERB_SET_RAMP_RATE 0x770
3078#define ATI_VERB_GET_RAMP_RATE 0xf70
3079
Anssi Hannula5a6135842013-10-24 21:10:35 +03003080#define ATI_OUT_ENABLE 0x1
3081
3082#define ATI_MULTICHANNEL_MODE_PAIRED 0
3083#define ATI_MULTICHANNEL_MODE_SINGLE 1
3084
Anssi Hannula461cf6b2013-10-24 21:10:37 +03003085#define ATI_HBR_CAPABLE 0x01
3086#define ATI_HBR_ENABLE 0x10
3087
Anssi Hannula89250f82013-10-24 21:10:36 +03003088static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
3089 unsigned char *buf, int *eld_size)
3090{
3091 /* call hda_eld.c ATI/AMD-specific function */
3092 return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
3093 is_amdhdmi_rev3_or_later(codec));
3094}
3095
Anssi Hannula5a6135842013-10-24 21:10:35 +03003096static void atihdmi_pin_setup_infoframe(struct hda_codec *codec, hda_nid_t pin_nid, int ca,
3097 int active_channels, int conn_type)
3098{
3099 snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
3100}
3101
3102static int atihdmi_paired_swap_fc_lfe(int pos)
3103{
3104 /*
3105 * ATI/AMD have automatic FC/LFE swap built-in
3106 * when in pairwise mapping mode.
3107 */
3108
3109 switch (pos) {
3110 /* see channel_allocations[].speakers[] */
3111 case 2: return 3;
3112 case 3: return 2;
3113 default: break;
3114 }
3115
3116 return pos;
3117}
3118
Subhransu S. Prusty828cb4e2016-03-04 19:59:50 +05303119static int atihdmi_paired_chmap_validate(struct hdac_chmap *chmap,
3120 int ca, int chs, unsigned char *map)
Anssi Hannula5a6135842013-10-24 21:10:35 +03003121{
Subhransu S. Prustyf3022402016-03-04 19:59:48 +05303122 struct hdac_cea_channel_speaker_allocation *cap;
Anssi Hannula5a6135842013-10-24 21:10:35 +03003123 int i, j;
3124
3125 /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
3126
Subhransu S. Prustybb63f722016-03-04 19:59:52 +05303127 cap = snd_hdac_get_ch_alloc_from_ca(ca);
Anssi Hannula5a6135842013-10-24 21:10:35 +03003128 for (i = 0; i < chs; ++i) {
Subhransu S. Prustybb63f722016-03-04 19:59:52 +05303129 int mask = snd_hdac_chmap_to_spk_mask(map[i]);
Anssi Hannula5a6135842013-10-24 21:10:35 +03003130 bool ok = false;
3131 bool companion_ok = false;
3132
3133 if (!mask)
3134 continue;
3135
3136 for (j = 0 + i % 2; j < 8; j += 2) {
3137 int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
3138 if (cap->speakers[chan_idx] == mask) {
3139 /* channel is in a supported position */
3140 ok = true;
3141
3142 if (i % 2 == 0 && i + 1 < chs) {
3143 /* even channel, check the odd companion */
3144 int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
Subhransu S. Prustybb63f722016-03-04 19:59:52 +05303145 int comp_mask_req = snd_hdac_chmap_to_spk_mask(map[i+1]);
Anssi Hannula5a6135842013-10-24 21:10:35 +03003146 int comp_mask_act = cap->speakers[comp_chan_idx];
3147
3148 if (comp_mask_req == comp_mask_act)
3149 companion_ok = true;
3150 else
3151 return -EINVAL;
3152 }
3153 break;
3154 }
3155 }
3156
3157 if (!ok)
3158 return -EINVAL;
3159
3160 if (companion_ok)
3161 i++; /* companion channel already checked */
3162 }
3163
3164 return 0;
3165}
3166
Subhransu S. Prusty739ffee2016-03-04 19:59:49 +05303167static int atihdmi_pin_set_slot_channel(struct hdac_device *hdac,
3168 hda_nid_t pin_nid, int hdmi_slot, int stream_channel)
Anssi Hannula5a6135842013-10-24 21:10:35 +03003169{
Subhransu S. Prusty739ffee2016-03-04 19:59:49 +05303170 struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
Anssi Hannula5a6135842013-10-24 21:10:35 +03003171 int verb;
3172 int ati_channel_setup = 0;
3173
3174 if (hdmi_slot > 7)
3175 return -EINVAL;
3176
3177 if (!has_amd_full_remap_support(codec)) {
3178 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
3179
3180 /* In case this is an odd slot but without stream channel, do not
3181 * disable the slot since the corresponding even slot could have a
3182 * channel. In case neither have a channel, the slot pair will be
3183 * disabled when this function is called for the even slot. */
3184 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
3185 return 0;
3186
3187 hdmi_slot -= hdmi_slot % 2;
3188
3189 if (stream_channel != 0xf)
3190 stream_channel -= stream_channel % 2;
3191 }
3192
3193 verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
3194
3195 /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3196
3197 if (stream_channel != 0xf)
3198 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
3199
3200 return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
3201}
3202
Subhransu S. Prusty739ffee2016-03-04 19:59:49 +05303203static int atihdmi_pin_get_slot_channel(struct hdac_device *hdac,
3204 hda_nid_t pin_nid, int asp_slot)
Anssi Hannula5a6135842013-10-24 21:10:35 +03003205{
Subhransu S. Prusty739ffee2016-03-04 19:59:49 +05303206 struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
Anssi Hannula5a6135842013-10-24 21:10:35 +03003207 bool was_odd = false;
3208 int ati_asp_slot = asp_slot;
3209 int verb;
3210 int ati_channel_setup;
3211
3212 if (asp_slot > 7)
3213 return -EINVAL;
3214
3215 if (!has_amd_full_remap_support(codec)) {
3216 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
3217 if (ati_asp_slot % 2 != 0) {
3218 ati_asp_slot -= 1;
3219 was_odd = true;
3220 }
3221 }
3222
3223 verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
3224
3225 ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
3226
3227 if (!(ati_channel_setup & ATI_OUT_ENABLE))
3228 return 0xf;
3229
3230 return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
3231}
3232
Subhransu S. Prusty67b90cb2016-03-04 19:59:46 +05303233static int atihdmi_paired_chmap_cea_alloc_validate_get_type(
3234 struct hdac_chmap *chmap,
Subhransu S. Prustyf3022402016-03-04 19:59:48 +05303235 struct hdac_cea_channel_speaker_allocation *cap,
Subhransu S. Prusty67b90cb2016-03-04 19:59:46 +05303236 int channels)
Anssi Hannula5a6135842013-10-24 21:10:35 +03003237{
3238 int c;
3239
3240 /*
3241 * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
3242 * we need to take that into account (a single channel may take 2
3243 * channel slots if we need to carry a silent channel next to it).
3244 * On Rev3+ AMD codecs this function is not used.
3245 */
3246 int chanpairs = 0;
3247
3248 /* We only produce even-numbered channel count TLVs */
3249 if ((channels % 2) != 0)
3250 return -1;
3251
3252 for (c = 0; c < 7; c += 2) {
3253 if (cap->speakers[c] || cap->speakers[c+1])
3254 chanpairs++;
3255 }
3256
3257 if (chanpairs * 2 != channels)
3258 return -1;
3259
3260 return SNDRV_CTL_TLVT_CHMAP_PAIRED;
3261}
3262
Subhransu S. Prusty828cb4e2016-03-04 19:59:50 +05303263static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct hdac_chmap *hchmap,
Subhransu S. Prustyf3022402016-03-04 19:59:48 +05303264 struct hdac_cea_channel_speaker_allocation *cap,
3265 unsigned int *chmap, int channels)
Anssi Hannula5a6135842013-10-24 21:10:35 +03003266{
3267 /* produce paired maps for pre-rev3 ATI/AMD codecs */
3268 int count = 0;
3269 int c;
3270
3271 for (c = 7; c >= 0; c--) {
3272 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
3273 int spk = cap->speakers[chan];
3274 if (!spk) {
3275 /* add N/A channel if the companion channel is occupied */
3276 if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
3277 chmap[count++] = SNDRV_CHMAP_NA;
3278
3279 continue;
3280 }
3281
Subhransu S. Prustybb63f722016-03-04 19:59:52 +05303282 chmap[count++] = snd_hdac_spk_to_chmap(spk);
Anssi Hannula5a6135842013-10-24 21:10:35 +03003283 }
3284
3285 WARN_ON(count != channels);
3286}
3287
Anssi Hannula461cf6b2013-10-24 21:10:37 +03003288static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
3289 bool hbr)
3290{
3291 int hbr_ctl, hbr_ctl_new;
3292
3293 hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
Anssi Hannula13122e62013-11-10 20:56:10 +02003294 if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
Anssi Hannula461cf6b2013-10-24 21:10:37 +03003295 if (hbr)
3296 hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
3297 else
3298 hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
3299
Takashi Iwai4e76a882014-02-25 12:21:03 +01003300 codec_dbg(codec,
3301 "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
Anssi Hannula461cf6b2013-10-24 21:10:37 +03003302 pin_nid,
3303 hbr_ctl == hbr_ctl_new ? "" : "new-",
3304 hbr_ctl_new);
3305
3306 if (hbr_ctl != hbr_ctl_new)
3307 snd_hda_codec_write(codec, pin_nid, 0,
3308 ATI_VERB_SET_HBR_CONTROL,
3309 hbr_ctl_new);
3310
3311 } else if (hbr)
3312 return -EINVAL;
3313
3314 return 0;
3315}
3316
Anssi Hannula84d69e72013-10-24 21:10:38 +03003317static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
3318 hda_nid_t pin_nid, u32 stream_tag, int format)
3319{
3320
3321 if (is_amdhdmi_rev3_or_later(codec)) {
3322 int ramp_rate = 180; /* default as per AMD spec */
3323 /* disable ramp-up/down for non-pcm as per AMD spec */
3324 if (format & AC_FMT_TYPE_NON_PCM)
3325 ramp_rate = 0;
3326
3327 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
3328 }
3329
3330 return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
3331}
3332
3333
Anssi Hannula5a6135842013-10-24 21:10:35 +03003334static int atihdmi_init(struct hda_codec *codec)
Takashi Iwai84eb01b2010-09-07 12:27:25 +02003335{
3336 struct hdmi_spec *spec = codec->spec;
Anssi Hannula5a6135842013-10-24 21:10:35 +03003337 int pin_idx, err;
Takashi Iwai84eb01b2010-09-07 12:27:25 +02003338
Anssi Hannula5a6135842013-10-24 21:10:35 +03003339 err = generic_hdmi_init(codec);
3340
3341 if (err)
Takashi Iwai84eb01b2010-09-07 12:27:25 +02003342 return err;
Anssi Hannula5a6135842013-10-24 21:10:35 +03003343
3344 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
3345 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
3346
3347 /* make sure downmix information in infoframe is zero */
3348 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
3349
3350 /* enable channel-wise remap mode if supported */
3351 if (has_amd_full_remap_support(codec))
3352 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
3353 ATI_VERB_SET_MULTICHANNEL_MODE,
3354 ATI_MULTICHANNEL_MODE_SINGLE);
Takashi Iwai84eb01b2010-09-07 12:27:25 +02003355 }
Anssi Hannula5a6135842013-10-24 21:10:35 +03003356
Takashi Iwai84eb01b2010-09-07 12:27:25 +02003357 return 0;
3358}
3359
Takashi Iwai84eb01b2010-09-07 12:27:25 +02003360static int patch_atihdmi(struct hda_codec *codec)
3361{
3362 struct hdmi_spec *spec;
Anssi Hannula5a6135842013-10-24 21:10:35 +03003363 struct hdmi_spec_per_cvt *per_cvt;
3364 int err, cvt_idx;
3365
3366 err = patch_generic_hdmi(codec);
3367
3368 if (err)
Takashi Iwaid0b12522012-06-15 14:34:42 +02003369 return err;
Anssi Hannula5a6135842013-10-24 21:10:35 +03003370
3371 codec->patch_ops.init = atihdmi_init;
3372
Takashi Iwaid0b12522012-06-15 14:34:42 +02003373 spec = codec->spec;
Anssi Hannula5a6135842013-10-24 21:10:35 +03003374
Anssi Hannula89250f82013-10-24 21:10:36 +03003375 spec->ops.pin_get_eld = atihdmi_pin_get_eld;
Anssi Hannula5a6135842013-10-24 21:10:35 +03003376 spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
Anssi Hannula461cf6b2013-10-24 21:10:37 +03003377 spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
Anssi Hannula84d69e72013-10-24 21:10:38 +03003378 spec->ops.setup_stream = atihdmi_setup_stream;
Anssi Hannula5a6135842013-10-24 21:10:35 +03003379
3380 if (!has_amd_full_remap_support(codec)) {
3381 /* override to ATI/AMD-specific versions with pairwise mapping */
Subhransu S. Prusty67b90cb2016-03-04 19:59:46 +05303382 spec->chmap.ops.chmap_cea_alloc_validate_get_type =
Anssi Hannula5a6135842013-10-24 21:10:35 +03003383 atihdmi_paired_chmap_cea_alloc_validate_get_type;
Subhransu S. Prusty67b90cb2016-03-04 19:59:46 +05303384 spec->chmap.ops.cea_alloc_to_tlv_chmap =
3385 atihdmi_paired_cea_alloc_to_tlv_chmap;
3386 spec->chmap.ops.chmap_validate = atihdmi_paired_chmap_validate;
Subhransu S. Prusty739ffee2016-03-04 19:59:49 +05303387 spec->chmap.ops.pin_get_slot_channel =
3388 atihdmi_pin_get_slot_channel;
3389 spec->chmap.ops.pin_set_slot_channel =
3390 atihdmi_pin_set_slot_channel;
Anssi Hannula5a6135842013-10-24 21:10:35 +03003391 }
3392
3393 /* ATI/AMD converters do not advertise all of their capabilities */
3394 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
3395 per_cvt = get_cvt(spec, cvt_idx);
3396 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
3397 per_cvt->rates |= SUPPORTED_RATES;
3398 per_cvt->formats |= SUPPORTED_FORMATS;
3399 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
3400 }
3401
Subhransu S. Prusty67b90cb2016-03-04 19:59:46 +05303402 spec->chmap.channels_max = max(spec->chmap.channels_max, 8u);
Anssi Hannula5a6135842013-10-24 21:10:35 +03003403
Takashi Iwai84eb01b2010-09-07 12:27:25 +02003404 return 0;
3405}
3406
Annie Liu3de5ff82012-06-08 19:18:42 +08003407/* VIA HDMI Implementation */
3408#define VIAHDMI_CVT_NID 0x02 /* audio converter1 */
3409#define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */
3410
Annie Liu3de5ff82012-06-08 19:18:42 +08003411static int patch_via_hdmi(struct hda_codec *codec)
3412{
Takashi Iwai250e41a2012-06-15 14:40:21 +02003413 return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
Annie Liu3de5ff82012-06-08 19:18:42 +08003414}
Takashi Iwai84eb01b2010-09-07 12:27:25 +02003415
3416/*
3417 * patch entries
3418 */
Takashi Iwaib9a94a92015-10-01 16:20:04 +02003419static const struct hda_device_id snd_hda_id_hdmi[] = {
3420HDA_CODEC_ENTRY(0x1002793c, "RS600 HDMI", patch_atihdmi),
3421HDA_CODEC_ENTRY(0x10027919, "RS600 HDMI", patch_atihdmi),
3422HDA_CODEC_ENTRY(0x1002791a, "RS690/780 HDMI", patch_atihdmi),
3423HDA_CODEC_ENTRY(0x1002aa01, "R6xx HDMI", patch_atihdmi),
3424HDA_CODEC_ENTRY(0x10951390, "SiI1390 HDMI", patch_generic_hdmi),
3425HDA_CODEC_ENTRY(0x10951392, "SiI1392 HDMI", patch_generic_hdmi),
3426HDA_CODEC_ENTRY(0x17e80047, "Chrontel HDMI", patch_generic_hdmi),
3427HDA_CODEC_ENTRY(0x10de0002, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x),
3428HDA_CODEC_ENTRY(0x10de0003, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x),
3429HDA_CODEC_ENTRY(0x10de0005, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x),
3430HDA_CODEC_ENTRY(0x10de0006, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x),
3431HDA_CODEC_ENTRY(0x10de0007, "MCP79/7A HDMI", patch_nvhdmi_8ch_7x),
3432HDA_CODEC_ENTRY(0x10de000a, "GPU 0a HDMI/DP", patch_nvhdmi),
3433HDA_CODEC_ENTRY(0x10de000b, "GPU 0b HDMI/DP", patch_nvhdmi),
3434HDA_CODEC_ENTRY(0x10de000c, "MCP89 HDMI", patch_nvhdmi),
3435HDA_CODEC_ENTRY(0x10de000d, "GPU 0d HDMI/DP", patch_nvhdmi),
3436HDA_CODEC_ENTRY(0x10de0010, "GPU 10 HDMI/DP", patch_nvhdmi),
3437HDA_CODEC_ENTRY(0x10de0011, "GPU 11 HDMI/DP", patch_nvhdmi),
3438HDA_CODEC_ENTRY(0x10de0012, "GPU 12 HDMI/DP", patch_nvhdmi),
3439HDA_CODEC_ENTRY(0x10de0013, "GPU 13 HDMI/DP", patch_nvhdmi),
3440HDA_CODEC_ENTRY(0x10de0014, "GPU 14 HDMI/DP", patch_nvhdmi),
3441HDA_CODEC_ENTRY(0x10de0015, "GPU 15 HDMI/DP", patch_nvhdmi),
3442HDA_CODEC_ENTRY(0x10de0016, "GPU 16 HDMI/DP", patch_nvhdmi),
Richard Samsonc8900a02011-03-03 12:46:13 +01003443/* 17 is known to be absent */
Takashi Iwaib9a94a92015-10-01 16:20:04 +02003444HDA_CODEC_ENTRY(0x10de0018, "GPU 18 HDMI/DP", patch_nvhdmi),
3445HDA_CODEC_ENTRY(0x10de0019, "GPU 19 HDMI/DP", patch_nvhdmi),
3446HDA_CODEC_ENTRY(0x10de001a, "GPU 1a HDMI/DP", patch_nvhdmi),
3447HDA_CODEC_ENTRY(0x10de001b, "GPU 1b HDMI/DP", patch_nvhdmi),
3448HDA_CODEC_ENTRY(0x10de001c, "GPU 1c HDMI/DP", patch_nvhdmi),
3449HDA_CODEC_ENTRY(0x10de0020, "Tegra30 HDMI", patch_tegra_hdmi),
3450HDA_CODEC_ENTRY(0x10de0022, "Tegra114 HDMI", patch_tegra_hdmi),
3451HDA_CODEC_ENTRY(0x10de0028, "Tegra124 HDMI", patch_tegra_hdmi),
3452HDA_CODEC_ENTRY(0x10de0029, "Tegra210 HDMI/DP", patch_tegra_hdmi),
3453HDA_CODEC_ENTRY(0x10de0040, "GPU 40 HDMI/DP", patch_nvhdmi),
3454HDA_CODEC_ENTRY(0x10de0041, "GPU 41 HDMI/DP", patch_nvhdmi),
3455HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP", patch_nvhdmi),
3456HDA_CODEC_ENTRY(0x10de0043, "GPU 43 HDMI/DP", patch_nvhdmi),
3457HDA_CODEC_ENTRY(0x10de0044, "GPU 44 HDMI/DP", patch_nvhdmi),
3458HDA_CODEC_ENTRY(0x10de0051, "GPU 51 HDMI/DP", patch_nvhdmi),
3459HDA_CODEC_ENTRY(0x10de0060, "GPU 60 HDMI/DP", patch_nvhdmi),
3460HDA_CODEC_ENTRY(0x10de0067, "MCP67 HDMI", patch_nvhdmi_2ch),
3461HDA_CODEC_ENTRY(0x10de0070, "GPU 70 HDMI/DP", patch_nvhdmi),
3462HDA_CODEC_ENTRY(0x10de0071, "GPU 71 HDMI/DP", patch_nvhdmi),
3463HDA_CODEC_ENTRY(0x10de0072, "GPU 72 HDMI/DP", patch_nvhdmi),
3464HDA_CODEC_ENTRY(0x10de007d, "GPU 7d HDMI/DP", patch_nvhdmi),
Aaron Plattner2d369c72016-03-13 13:58:57 -07003465HDA_CODEC_ENTRY(0x10de0082, "GPU 82 HDMI/DP", patch_nvhdmi),
Aaron Plattner3ec622f2016-01-28 14:07:38 -08003466HDA_CODEC_ENTRY(0x10de0083, "GPU 83 HDMI/DP", patch_nvhdmi),
Takashi Iwaib9a94a92015-10-01 16:20:04 +02003467HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI", patch_nvhdmi_2ch),
3468HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP", patch_via_hdmi),
3469HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP", patch_via_hdmi),
3470HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP", patch_generic_hdmi),
3471HDA_CODEC_ENTRY(0x11069f85, "VX11 HDMI/DP", patch_generic_hdmi),
3472HDA_CODEC_ENTRY(0x80860054, "IbexPeak HDMI", patch_generic_hdmi),
3473HDA_CODEC_ENTRY(0x80862801, "Bearlake HDMI", patch_generic_hdmi),
3474HDA_CODEC_ENTRY(0x80862802, "Cantiga HDMI", patch_generic_hdmi),
3475HDA_CODEC_ENTRY(0x80862803, "Eaglelake HDMI", patch_generic_hdmi),
3476HDA_CODEC_ENTRY(0x80862804, "IbexPeak HDMI", patch_generic_hdmi),
3477HDA_CODEC_ENTRY(0x80862805, "CougarPoint HDMI", patch_generic_hdmi),
3478HDA_CODEC_ENTRY(0x80862806, "PantherPoint HDMI", patch_generic_hdmi),
3479HDA_CODEC_ENTRY(0x80862807, "Haswell HDMI", patch_generic_hdmi),
3480HDA_CODEC_ENTRY(0x80862808, "Broadwell HDMI", patch_generic_hdmi),
3481HDA_CODEC_ENTRY(0x80862809, "Skylake HDMI", patch_generic_hdmi),
3482HDA_CODEC_ENTRY(0x8086280a, "Broxton HDMI", patch_generic_hdmi),
Libin Yang91815d82016-01-14 14:09:00 +08003483HDA_CODEC_ENTRY(0x8086280b, "Kabylake HDMI", patch_generic_hdmi),
Takashi Iwaib9a94a92015-10-01 16:20:04 +02003484HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI", patch_generic_hdmi),
3485HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_generic_hdmi),
3486HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI", patch_generic_hdmi),
3487HDA_CODEC_ENTRY(0x808629fb, "Crestline HDMI", patch_generic_hdmi),
Takashi Iwaid8a766a2015-02-17 15:25:37 +01003488/* special ID for generic HDMI */
Takashi Iwaib9a94a92015-10-01 16:20:04 +02003489HDA_CODEC_ENTRY(HDA_CODEC_ID_GENERIC_HDMI, "Generic HDMI", patch_generic_hdmi),
Takashi Iwai84eb01b2010-09-07 12:27:25 +02003490{} /* terminator */
3491};
Takashi Iwaib9a94a92015-10-01 16:20:04 +02003492MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_hdmi);
Takashi Iwai84eb01b2010-09-07 12:27:25 +02003493
3494MODULE_LICENSE("GPL");
3495MODULE_DESCRIPTION("HDMI HD-audio codec");
3496MODULE_ALIAS("snd-hda-codec-intelhdmi");
3497MODULE_ALIAS("snd-hda-codec-nvhdmi");
3498MODULE_ALIAS("snd-hda-codec-atihdmi");
3499
Takashi Iwaid8a766a2015-02-17 15:25:37 +01003500static struct hda_codec_driver hdmi_driver = {
Takashi Iwaib9a94a92015-10-01 16:20:04 +02003501 .id = snd_hda_id_hdmi,
Takashi Iwai84eb01b2010-09-07 12:27:25 +02003502};
3503
Takashi Iwaid8a766a2015-02-17 15:25:37 +01003504module_hda_codec_driver(hdmi_driver);