Soren Brinkmann | e3ec3a3 | 2013-12-02 10:02:36 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Arasan Secure Digital Host Controller Interface. |
| 3 | * Copyright (C) 2011 - 2012 Michal Simek <monstr@monstr.eu> |
| 4 | * Copyright (c) 2012 Wind River Systems, Inc. |
| 5 | * Copyright (C) 2013 Pengutronix e.K. |
| 6 | * Copyright (C) 2013 Xilinx Inc. |
| 7 | * |
| 8 | * Based on sdhci-of-esdhc.c |
| 9 | * |
| 10 | * Copyright (c) 2007 Freescale Semiconductor, Inc. |
| 11 | * Copyright (c) 2009 MontaVista Software, Inc. |
| 12 | * |
| 13 | * Authors: Xiaobo Xie <X.Xie@freescale.com> |
| 14 | * Anton Vorontsov <avorontsov@ru.mvista.com> |
| 15 | * |
| 16 | * This program is free software; you can redistribute it and/or modify |
| 17 | * it under the terms of the GNU General Public License as published by |
| 18 | * the Free Software Foundation; either version 2 of the License, or (at |
| 19 | * your option) any later version. |
| 20 | */ |
| 21 | |
| 22 | #include <linux/module.h> |
| 23 | #include "sdhci-pltfm.h" |
| 24 | |
| 25 | #define SDHCI_ARASAN_CLK_CTRL_OFFSET 0x2c |
| 26 | |
| 27 | #define CLK_CTRL_TIMEOUT_SHIFT 16 |
| 28 | #define CLK_CTRL_TIMEOUT_MASK (0xf << CLK_CTRL_TIMEOUT_SHIFT) |
| 29 | #define CLK_CTRL_TIMEOUT_MIN_EXP 13 |
| 30 | |
| 31 | /** |
| 32 | * struct sdhci_arasan_data |
| 33 | * @clk_ahb: Pointer to the AHB clock |
| 34 | */ |
| 35 | struct sdhci_arasan_data { |
| 36 | struct clk *clk_ahb; |
| 37 | }; |
| 38 | |
| 39 | static unsigned int sdhci_arasan_get_timeout_clock(struct sdhci_host *host) |
| 40 | { |
| 41 | u32 div; |
| 42 | unsigned long freq; |
| 43 | struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); |
| 44 | |
| 45 | div = readl(host->ioaddr + SDHCI_ARASAN_CLK_CTRL_OFFSET); |
| 46 | div = (div & CLK_CTRL_TIMEOUT_MASK) >> CLK_CTRL_TIMEOUT_SHIFT; |
| 47 | |
| 48 | freq = clk_get_rate(pltfm_host->clk); |
| 49 | freq /= 1 << (CLK_CTRL_TIMEOUT_MIN_EXP + div); |
| 50 | |
| 51 | return freq; |
| 52 | } |
| 53 | |
| 54 | static struct sdhci_ops sdhci_arasan_ops = { |
| 55 | .get_max_clock = sdhci_pltfm_clk_get_max_clock, |
| 56 | .get_timeout_clock = sdhci_arasan_get_timeout_clock, |
Russell King | 2317f56 | 2014-04-25 12:57:07 +0100 | [diff] [blame^] | 57 | .set_bus_width = sdhci_set_bus_width, |
Soren Brinkmann | e3ec3a3 | 2013-12-02 10:02:36 -0800 | [diff] [blame] | 58 | }; |
| 59 | |
| 60 | static struct sdhci_pltfm_data sdhci_arasan_pdata = { |
| 61 | .ops = &sdhci_arasan_ops, |
| 62 | }; |
| 63 | |
| 64 | #ifdef CONFIG_PM_SLEEP |
| 65 | /** |
| 66 | * sdhci_arasan_suspend - Suspend method for the driver |
| 67 | * @dev: Address of the device structure |
| 68 | * Returns 0 on success and error value on error |
| 69 | * |
| 70 | * Put the device in a low power state. |
| 71 | */ |
| 72 | static int sdhci_arasan_suspend(struct device *dev) |
| 73 | { |
| 74 | struct platform_device *pdev = to_platform_device(dev); |
| 75 | struct sdhci_host *host = platform_get_drvdata(pdev); |
| 76 | struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); |
| 77 | struct sdhci_arasan_data *sdhci_arasan = pltfm_host->priv; |
| 78 | int ret; |
| 79 | |
| 80 | ret = sdhci_suspend_host(host); |
| 81 | if (ret) |
| 82 | return ret; |
| 83 | |
| 84 | clk_disable(pltfm_host->clk); |
| 85 | clk_disable(sdhci_arasan->clk_ahb); |
| 86 | |
| 87 | return 0; |
| 88 | } |
| 89 | |
| 90 | /** |
| 91 | * sdhci_arasan_resume - Resume method for the driver |
| 92 | * @dev: Address of the device structure |
| 93 | * Returns 0 on success and error value on error |
| 94 | * |
| 95 | * Resume operation after suspend |
| 96 | */ |
| 97 | static int sdhci_arasan_resume(struct device *dev) |
| 98 | { |
| 99 | struct platform_device *pdev = to_platform_device(dev); |
| 100 | struct sdhci_host *host = platform_get_drvdata(pdev); |
| 101 | struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); |
| 102 | struct sdhci_arasan_data *sdhci_arasan = pltfm_host->priv; |
| 103 | int ret; |
| 104 | |
| 105 | ret = clk_enable(sdhci_arasan->clk_ahb); |
| 106 | if (ret) { |
| 107 | dev_err(dev, "Cannot enable AHB clock.\n"); |
| 108 | return ret; |
| 109 | } |
| 110 | |
| 111 | ret = clk_enable(pltfm_host->clk); |
| 112 | if (ret) { |
| 113 | dev_err(dev, "Cannot enable SD clock.\n"); |
| 114 | clk_disable(sdhci_arasan->clk_ahb); |
| 115 | return ret; |
| 116 | } |
| 117 | |
| 118 | return sdhci_resume_host(host); |
| 119 | } |
| 120 | #endif /* ! CONFIG_PM_SLEEP */ |
| 121 | |
| 122 | static SIMPLE_DEV_PM_OPS(sdhci_arasan_dev_pm_ops, sdhci_arasan_suspend, |
| 123 | sdhci_arasan_resume); |
| 124 | |
| 125 | static int sdhci_arasan_probe(struct platform_device *pdev) |
| 126 | { |
| 127 | int ret; |
| 128 | struct clk *clk_xin; |
| 129 | struct sdhci_host *host; |
| 130 | struct sdhci_pltfm_host *pltfm_host; |
| 131 | struct sdhci_arasan_data *sdhci_arasan; |
| 132 | |
| 133 | sdhci_arasan = devm_kzalloc(&pdev->dev, sizeof(*sdhci_arasan), |
| 134 | GFP_KERNEL); |
| 135 | if (!sdhci_arasan) |
| 136 | return -ENOMEM; |
| 137 | |
| 138 | sdhci_arasan->clk_ahb = devm_clk_get(&pdev->dev, "clk_ahb"); |
| 139 | if (IS_ERR(sdhci_arasan->clk_ahb)) { |
| 140 | dev_err(&pdev->dev, "clk_ahb clock not found.\n"); |
| 141 | return PTR_ERR(sdhci_arasan->clk_ahb); |
| 142 | } |
| 143 | |
| 144 | clk_xin = devm_clk_get(&pdev->dev, "clk_xin"); |
| 145 | if (IS_ERR(clk_xin)) { |
| 146 | dev_err(&pdev->dev, "clk_xin clock not found.\n"); |
| 147 | return PTR_ERR(clk_xin); |
| 148 | } |
| 149 | |
| 150 | ret = clk_prepare_enable(sdhci_arasan->clk_ahb); |
| 151 | if (ret) { |
| 152 | dev_err(&pdev->dev, "Unable to enable AHB clock.\n"); |
| 153 | return ret; |
| 154 | } |
| 155 | |
| 156 | ret = clk_prepare_enable(clk_xin); |
| 157 | if (ret) { |
| 158 | dev_err(&pdev->dev, "Unable to enable SD clock.\n"); |
| 159 | goto clk_dis_ahb; |
| 160 | } |
| 161 | |
| 162 | host = sdhci_pltfm_init(pdev, &sdhci_arasan_pdata, 0); |
| 163 | if (IS_ERR(host)) { |
| 164 | ret = PTR_ERR(host); |
| 165 | dev_err(&pdev->dev, "platform init failed (%u)\n", ret); |
| 166 | goto clk_disable_all; |
| 167 | } |
| 168 | |
| 169 | sdhci_get_of_property(pdev); |
| 170 | pltfm_host = sdhci_priv(host); |
| 171 | pltfm_host->priv = sdhci_arasan; |
| 172 | pltfm_host->clk = clk_xin; |
| 173 | |
| 174 | ret = sdhci_add_host(host); |
| 175 | if (ret) { |
| 176 | dev_err(&pdev->dev, "platform register failed (%u)\n", ret); |
| 177 | goto err_pltfm_free; |
| 178 | } |
| 179 | |
| 180 | return 0; |
| 181 | |
| 182 | err_pltfm_free: |
| 183 | sdhci_pltfm_free(pdev); |
| 184 | clk_disable_all: |
| 185 | clk_disable_unprepare(clk_xin); |
| 186 | clk_dis_ahb: |
| 187 | clk_disable_unprepare(sdhci_arasan->clk_ahb); |
| 188 | |
| 189 | return ret; |
| 190 | } |
| 191 | |
| 192 | static int sdhci_arasan_remove(struct platform_device *pdev) |
| 193 | { |
| 194 | struct sdhci_host *host = platform_get_drvdata(pdev); |
| 195 | struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); |
| 196 | struct sdhci_arasan_data *sdhci_arasan = pltfm_host->priv; |
| 197 | |
| 198 | clk_disable_unprepare(pltfm_host->clk); |
| 199 | clk_disable_unprepare(sdhci_arasan->clk_ahb); |
| 200 | |
| 201 | return sdhci_pltfm_unregister(pdev); |
| 202 | } |
| 203 | |
| 204 | static const struct of_device_id sdhci_arasan_of_match[] = { |
| 205 | { .compatible = "arasan,sdhci-8.9a" }, |
| 206 | { } |
| 207 | }; |
| 208 | MODULE_DEVICE_TABLE(of, sdhci_arasan_of_match); |
| 209 | |
| 210 | static struct platform_driver sdhci_arasan_driver = { |
| 211 | .driver = { |
| 212 | .name = "sdhci-arasan", |
| 213 | .owner = THIS_MODULE, |
| 214 | .of_match_table = sdhci_arasan_of_match, |
| 215 | .pm = &sdhci_arasan_dev_pm_ops, |
| 216 | }, |
| 217 | .probe = sdhci_arasan_probe, |
| 218 | .remove = sdhci_arasan_remove, |
| 219 | }; |
| 220 | |
| 221 | module_platform_driver(sdhci_arasan_driver); |
| 222 | |
| 223 | MODULE_DESCRIPTION("Driver for the Arasan SDHCI Controller"); |
| 224 | MODULE_AUTHOR("Soeren Brinkmann <soren.brinkmann@xilinx.com>"); |
| 225 | MODULE_LICENSE("GPL"); |