Ben Dooks | 0317e52 | 2010-05-20 14:05:33 +0900 | [diff] [blame] | 1 | /* arch/arm/plat-samsung/wakeup-mask.c |
| 2 | * |
| 3 | * Copyright 2010 Ben Dooks <ben-linux@fluff.org> |
| 4 | * |
| 5 | * Support for wakeup mask interrupts on newer SoCs |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | */ |
| 11 | |
| 12 | #include <linux/kernel.h> |
| 13 | #include <linux/spinlock.h> |
Kay Sievers | edbaa60 | 2011-12-21 16:26:03 -0800 | [diff] [blame] | 14 | #include <linux/device.h> |
Ben Dooks | 0317e52 | 2010-05-20 14:05:33 +0900 | [diff] [blame] | 15 | #include <linux/types.h> |
| 16 | #include <linux/irq.h> |
| 17 | #include <linux/io.h> |
| 18 | |
| 19 | #include <plat/wakeup-mask.h> |
| 20 | #include <plat/pm.h> |
| 21 | |
| 22 | void samsung_sync_wakemask(void __iomem *reg, |
| 23 | struct samsung_wakeup_mask *mask, int nr_mask) |
| 24 | { |
Thomas Gleixner | 7222f39 | 2011-03-24 12:36:46 +0100 | [diff] [blame] | 25 | struct irq_data *data; |
Ben Dooks | 0317e52 | 2010-05-20 14:05:33 +0900 | [diff] [blame] | 26 | u32 val; |
| 27 | |
| 28 | val = __raw_readl(reg); |
| 29 | |
| 30 | for (; nr_mask > 0; nr_mask--, mask++) { |
| 31 | if (mask->irq == NO_WAKEUP_IRQ) { |
| 32 | val |= mask->bit; |
| 33 | continue; |
| 34 | } |
| 35 | |
Thomas Gleixner | 7222f39 | 2011-03-24 12:36:46 +0100 | [diff] [blame] | 36 | data = irq_get_irq_data(mask->irq); |
Ben Dooks | 0317e52 | 2010-05-20 14:05:33 +0900 | [diff] [blame] | 37 | |
Thomas Gleixner | 7222f39 | 2011-03-24 12:36:46 +0100 | [diff] [blame] | 38 | /* bit of a liberty to read this directly from irq_data. */ |
| 39 | if (irqd_is_wakeup_set(data)) |
Ben Dooks | 0317e52 | 2010-05-20 14:05:33 +0900 | [diff] [blame] | 40 | val &= ~mask->bit; |
| 41 | else |
| 42 | val |= mask->bit; |
| 43 | } |
| 44 | |
| 45 | printk(KERN_INFO "wakemask %08x => %08x\n", __raw_readl(reg), val); |
| 46 | __raw_writel(val, reg); |
| 47 | } |