Jean-Christophe PLAGNIOL-VILLARD | ad8a15d | 2012-11-15 21:56:27 +0800 | [diff] [blame] | 1 | /* |
| 2 | * animeo_ip.dts - Device Tree file for Somfy Animeo IP Boards |
| 3 | * |
| 4 | * Copyright (C) 2011-2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
| 5 | * |
| 6 | * Licensed under GPLv2 only. |
| 7 | */ |
| 8 | |
| 9 | /dts-v1/; |
Jean-Christophe PLAGNIOL-VILLARD | 6db64d2 | 2013-05-15 01:21:50 +0800 | [diff] [blame] | 10 | #include "at91sam9260.dtsi" |
Jean-Christophe PLAGNIOL-VILLARD | ad8a15d | 2012-11-15 21:56:27 +0800 | [diff] [blame] | 11 | |
| 12 | / { |
| 13 | model = "Somfy Animeo IP"; |
| 14 | compatible = "somfy,animeo-ip", "atmel,at91sam9260", "atmel,at91sam9"; |
| 15 | |
| 16 | aliases { |
| 17 | serial0 = &usart1; |
| 18 | serial1 = &usart2; |
| 19 | serial2 = &usart0; |
| 20 | serial3 = &dbgu; |
| 21 | serial4 = &usart3; |
| 22 | serial5 = &uart0; |
| 23 | serial6 = &uart1; |
| 24 | }; |
| 25 | |
| 26 | chosen { |
| 27 | linux,stdout-path = &usart2; |
| 28 | }; |
| 29 | |
| 30 | memory { |
| 31 | reg = <0x20000000 0x4000000>; |
| 32 | }; |
| 33 | |
| 34 | clocks { |
Alexandre Belloni | 650defc | 2014-06-18 21:13:54 +0200 | [diff] [blame] | 35 | slow_xtal { |
| 36 | clock-frequency = <32768>; |
| 37 | }; |
| 38 | |
| 39 | main_xtal { |
| 40 | clock-frequency = <18432000>; |
| 41 | }; |
Jean-Christophe PLAGNIOL-VILLARD | ad8a15d | 2012-11-15 21:56:27 +0800 | [diff] [blame] | 42 | }; |
| 43 | |
| 44 | ahb { |
| 45 | apb { |
| 46 | usart0: serial@fffb0000 { |
| 47 | pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts>; |
| 48 | linux,rs485-enabled-at-boot-time; |
| 49 | status = "okay"; |
| 50 | }; |
| 51 | |
| 52 | usart1: serial@fffb4000 { |
| 53 | pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts>; |
| 54 | linux,rs485-enabled-at-boot-time; |
| 55 | status = "okay"; |
| 56 | }; |
| 57 | |
| 58 | usart2: serial@fffb8000 { |
| 59 | pinctrl-0 = <&pinctrl_usart2>; |
| 60 | status = "okay"; |
| 61 | }; |
| 62 | |
| 63 | macb0: ethernet@fffc4000 { |
| 64 | pinctrl-0 = <&pinctrl_macb_rmii &pinctrl_macb_rmii_mii>; |
| 65 | phy-mode = "mii"; |
| 66 | status = "okay"; |
| 67 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 301333b | 2012-11-15 21:56:27 +0800 | [diff] [blame] | 68 | |
| 69 | mmc0: mmc@fffa8000 { |
| 70 | pinctrl-0 = <&pinctrl_mmc0_clk |
| 71 | &pinctrl_mmc0_slot1_cmd_dat0 |
| 72 | &pinctrl_mmc0_slot1_dat1_3>; |
| 73 | status = "okay"; |
| 74 | |
| 75 | slot@1 { |
| 76 | reg = <1>; |
| 77 | bus-width = <4>; |
| 78 | }; |
| 79 | }; |
Jean-Christophe PLAGNIOL-VILLARD | a561892 | 2012-11-21 16:28:13 +0100 | [diff] [blame] | 80 | |
| 81 | watchdog@fffffd40 { |
| 82 | status = "okay"; |
| 83 | }; |
Jean-Christophe PLAGNIOL-VILLARD | ad8a15d | 2012-11-15 21:56:27 +0800 | [diff] [blame] | 84 | }; |
| 85 | |
| 86 | nand0: nand@40000000 { |
| 87 | nand-bus-width = <8>; |
| 88 | nand-ecc-mode = "soft"; |
| 89 | nand-on-flash-bbt; |
| 90 | status = "okay"; |
| 91 | |
Jean-Christophe PLAGNIOL-VILLARD | 2f8e458 | 2013-09-27 08:48:15 +0200 | [diff] [blame] | 92 | barebox@0 { |
Jean-Christophe PLAGNIOL-VILLARD | ad8a15d | 2012-11-15 21:56:27 +0800 | [diff] [blame] | 93 | label = "barebox"; |
Jean-Christophe PLAGNIOL-VILLARD | 2f8e458 | 2013-09-27 08:48:15 +0200 | [diff] [blame] | 94 | reg = <0x0 0x58000>; |
Jean-Christophe PLAGNIOL-VILLARD | ad8a15d | 2012-11-15 21:56:27 +0800 | [diff] [blame] | 95 | }; |
| 96 | |
Jean-Christophe PLAGNIOL-VILLARD | 2f8e458 | 2013-09-27 08:48:15 +0200 | [diff] [blame] | 97 | u_boot_env@58000 { |
| 98 | label = "u_boot_env"; |
| 99 | reg = <0x58000 0x8000>; |
Jean-Christophe PLAGNIOL-VILLARD | ad8a15d | 2012-11-15 21:56:27 +0800 | [diff] [blame] | 100 | }; |
| 101 | |
Jean-Christophe PLAGNIOL-VILLARD | 2f8e458 | 2013-09-27 08:48:15 +0200 | [diff] [blame] | 102 | ubi@60000 { |
| 103 | label = "ubi"; |
| 104 | reg = <0x60000 0x1FA0000>; |
Jean-Christophe PLAGNIOL-VILLARD | ad8a15d | 2012-11-15 21:56:27 +0800 | [diff] [blame] | 105 | }; |
| 106 | }; |
| 107 | |
Raashid Muhammed | cfdc7fa | 2016-06-03 11:45:38 +0530 | [diff] [blame] | 108 | usb0: ohci@500000 { |
Jean-Christophe PLAGNIOL-VILLARD | ad8a15d | 2012-11-15 21:56:27 +0800 | [diff] [blame] | 109 | num-ports = <2>; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 110 | atmel,vbus-gpio = <&pioB 15 GPIO_ACTIVE_LOW>; |
Jean-Christophe PLAGNIOL-VILLARD | ad8a15d | 2012-11-15 21:56:27 +0800 | [diff] [blame] | 111 | status = "okay"; |
| 112 | }; |
| 113 | }; |
| 114 | |
| 115 | leds { |
| 116 | compatible = "gpio-leds"; |
| 117 | |
| 118 | power_green { |
| 119 | label = "power_green"; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 120 | gpios = <&pioC 17 GPIO_ACTIVE_HIGH>; |
Jean-Christophe PLAGNIOL-VILLARD | ad8a15d | 2012-11-15 21:56:27 +0800 | [diff] [blame] | 121 | linux,default-trigger = "heartbeat"; |
| 122 | }; |
| 123 | |
| 124 | power_red { |
| 125 | label = "power_red"; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 126 | gpios = <&pioA 2 GPIO_ACTIVE_HIGH>; |
Jean-Christophe PLAGNIOL-VILLARD | ad8a15d | 2012-11-15 21:56:27 +0800 | [diff] [blame] | 127 | }; |
| 128 | |
| 129 | tx_green { |
| 130 | label = "tx_green"; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 131 | gpios = <&pioC 19 GPIO_ACTIVE_HIGH>; |
Jean-Christophe PLAGNIOL-VILLARD | ad8a15d | 2012-11-15 21:56:27 +0800 | [diff] [blame] | 132 | }; |
| 133 | |
| 134 | tx_red { |
| 135 | label = "tx_red"; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 136 | gpios = <&pioC 18 GPIO_ACTIVE_HIGH>; |
Jean-Christophe PLAGNIOL-VILLARD | ad8a15d | 2012-11-15 21:56:27 +0800 | [diff] [blame] | 137 | }; |
| 138 | }; |
| 139 | |
| 140 | gpio_keys { |
| 141 | compatible = "gpio-keys"; |
| 142 | #address-cells = <1>; |
| 143 | #size-cells = <0>; |
| 144 | |
| 145 | keyswitch_in { |
| 146 | label = "keyswitch_in"; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 147 | gpios = <&pioB 1 GPIO_ACTIVE_HIGH>; |
Jean-Christophe PLAGNIOL-VILLARD | ad8a15d | 2012-11-15 21:56:27 +0800 | [diff] [blame] | 148 | linux,code = <28>; |
Sudeep Holla | 67ae8b9 | 2015-10-21 11:10:07 +0100 | [diff] [blame] | 149 | wakeup-source; |
Jean-Christophe PLAGNIOL-VILLARD | ad8a15d | 2012-11-15 21:56:27 +0800 | [diff] [blame] | 150 | }; |
| 151 | |
| 152 | error_in { |
| 153 | label = "error_in"; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 154 | gpios = <&pioB 2 GPIO_ACTIVE_HIGH>; |
Jean-Christophe PLAGNIOL-VILLARD | ad8a15d | 2012-11-15 21:56:27 +0800 | [diff] [blame] | 155 | linux,code = <29>; |
Sudeep Holla | 67ae8b9 | 2015-10-21 11:10:07 +0100 | [diff] [blame] | 156 | wakeup-source; |
Jean-Christophe PLAGNIOL-VILLARD | ad8a15d | 2012-11-15 21:56:27 +0800 | [diff] [blame] | 157 | }; |
| 158 | |
| 159 | btn { |
| 160 | label = "btn"; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 161 | gpios = <&pioC 23 GPIO_ACTIVE_HIGH>; |
Jean-Christophe PLAGNIOL-VILLARD | ad8a15d | 2012-11-15 21:56:27 +0800 | [diff] [blame] | 162 | linux,code = <31>; |
Sudeep Holla | 67ae8b9 | 2015-10-21 11:10:07 +0100 | [diff] [blame] | 163 | wakeup-source; |
Jean-Christophe PLAGNIOL-VILLARD | ad8a15d | 2012-11-15 21:56:27 +0800 | [diff] [blame] | 164 | }; |
| 165 | }; |
| 166 | }; |