blob: 584721264121b2192fbf425255c67c1bf7355f40 [file] [log] [blame]
Philipp Zabel7ed47ef2014-04-14 17:37:24 +02001/*
2 * Copyright 2013 Christian Hemp, Phytec Messtechnik GmbH
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
Philipp Zabel057b3d32014-04-14 17:37:27 +020012/ {
13 chosen {
14 linux,stdout-path = &uart4;
15 };
16};
17
Philipp Zabel7ed47ef2014-04-14 17:37:24 +020018&fec {
19 status = "okay";
20};
21
22&gpmi {
23 status = "okay";
24};
25
Philipp Zabel25c349c2014-04-14 17:37:32 +020026&hdmi {
27 status = "okay";
28};
29
Philipp Zabelc3a09402014-04-14 17:37:28 +020030&i2c2 {
31 pinctrl-names = "default";
32 pinctrl-0 = <&pinctrl_i2c2>;
33 clock-frequency = <100000>;
34 status = "okay";
Philipp Zabelbcdd3342014-04-14 17:37:29 +020035
36 tlv320@18 {
37 compatible = "ti,tlv320aic3x";
38 reg = <0x18>;
39 };
40
41 stmpe@41 {
42 compatible = "st,stmpe811";
43 reg = <0x41>;
44 };
45
46 rtc@51 {
47 compatible = "nxp,rtc8564";
48 reg = <0x51>;
49 };
50
51 adc@64 {
52 compatible = "maxim,max1037";
53 reg = <0x64>;
54 };
Philipp Zabelc3a09402014-04-14 17:37:28 +020055};
56
57&i2c3 {
58 pinctrl-names = "default";
59 pinctrl-0 = <&pinctrl_i2c3>;
60 clock-frequency = <100000>;
61 status = "okay";
62};
63
Philipp Zabelb6b94392014-04-14 17:37:31 +020064&uart3 {
65 status = "okay";
66};
67
Philipp Zabel7ed47ef2014-04-14 17:37:24 +020068&uart4 {
69 status = "okay";
70};
71
72&usbh1 {
73 status = "okay";
74};
75
76&usbotg {
77 status = "okay";
78};
79
80&usdhc2 {
81 status = "okay";
82};
83
84&usdhc3 {
85 status = "okay";
86};
Philipp Zabelc3a09402014-04-14 17:37:28 +020087
88&iomuxc {
89 pinctrl_i2c2: i2c2grp {
90 fsl,pins = <
91 MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
92 MX6QDL_PAD_EIM_D16__I2C2_SDA 0x4001b8b1
93 >;
94 };
95
96 pinctrl_i2c3: i2c3grp {
97 fsl,pins = <
98 MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
99 MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
100 >;
101 };
102};