blob: 65016117d95f2f4e332bc6bdd0d9de63e8dbeafe [file] [log] [blame]
Jerome Glisse771fe6b2009-06-05 14:42:42 +02001/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Dave Airlie
25 * Alex Deucher
26 * Jerome Glisse
27 */
28#include "drmP.h"
29#include "radeon_drm.h"
30#include "radeon.h"
31#include "radeon_reg.h"
32
33/*
34 * Common GART table functions.
35 */
36int radeon_gart_table_ram_alloc(struct radeon_device *rdev)
37{
38 void *ptr;
39
40 ptr = pci_alloc_consistent(rdev->pdev, rdev->gart.table_size,
41 &rdev->gart.table_addr);
42 if (ptr == NULL) {
43 return -ENOMEM;
44 }
45#ifdef CONFIG_X86
46 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480 ||
47 rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) {
48 set_memory_uc((unsigned long)ptr,
49 rdev->gart.table_size >> PAGE_SHIFT);
50 }
51#endif
52 rdev->gart.table.ram.ptr = ptr;
53 memset((void *)rdev->gart.table.ram.ptr, 0, rdev->gart.table_size);
54 return 0;
55}
56
57void radeon_gart_table_ram_free(struct radeon_device *rdev)
58{
59 if (rdev->gart.table.ram.ptr == NULL) {
60 return;
61 }
62#ifdef CONFIG_X86
63 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480 ||
64 rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) {
65 set_memory_wb((unsigned long)rdev->gart.table.ram.ptr,
66 rdev->gart.table_size >> PAGE_SHIFT);
67 }
68#endif
69 pci_free_consistent(rdev->pdev, rdev->gart.table_size,
70 (void *)rdev->gart.table.ram.ptr,
71 rdev->gart.table_addr);
72 rdev->gart.table.ram.ptr = NULL;
73 rdev->gart.table_addr = 0;
74}
75
76int radeon_gart_table_vram_alloc(struct radeon_device *rdev)
77{
Jerome Glisse771fe6b2009-06-05 14:42:42 +020078 int r;
79
80 if (rdev->gart.table.vram.robj == NULL) {
Jerome Glisse4c788672009-11-20 14:29:23 +010081 r = radeon_bo_create(rdev, NULL, rdev->gart.table_size,
Alex Deucher268b2512010-11-17 19:00:26 -050082 PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM,
83 &rdev->gart.table.vram.robj);
Jerome Glisse771fe6b2009-06-05 14:42:42 +020084 if (r) {
85 return r;
86 }
87 }
Jerome Glisse4aac0472009-09-14 18:29:49 +020088 return 0;
89}
90
91int radeon_gart_table_vram_pin(struct radeon_device *rdev)
92{
93 uint64_t gpu_addr;
94 int r;
95
Jerome Glisse4c788672009-11-20 14:29:23 +010096 r = radeon_bo_reserve(rdev->gart.table.vram.robj, false);
97 if (unlikely(r != 0))
98 return r;
99 r = radeon_bo_pin(rdev->gart.table.vram.robj,
100 RADEON_GEM_DOMAIN_VRAM, &gpu_addr);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200101 if (r) {
Jerome Glisse4c788672009-11-20 14:29:23 +0100102 radeon_bo_unreserve(rdev->gart.table.vram.robj);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200103 return r;
104 }
Jerome Glisse4c788672009-11-20 14:29:23 +0100105 r = radeon_bo_kmap(rdev->gart.table.vram.robj,
106 (void **)&rdev->gart.table.vram.ptr);
107 if (r)
108 radeon_bo_unpin(rdev->gart.table.vram.robj);
109 radeon_bo_unreserve(rdev->gart.table.vram.robj);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200110 rdev->gart.table_addr = gpu_addr;
Jerome Glisse4c788672009-11-20 14:29:23 +0100111 return r;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200112}
113
114void radeon_gart_table_vram_free(struct radeon_device *rdev)
115{
Jerome Glisse4c788672009-11-20 14:29:23 +0100116 int r;
117
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200118 if (rdev->gart.table.vram.robj == NULL) {
119 return;
120 }
Jerome Glisse4c788672009-11-20 14:29:23 +0100121 r = radeon_bo_reserve(rdev->gart.table.vram.robj, false);
122 if (likely(r == 0)) {
123 radeon_bo_kunmap(rdev->gart.table.vram.robj);
124 radeon_bo_unpin(rdev->gart.table.vram.robj);
125 radeon_bo_unreserve(rdev->gart.table.vram.robj);
126 }
127 radeon_bo_unref(&rdev->gart.table.vram.robj);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200128}
129
130
131
132
133/*
134 * Common gart functions.
135 */
136void radeon_gart_unbind(struct radeon_device *rdev, unsigned offset,
137 int pages)
138{
139 unsigned t;
140 unsigned p;
141 int i, j;
Dave Airlie82568562010-02-05 16:00:07 +1000142 u64 page_base;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200143
144 if (!rdev->gart.ready) {
145 WARN(1, "trying to unbind memory to unitialized GART !\n");
146 return;
147 }
Matt Turnera77f1712009-10-14 00:34:41 -0400148 t = offset / RADEON_GPU_PAGE_SIZE;
149 p = t / (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200150 for (i = 0; i < pages; i++, p++) {
151 if (rdev->gart.pages[p]) {
152 pci_unmap_page(rdev->pdev, rdev->gart.pages_addr[p],
153 PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
154 rdev->gart.pages[p] = NULL;
Dave Airlie82568562010-02-05 16:00:07 +1000155 rdev->gart.pages_addr[p] = rdev->dummy_page.addr;
156 page_base = rdev->gart.pages_addr[p];
Matt Turnera77f1712009-10-14 00:34:41 -0400157 for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) {
Dave Airlie82568562010-02-05 16:00:07 +1000158 radeon_gart_set_page(rdev, t, page_base);
159 page_base += RADEON_GPU_PAGE_SIZE;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200160 }
161 }
162 }
163 mb();
164 radeon_gart_tlb_flush(rdev);
165}
166
167int radeon_gart_bind(struct radeon_device *rdev, unsigned offset,
168 int pages, struct page **pagelist)
169{
170 unsigned t;
171 unsigned p;
172 uint64_t page_base;
173 int i, j;
174
175 if (!rdev->gart.ready) {
Jerome Glisse90aca4d2010-03-09 14:45:12 +0000176 WARN(1, "trying to bind memory to unitialized GART !\n");
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200177 return -EINVAL;
178 }
Matt Turnera77f1712009-10-14 00:34:41 -0400179 t = offset / RADEON_GPU_PAGE_SIZE;
180 p = t / (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200181
182 for (i = 0; i < pages; i++, p++) {
183 /* we need to support large memory configurations */
184 /* assume that unbind have already been call on the range */
185 rdev->gart.pages_addr[p] = pci_map_page(rdev->pdev, pagelist[i],
186 0, PAGE_SIZE,
187 PCI_DMA_BIDIRECTIONAL);
188 if (pci_dma_mapping_error(rdev->pdev, rdev->gart.pages_addr[p])) {
189 /* FIXME: failed to map page (return -ENOMEM?) */
190 radeon_gart_unbind(rdev, offset, pages);
191 return -ENOMEM;
192 }
193 rdev->gart.pages[p] = pagelist[i];
Dave Airlieed10f952009-06-29 18:29:11 +1000194 page_base = rdev->gart.pages_addr[p];
Matt Turnera77f1712009-10-14 00:34:41 -0400195 for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) {
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200196 radeon_gart_set_page(rdev, t, page_base);
Matt Turnera77f1712009-10-14 00:34:41 -0400197 page_base += RADEON_GPU_PAGE_SIZE;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200198 }
199 }
200 mb();
201 radeon_gart_tlb_flush(rdev);
202 return 0;
203}
204
Dave Airlie82568562010-02-05 16:00:07 +1000205void radeon_gart_restore(struct radeon_device *rdev)
206{
207 int i, j, t;
208 u64 page_base;
209
210 for (i = 0, t = 0; i < rdev->gart.num_cpu_pages; i++) {
211 page_base = rdev->gart.pages_addr[i];
212 for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) {
213 radeon_gart_set_page(rdev, t, page_base);
214 page_base += RADEON_GPU_PAGE_SIZE;
215 }
216 }
217 mb();
218 radeon_gart_tlb_flush(rdev);
219}
220
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200221int radeon_gart_init(struct radeon_device *rdev)
222{
Dave Airlie82568562010-02-05 16:00:07 +1000223 int r, i;
224
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200225 if (rdev->gart.pages) {
226 return 0;
227 }
Matt Turnera77f1712009-10-14 00:34:41 -0400228 /* We need PAGE_SIZE >= RADEON_GPU_PAGE_SIZE */
229 if (PAGE_SIZE < RADEON_GPU_PAGE_SIZE) {
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200230 DRM_ERROR("Page size is smaller than GPU page size!\n");
231 return -EINVAL;
232 }
Dave Airlie82568562010-02-05 16:00:07 +1000233 r = radeon_dummy_page_init(rdev);
234 if (r)
235 return r;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200236 /* Compute table size */
237 rdev->gart.num_cpu_pages = rdev->mc.gtt_size / PAGE_SIZE;
Matt Turnera77f1712009-10-14 00:34:41 -0400238 rdev->gart.num_gpu_pages = rdev->mc.gtt_size / RADEON_GPU_PAGE_SIZE;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200239 DRM_INFO("GART: num cpu pages %u, num gpu pages %u\n",
240 rdev->gart.num_cpu_pages, rdev->gart.num_gpu_pages);
241 /* Allocate pages table */
242 rdev->gart.pages = kzalloc(sizeof(void *) * rdev->gart.num_cpu_pages,
243 GFP_KERNEL);
244 if (rdev->gart.pages == NULL) {
245 radeon_gart_fini(rdev);
246 return -ENOMEM;
247 }
248 rdev->gart.pages_addr = kzalloc(sizeof(dma_addr_t) *
249 rdev->gart.num_cpu_pages, GFP_KERNEL);
250 if (rdev->gart.pages_addr == NULL) {
251 radeon_gart_fini(rdev);
252 return -ENOMEM;
253 }
Dave Airlie82568562010-02-05 16:00:07 +1000254 /* set GART entry to point to the dummy page by default */
255 for (i = 0; i < rdev->gart.num_cpu_pages; i++) {
256 rdev->gart.pages_addr[i] = rdev->dummy_page.addr;
257 }
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200258 return 0;
259}
260
261void radeon_gart_fini(struct radeon_device *rdev)
262{
263 if (rdev->gart.pages && rdev->gart.pages_addr && rdev->gart.ready) {
264 /* unbind pages */
265 radeon_gart_unbind(rdev, 0, rdev->gart.num_cpu_pages);
266 }
267 rdev->gart.ready = false;
268 kfree(rdev->gart.pages);
269 kfree(rdev->gart.pages_addr);
270 rdev->gart.pages = NULL;
271 rdev->gart.pages_addr = NULL;
272}