Paul Mundt | 33fc1a2 | 2010-10-06 15:38:16 +0900 | [diff] [blame] | 1 | comment "Interrupt controller options" |
| 2 | |
| 3 | config INTC_USERIMASK |
| 4 | bool "Userspace interrupt masking support" |
| 5 | depends on ARCH_SHMOBILE || (SUPERH && CPU_SH4A) |
| 6 | help |
| 7 | This enables support for hardware-assisted userspace hardirq |
| 8 | masking. |
| 9 | |
| 10 | SH-4A and newer interrupt blocks all support a special shadowed |
| 11 | page with all non-masking registers obscured when mapped in to |
| 12 | userspace. This is primarily for use by userspace device |
| 13 | drivers that are using special priority levels. |
| 14 | |
| 15 | If in doubt, say N. |
| 16 | |
| 17 | config INTC_BALANCING |
| 18 | bool "Hardware IRQ balancing support" |
| 19 | depends on SMP && SUPERH && CPU_SHX3 |
| 20 | help |
| 21 | This enables support for IRQ auto-distribution mode on SH-X3 |
| 22 | SMP parts. All of the balancing and CPU wakeup decisions are |
| 23 | taken care of automatically by hardware for distributed |
| 24 | vectors. |
| 25 | |
| 26 | If in doubt, say N. |
| 27 | |
| 28 | config INTC_MAPPING_DEBUG |
| 29 | bool "Expose IRQ to per-controller id mapping via debugfs" |
| 30 | depends on DEBUG_FS |
| 31 | help |
| 32 | This will create a debugfs entry for showing the relationship |
| 33 | between system IRQs and the per-controller id tables. |
| 34 | |
| 35 | If in doubt, say N. |