Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 1 | /* |
| 2 | * linux/drivers/i2c/chips/twl4030-power.c |
| 3 | * |
| 4 | * Handle TWL4030 Power initialization |
| 5 | * |
| 6 | * Copyright (C) 2008 Nokia Corporation |
| 7 | * Copyright (C) 2006 Texas Instruments, Inc |
| 8 | * |
| 9 | * Written by Kalle Jokiniemi |
| 10 | * Peter De Schrijver <peter.de-schrijver@nokia.com> |
| 11 | * Several fixes by Amit Kucheria <amit.kucheria@verdurent.com> |
| 12 | * |
| 13 | * This file is subject to the terms and conditions of the GNU General |
| 14 | * Public License. See the file "COPYING" in the main directory of this |
| 15 | * archive for more details. |
| 16 | * |
| 17 | * This program is distributed in the hope that it will be useful, |
| 18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 20 | * GNU General Public License for more details. |
| 21 | * |
| 22 | * You should have received a copy of the GNU General Public License |
| 23 | * along with this program; if not, write to the Free Software |
| 24 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 25 | */ |
| 26 | |
| 27 | #include <linux/module.h> |
| 28 | #include <linux/pm.h> |
Santosh Shilimkar | b07682b | 2009-12-13 20:05:51 +0100 | [diff] [blame] | 29 | #include <linux/i2c/twl.h> |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 30 | #include <linux/platform_device.h> |
Florian Vaussard | b0fc1da | 2013-06-18 15:17:58 +0200 | [diff] [blame] | 31 | #include <linux/of.h> |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 32 | |
| 33 | #include <asm/mach-types.h> |
| 34 | |
| 35 | static u8 twl4030_start_script_address = 0x2b; |
| 36 | |
| 37 | #define PWR_P1_SW_EVENTS 0x10 |
Igor Grinberg | 26cc3ab | 2011-11-13 11:49:50 +0200 | [diff] [blame] | 38 | #define PWR_DEVOFF (1 << 0) |
| 39 | #define SEQ_OFFSYNC (1 << 0) |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 40 | |
| 41 | #define PHY_TO_OFF_PM_MASTER(p) (p - 0x36) |
| 42 | #define PHY_TO_OFF_PM_RECEIVER(p) (p - 0x5b) |
| 43 | |
| 44 | /* resource - hfclk */ |
| 45 | #define R_HFCLKOUT_DEV_GRP PHY_TO_OFF_PM_RECEIVER(0xe6) |
| 46 | |
| 47 | /* PM events */ |
| 48 | #define R_P1_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x46) |
| 49 | #define R_P2_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x47) |
| 50 | #define R_P3_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x48) |
| 51 | #define R_CFG_P1_TRANSITION PHY_TO_OFF_PM_MASTER(0x36) |
| 52 | #define R_CFG_P2_TRANSITION PHY_TO_OFF_PM_MASTER(0x37) |
| 53 | #define R_CFG_P3_TRANSITION PHY_TO_OFF_PM_MASTER(0x38) |
| 54 | |
| 55 | #define LVL_WAKEUP 0x08 |
| 56 | |
| 57 | #define ENABLE_WARMRESET (1<<4) |
| 58 | |
| 59 | #define END_OF_SCRIPT 0x3f |
| 60 | |
| 61 | #define R_SEQ_ADD_A2S PHY_TO_OFF_PM_MASTER(0x55) |
| 62 | #define R_SEQ_ADD_S2A12 PHY_TO_OFF_PM_MASTER(0x56) |
| 63 | #define R_SEQ_ADD_S2A3 PHY_TO_OFF_PM_MASTER(0x57) |
| 64 | #define R_SEQ_ADD_WARM PHY_TO_OFF_PM_MASTER(0x58) |
| 65 | #define R_MEMORY_ADDRESS PHY_TO_OFF_PM_MASTER(0x59) |
| 66 | #define R_MEMORY_DATA PHY_TO_OFF_PM_MASTER(0x5a) |
| 67 | |
Amit Kucheria | 890463f | 2009-10-19 15:10:48 +0300 | [diff] [blame] | 68 | /* resource configuration registers |
| 69 | <RESOURCE>_DEV_GRP at address 'n+0' |
| 70 | <RESOURCE>_TYPE at address 'n+1' |
| 71 | <RESOURCE>_REMAP at address 'n+2' |
| 72 | <RESOURCE>_DEDICATED at address 'n+3' |
| 73 | */ |
Amit Kucheria | e97d154 | 2009-10-19 15:10:44 +0300 | [diff] [blame] | 74 | #define DEV_GRP_OFFSET 0 |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 75 | #define TYPE_OFFSET 1 |
Amit Kucheria | b4ead61 | 2009-10-19 15:11:00 +0300 | [diff] [blame] | 76 | #define REMAP_OFFSET 2 |
| 77 | #define DEDICATED_OFFSET 3 |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 78 | |
Amit Kucheria | e97d154 | 2009-10-19 15:10:44 +0300 | [diff] [blame] | 79 | /* Bit positions in the registers */ |
Amit Kucheria | 890463f | 2009-10-19 15:10:48 +0300 | [diff] [blame] | 80 | |
| 81 | /* <RESOURCE>_DEV_GRP */ |
Amit Kucheria | e97d154 | 2009-10-19 15:10:44 +0300 | [diff] [blame] | 82 | #define DEV_GRP_SHIFT 5 |
| 83 | #define DEV_GRP_MASK (7 << DEV_GRP_SHIFT) |
Amit Kucheria | 890463f | 2009-10-19 15:10:48 +0300 | [diff] [blame] | 84 | |
| 85 | /* <RESOURCE>_TYPE */ |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 86 | #define TYPE_SHIFT 0 |
| 87 | #define TYPE_MASK (7 << TYPE_SHIFT) |
| 88 | #define TYPE2_SHIFT 3 |
| 89 | #define TYPE2_MASK (3 << TYPE2_SHIFT) |
| 90 | |
Amit Kucheria | b4ead61 | 2009-10-19 15:11:00 +0300 | [diff] [blame] | 91 | /* <RESOURCE>_REMAP */ |
| 92 | #define SLEEP_STATE_SHIFT 0 |
| 93 | #define SLEEP_STATE_MASK (0xf << SLEEP_STATE_SHIFT) |
| 94 | #define OFF_STATE_SHIFT 4 |
| 95 | #define OFF_STATE_MASK (0xf << OFF_STATE_SHIFT) |
| 96 | |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 97 | static u8 res_config_addrs[] = { |
| 98 | [RES_VAUX1] = 0x17, |
| 99 | [RES_VAUX2] = 0x1b, |
| 100 | [RES_VAUX3] = 0x1f, |
| 101 | [RES_VAUX4] = 0x23, |
| 102 | [RES_VMMC1] = 0x27, |
| 103 | [RES_VMMC2] = 0x2b, |
| 104 | [RES_VPLL1] = 0x2f, |
| 105 | [RES_VPLL2] = 0x33, |
| 106 | [RES_VSIM] = 0x37, |
| 107 | [RES_VDAC] = 0x3b, |
| 108 | [RES_VINTANA1] = 0x3f, |
| 109 | [RES_VINTANA2] = 0x43, |
| 110 | [RES_VINTDIG] = 0x47, |
| 111 | [RES_VIO] = 0x4b, |
| 112 | [RES_VDD1] = 0x55, |
| 113 | [RES_VDD2] = 0x63, |
| 114 | [RES_VUSB_1V5] = 0x71, |
| 115 | [RES_VUSB_1V8] = 0x74, |
| 116 | [RES_VUSB_3V1] = 0x77, |
| 117 | [RES_VUSBCP] = 0x7a, |
| 118 | [RES_REGEN] = 0x7f, |
| 119 | [RES_NRES_PWRON] = 0x82, |
| 120 | [RES_CLKEN] = 0x85, |
| 121 | [RES_SYSEN] = 0x88, |
| 122 | [RES_HFCLKOUT] = 0x8b, |
| 123 | [RES_32KCLKOUT] = 0x8e, |
| 124 | [RES_RESET] = 0x91, |
Lesly A M | d7ac829 | 2011-04-14 17:57:51 +0530 | [diff] [blame] | 125 | [RES_MAIN_REF] = 0x94, |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 126 | }; |
| 127 | |
Bill Pemberton | f791be4 | 2012-11-19 13:23:04 -0500 | [diff] [blame] | 128 | static int twl4030_write_script_byte(u8 address, u8 byte) |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 129 | { |
| 130 | int err; |
| 131 | |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 132 | err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_MEMORY_ADDRESS); |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 133 | if (err) |
| 134 | goto out; |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 135 | err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, byte, R_MEMORY_DATA); |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 136 | out: |
| 137 | return err; |
| 138 | } |
| 139 | |
Bill Pemberton | f791be4 | 2012-11-19 13:23:04 -0500 | [diff] [blame] | 140 | static int twl4030_write_script_ins(u8 address, u16 pmb_message, |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 141 | u8 delay, u8 next) |
| 142 | { |
| 143 | int err; |
| 144 | |
| 145 | address *= 4; |
| 146 | err = twl4030_write_script_byte(address++, pmb_message >> 8); |
| 147 | if (err) |
| 148 | goto out; |
| 149 | err = twl4030_write_script_byte(address++, pmb_message & 0xff); |
| 150 | if (err) |
| 151 | goto out; |
| 152 | err = twl4030_write_script_byte(address++, delay); |
| 153 | if (err) |
| 154 | goto out; |
| 155 | err = twl4030_write_script_byte(address++, next); |
| 156 | out: |
| 157 | return err; |
| 158 | } |
| 159 | |
Bill Pemberton | f791be4 | 2012-11-19 13:23:04 -0500 | [diff] [blame] | 160 | static int twl4030_write_script(u8 address, struct twl4030_ins *script, |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 161 | int len) |
| 162 | { |
Arnd Bergmann | f65e9ea | 2013-01-25 14:14:26 +0000 | [diff] [blame] | 163 | int err = -EINVAL; |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 164 | |
| 165 | for (; len; len--, address++, script++) { |
| 166 | if (len == 1) { |
| 167 | err = twl4030_write_script_ins(address, |
| 168 | script->pmb_message, |
| 169 | script->delay, |
| 170 | END_OF_SCRIPT); |
| 171 | if (err) |
| 172 | break; |
| 173 | } else { |
| 174 | err = twl4030_write_script_ins(address, |
| 175 | script->pmb_message, |
| 176 | script->delay, |
| 177 | address + 1); |
| 178 | if (err) |
| 179 | break; |
| 180 | } |
| 181 | } |
| 182 | return err; |
| 183 | } |
| 184 | |
Bill Pemberton | f791be4 | 2012-11-19 13:23:04 -0500 | [diff] [blame] | 185 | static int twl4030_config_wakeup3_sequence(u8 address) |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 186 | { |
| 187 | int err; |
| 188 | u8 data; |
| 189 | |
| 190 | /* Set SLEEP to ACTIVE SEQ address for P3 */ |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 191 | err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_SEQ_ADD_S2A3); |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 192 | if (err) |
| 193 | goto out; |
| 194 | |
| 195 | /* P3 LVL_WAKEUP should be on LEVEL */ |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 196 | err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &data, R_P3_SW_EVENTS); |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 197 | if (err) |
| 198 | goto out; |
| 199 | data |= LVL_WAKEUP; |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 200 | err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, data, R_P3_SW_EVENTS); |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 201 | out: |
| 202 | if (err) |
| 203 | pr_err("TWL4030 wakeup sequence for P3 config error\n"); |
| 204 | return err; |
| 205 | } |
| 206 | |
Bill Pemberton | f791be4 | 2012-11-19 13:23:04 -0500 | [diff] [blame] | 207 | static int twl4030_config_wakeup12_sequence(u8 address) |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 208 | { |
| 209 | int err = 0; |
| 210 | u8 data; |
| 211 | |
| 212 | /* Set SLEEP to ACTIVE SEQ address for P1 and P2 */ |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 213 | err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_SEQ_ADD_S2A12); |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 214 | if (err) |
| 215 | goto out; |
| 216 | |
| 217 | /* P1/P2 LVL_WAKEUP should be on LEVEL */ |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 218 | err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &data, R_P1_SW_EVENTS); |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 219 | if (err) |
| 220 | goto out; |
| 221 | |
| 222 | data |= LVL_WAKEUP; |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 223 | err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, data, R_P1_SW_EVENTS); |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 224 | if (err) |
| 225 | goto out; |
| 226 | |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 227 | err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &data, R_P2_SW_EVENTS); |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 228 | if (err) |
| 229 | goto out; |
| 230 | |
| 231 | data |= LVL_WAKEUP; |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 232 | err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, data, R_P2_SW_EVENTS); |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 233 | if (err) |
| 234 | goto out; |
| 235 | |
| 236 | if (machine_is_omap_3430sdp() || machine_is_omap_ldp()) { |
| 237 | /* Disabling AC charger effect on sleep-active transitions */ |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 238 | err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &data, |
| 239 | R_CFG_P1_TRANSITION); |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 240 | if (err) |
| 241 | goto out; |
| 242 | data &= ~(1<<1); |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 243 | err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, data, |
| 244 | R_CFG_P1_TRANSITION); |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 245 | if (err) |
| 246 | goto out; |
| 247 | } |
| 248 | |
| 249 | out: |
| 250 | if (err) |
| 251 | pr_err("TWL4030 wakeup sequence for P1 and P2" \ |
| 252 | "config error\n"); |
| 253 | return err; |
| 254 | } |
| 255 | |
Bill Pemberton | f791be4 | 2012-11-19 13:23:04 -0500 | [diff] [blame] | 256 | static int twl4030_config_sleep_sequence(u8 address) |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 257 | { |
| 258 | int err; |
| 259 | |
| 260 | /* Set ACTIVE to SLEEP SEQ address in T2 memory*/ |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 261 | err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_SEQ_ADD_A2S); |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 262 | |
| 263 | if (err) |
| 264 | pr_err("TWL4030 sleep sequence config error\n"); |
| 265 | |
| 266 | return err; |
| 267 | } |
| 268 | |
Bill Pemberton | f791be4 | 2012-11-19 13:23:04 -0500 | [diff] [blame] | 269 | static int twl4030_config_warmreset_sequence(u8 address) |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 270 | { |
| 271 | int err; |
| 272 | u8 rd_data; |
| 273 | |
| 274 | /* Set WARM RESET SEQ address for P1 */ |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 275 | err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_SEQ_ADD_WARM); |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 276 | if (err) |
| 277 | goto out; |
| 278 | |
| 279 | /* P1/P2/P3 enable WARMRESET */ |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 280 | err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &rd_data, R_P1_SW_EVENTS); |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 281 | if (err) |
| 282 | goto out; |
| 283 | |
| 284 | rd_data |= ENABLE_WARMRESET; |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 285 | err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, rd_data, R_P1_SW_EVENTS); |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 286 | if (err) |
| 287 | goto out; |
| 288 | |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 289 | err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &rd_data, R_P2_SW_EVENTS); |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 290 | if (err) |
| 291 | goto out; |
| 292 | |
| 293 | rd_data |= ENABLE_WARMRESET; |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 294 | err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, rd_data, R_P2_SW_EVENTS); |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 295 | if (err) |
| 296 | goto out; |
| 297 | |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 298 | err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &rd_data, R_P3_SW_EVENTS); |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 299 | if (err) |
| 300 | goto out; |
| 301 | |
| 302 | rd_data |= ENABLE_WARMRESET; |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 303 | err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, rd_data, R_P3_SW_EVENTS); |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 304 | out: |
| 305 | if (err) |
| 306 | pr_err("TWL4030 warmreset seq config error\n"); |
| 307 | return err; |
| 308 | } |
| 309 | |
Bill Pemberton | f791be4 | 2012-11-19 13:23:04 -0500 | [diff] [blame] | 310 | static int twl4030_configure_resource(struct twl4030_resconfig *rconfig) |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 311 | { |
| 312 | int rconfig_addr; |
| 313 | int err; |
| 314 | u8 type; |
| 315 | u8 grp; |
Amit Kucheria | b4ead61 | 2009-10-19 15:11:00 +0300 | [diff] [blame] | 316 | u8 remap; |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 317 | |
| 318 | if (rconfig->resource > TOTAL_RESOURCES) { |
| 319 | pr_err("TWL4030 Resource %d does not exist\n", |
| 320 | rconfig->resource); |
| 321 | return -EINVAL; |
| 322 | } |
| 323 | |
| 324 | rconfig_addr = res_config_addrs[rconfig->resource]; |
| 325 | |
| 326 | /* Set resource group */ |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 327 | err = twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &grp, |
Balaji T K | fc7b92f | 2009-12-13 21:23:33 +0100 | [diff] [blame] | 328 | rconfig_addr + DEV_GRP_OFFSET); |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 329 | if (err) { |
| 330 | pr_err("TWL4030 Resource %d group could not be read\n", |
| 331 | rconfig->resource); |
| 332 | return err; |
| 333 | } |
| 334 | |
Aaro Koskinen | 56baa66 | 2009-10-19 21:24:02 +0200 | [diff] [blame] | 335 | if (rconfig->devgroup != TWL4030_RESCONFIG_UNDEF) { |
Amit Kucheria | e97d154 | 2009-10-19 15:10:44 +0300 | [diff] [blame] | 336 | grp &= ~DEV_GRP_MASK; |
| 337 | grp |= rconfig->devgroup << DEV_GRP_SHIFT; |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 338 | err = twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, |
Balaji T K | fc7b92f | 2009-12-13 21:23:33 +0100 | [diff] [blame] | 339 | grp, rconfig_addr + DEV_GRP_OFFSET); |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 340 | if (err < 0) { |
| 341 | pr_err("TWL4030 failed to program devgroup\n"); |
| 342 | return err; |
| 343 | } |
| 344 | } |
| 345 | |
| 346 | /* Set resource types */ |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 347 | err = twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &type, |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 348 | rconfig_addr + TYPE_OFFSET); |
| 349 | if (err < 0) { |
| 350 | pr_err("TWL4030 Resource %d type could not be read\n", |
| 351 | rconfig->resource); |
| 352 | return err; |
| 353 | } |
| 354 | |
Aaro Koskinen | 56baa66 | 2009-10-19 21:24:02 +0200 | [diff] [blame] | 355 | if (rconfig->type != TWL4030_RESCONFIG_UNDEF) { |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 356 | type &= ~TYPE_MASK; |
| 357 | type |= rconfig->type << TYPE_SHIFT; |
| 358 | } |
| 359 | |
Aaro Koskinen | 56baa66 | 2009-10-19 21:24:02 +0200 | [diff] [blame] | 360 | if (rconfig->type2 != TWL4030_RESCONFIG_UNDEF) { |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 361 | type &= ~TYPE2_MASK; |
| 362 | type |= rconfig->type2 << TYPE2_SHIFT; |
| 363 | } |
| 364 | |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 365 | err = twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 366 | type, rconfig_addr + TYPE_OFFSET); |
| 367 | if (err < 0) { |
| 368 | pr_err("TWL4030 failed to program resource type\n"); |
| 369 | return err; |
| 370 | } |
| 371 | |
Amit Kucheria | b4ead61 | 2009-10-19 15:11:00 +0300 | [diff] [blame] | 372 | /* Set remap states */ |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 373 | err = twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &remap, |
Balaji T K | fc7b92f | 2009-12-13 21:23:33 +0100 | [diff] [blame] | 374 | rconfig_addr + REMAP_OFFSET); |
Amit Kucheria | b4ead61 | 2009-10-19 15:11:00 +0300 | [diff] [blame] | 375 | if (err < 0) { |
| 376 | pr_err("TWL4030 Resource %d remap could not be read\n", |
| 377 | rconfig->resource); |
| 378 | return err; |
| 379 | } |
| 380 | |
Amit Kucheria | 53cf9a6 | 2009-10-21 14:49:22 +0300 | [diff] [blame] | 381 | if (rconfig->remap_off != TWL4030_RESCONFIG_UNDEF) { |
Amit Kucheria | b4ead61 | 2009-10-19 15:11:00 +0300 | [diff] [blame] | 382 | remap &= ~OFF_STATE_MASK; |
| 383 | remap |= rconfig->remap_off << OFF_STATE_SHIFT; |
| 384 | } |
| 385 | |
Amit Kucheria | 53cf9a6 | 2009-10-21 14:49:22 +0300 | [diff] [blame] | 386 | if (rconfig->remap_sleep != TWL4030_RESCONFIG_UNDEF) { |
Amit Kucheria | b4ead61 | 2009-10-19 15:11:00 +0300 | [diff] [blame] | 387 | remap &= ~SLEEP_STATE_MASK; |
Mike Turquette | 1ea933f | 2010-02-05 09:51:37 +0100 | [diff] [blame] | 388 | remap |= rconfig->remap_sleep << SLEEP_STATE_SHIFT; |
Amit Kucheria | b4ead61 | 2009-10-19 15:11:00 +0300 | [diff] [blame] | 389 | } |
| 390 | |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 391 | err = twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, |
Balaji T K | fc7b92f | 2009-12-13 21:23:33 +0100 | [diff] [blame] | 392 | remap, |
| 393 | rconfig_addr + REMAP_OFFSET); |
Amit Kucheria | b4ead61 | 2009-10-19 15:11:00 +0300 | [diff] [blame] | 394 | if (err < 0) { |
| 395 | pr_err("TWL4030 failed to program remap\n"); |
| 396 | return err; |
| 397 | } |
| 398 | |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 399 | return 0; |
| 400 | } |
| 401 | |
Bill Pemberton | f791be4 | 2012-11-19 13:23:04 -0500 | [diff] [blame] | 402 | static int load_twl4030_script(struct twl4030_script *tscript, |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 403 | u8 address) |
| 404 | { |
| 405 | int err; |
Amit Kucheria | 75a7456 | 2009-08-17 17:01:56 +0300 | [diff] [blame] | 406 | static int order; |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 407 | |
| 408 | /* Make sure the script isn't going beyond last valid address (0x3f) */ |
| 409 | if ((address + tscript->size) > END_OF_SCRIPT) { |
| 410 | pr_err("TWL4030 scripts too big error\n"); |
| 411 | return -EINVAL; |
| 412 | } |
| 413 | |
| 414 | err = twl4030_write_script(address, tscript->script, tscript->size); |
| 415 | if (err) |
| 416 | goto out; |
| 417 | |
| 418 | if (tscript->flags & TWL4030_WRST_SCRIPT) { |
| 419 | err = twl4030_config_warmreset_sequence(address); |
| 420 | if (err) |
| 421 | goto out; |
| 422 | } |
| 423 | if (tscript->flags & TWL4030_WAKEUP12_SCRIPT) { |
| 424 | err = twl4030_config_wakeup12_sequence(address); |
| 425 | if (err) |
| 426 | goto out; |
Amit Kucheria | 75a7456 | 2009-08-17 17:01:56 +0300 | [diff] [blame] | 427 | order = 1; |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 428 | } |
| 429 | if (tscript->flags & TWL4030_WAKEUP3_SCRIPT) { |
| 430 | err = twl4030_config_wakeup3_sequence(address); |
| 431 | if (err) |
| 432 | goto out; |
| 433 | } |
Lesly A M | c62dd36 | 2011-04-14 17:57:49 +0530 | [diff] [blame] | 434 | if (tscript->flags & TWL4030_SLEEP_SCRIPT) { |
Lesly A M | 1f968ff | 2011-04-14 17:57:50 +0530 | [diff] [blame] | 435 | if (!order) |
Amit Kucheria | 75a7456 | 2009-08-17 17:01:56 +0300 | [diff] [blame] | 436 | pr_warning("TWL4030: Bad order of scripts (sleep "\ |
| 437 | "script before wakeup) Leads to boot"\ |
| 438 | "failure on some boards\n"); |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 439 | err = twl4030_config_sleep_sequence(address); |
Lesly A M | c62dd36 | 2011-04-14 17:57:49 +0530 | [diff] [blame] | 440 | } |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 441 | out: |
| 442 | return err; |
| 443 | } |
| 444 | |
Mike Turquette | 11a441c | 2010-02-22 11:16:30 -0600 | [diff] [blame] | 445 | int twl4030_remove_script(u8 flags) |
| 446 | { |
| 447 | int err = 0; |
| 448 | |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 449 | err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG1, |
| 450 | TWL4030_PM_MASTER_PROTECT_KEY); |
Mike Turquette | 11a441c | 2010-02-22 11:16:30 -0600 | [diff] [blame] | 451 | if (err) { |
| 452 | pr_err("twl4030: unable to unlock PROTECT_KEY\n"); |
| 453 | return err; |
| 454 | } |
| 455 | |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 456 | err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG2, |
| 457 | TWL4030_PM_MASTER_PROTECT_KEY); |
Mike Turquette | 11a441c | 2010-02-22 11:16:30 -0600 | [diff] [blame] | 458 | if (err) { |
| 459 | pr_err("twl4030: unable to unlock PROTECT_KEY\n"); |
| 460 | return err; |
| 461 | } |
| 462 | |
| 463 | if (flags & TWL4030_WRST_SCRIPT) { |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 464 | err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, END_OF_SCRIPT, |
| 465 | R_SEQ_ADD_WARM); |
Mike Turquette | 11a441c | 2010-02-22 11:16:30 -0600 | [diff] [blame] | 466 | if (err) |
| 467 | return err; |
| 468 | } |
| 469 | if (flags & TWL4030_WAKEUP12_SCRIPT) { |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 470 | err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, END_OF_SCRIPT, |
| 471 | R_SEQ_ADD_S2A12); |
Lesly A M | eac78a2 | 2011-05-04 17:38:53 +0530 | [diff] [blame] | 472 | if (err) |
Mike Turquette | 11a441c | 2010-02-22 11:16:30 -0600 | [diff] [blame] | 473 | return err; |
| 474 | } |
| 475 | if (flags & TWL4030_WAKEUP3_SCRIPT) { |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 476 | err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, END_OF_SCRIPT, |
| 477 | R_SEQ_ADD_S2A3); |
Mike Turquette | 11a441c | 2010-02-22 11:16:30 -0600 | [diff] [blame] | 478 | if (err) |
| 479 | return err; |
| 480 | } |
| 481 | if (flags & TWL4030_SLEEP_SCRIPT) { |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 482 | err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, END_OF_SCRIPT, |
| 483 | R_SEQ_ADD_A2S); |
Mike Turquette | 11a441c | 2010-02-22 11:16:30 -0600 | [diff] [blame] | 484 | if (err) |
| 485 | return err; |
| 486 | } |
| 487 | |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 488 | err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 0, |
| 489 | TWL4030_PM_MASTER_PROTECT_KEY); |
Mike Turquette | 11a441c | 2010-02-22 11:16:30 -0600 | [diff] [blame] | 490 | if (err) |
| 491 | pr_err("TWL4030 Unable to relock registers\n"); |
| 492 | |
| 493 | return err; |
| 494 | } |
| 495 | |
Jingoo Han | fae0158 | 2013-08-01 10:52:55 +0900 | [diff] [blame] | 496 | static int twl4030_power_configure_scripts(struct twl4030_power_data *pdata) |
Florian Vaussard | f58cb40 | 2013-06-18 15:17:57 +0200 | [diff] [blame] | 497 | { |
| 498 | int err; |
| 499 | int i; |
| 500 | u8 address = twl4030_start_script_address; |
| 501 | |
| 502 | for (i = 0; i < pdata->num; i++) { |
| 503 | err = load_twl4030_script(pdata->scripts[i], address); |
| 504 | if (err) |
| 505 | return err; |
| 506 | address += pdata->scripts[i]->size; |
| 507 | } |
| 508 | |
| 509 | return 0; |
| 510 | } |
| 511 | |
Jingoo Han | fae0158 | 2013-08-01 10:52:55 +0900 | [diff] [blame] | 512 | static int twl4030_power_configure_resources(struct twl4030_power_data *pdata) |
Florian Vaussard | f58cb40 | 2013-06-18 15:17:57 +0200 | [diff] [blame] | 513 | { |
| 514 | struct twl4030_resconfig *resconfig = pdata->resource_config; |
| 515 | int err; |
| 516 | |
| 517 | if (resconfig) { |
| 518 | while (resconfig->resource) { |
| 519 | err = twl4030_configure_resource(resconfig); |
| 520 | if (err) |
| 521 | return err; |
| 522 | resconfig++; |
| 523 | } |
| 524 | } |
| 525 | |
| 526 | return 0; |
| 527 | } |
| 528 | |
Igor Grinberg | 26cc3ab | 2011-11-13 11:49:50 +0200 | [diff] [blame] | 529 | /* |
| 530 | * In master mode, start the power off sequence. |
| 531 | * After a successful execution, TWL shuts down the power to the SoC |
| 532 | * and all peripherals connected to it. |
| 533 | */ |
| 534 | void twl4030_power_off(void) |
| 535 | { |
| 536 | int err; |
| 537 | |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 538 | err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, PWR_DEVOFF, |
Igor Grinberg | 26cc3ab | 2011-11-13 11:49:50 +0200 | [diff] [blame] | 539 | TWL4030_PM_MASTER_P1_SW_EVENTS); |
| 540 | if (err) |
| 541 | pr_err("TWL4030 Unable to power off\n"); |
| 542 | } |
| 543 | |
Florian Vaussard | b0fc1da | 2013-06-18 15:17:58 +0200 | [diff] [blame] | 544 | static bool twl4030_power_use_poweroff(struct twl4030_power_data *pdata, |
| 545 | struct device_node *node) |
| 546 | { |
| 547 | if (pdata && pdata->use_poweroff) |
| 548 | return true; |
| 549 | |
| 550 | if (of_property_read_bool(node, "ti,use_poweroff")) |
| 551 | return true; |
| 552 | |
| 553 | return false; |
| 554 | } |
| 555 | |
Jingoo Han | fae0158 | 2013-08-01 10:52:55 +0900 | [diff] [blame] | 556 | static int twl4030_power_probe(struct platform_device *pdev) |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 557 | { |
Jingoo Han | 334a41c | 2013-07-30 17:10:05 +0900 | [diff] [blame] | 558 | struct twl4030_power_data *pdata = dev_get_platdata(&pdev->dev); |
Florian Vaussard | b0fc1da | 2013-06-18 15:17:58 +0200 | [diff] [blame] | 559 | struct device_node *node = pdev->dev.of_node; |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 560 | int err = 0; |
Florian Vaussard | cb3cabd | 2013-06-18 15:18:00 +0200 | [diff] [blame] | 561 | int err2 = 0; |
Florian Vaussard | f58cb40 | 2013-06-18 15:17:57 +0200 | [diff] [blame] | 562 | u8 val; |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 563 | |
Florian Vaussard | b0fc1da | 2013-06-18 15:17:58 +0200 | [diff] [blame] | 564 | if (!pdata && !node) { |
| 565 | dev_err(&pdev->dev, "Platform data is missing\n"); |
| 566 | return -EINVAL; |
| 567 | } |
| 568 | |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 569 | err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG1, |
| 570 | TWL4030_PM_MASTER_PROTECT_KEY); |
Florian Vaussard | e77a4c2 | 2013-06-18 15:17:59 +0200 | [diff] [blame] | 571 | err |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, |
| 572 | TWL4030_PM_MASTER_KEY_CFG2, |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 573 | TWL4030_PM_MASTER_PROTECT_KEY); |
Florian Vaussard | e77a4c2 | 2013-06-18 15:17:59 +0200 | [diff] [blame] | 574 | |
| 575 | if (err) { |
| 576 | pr_err("TWL4030 Unable to unlock registers\n"); |
| 577 | return err; |
| 578 | } |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 579 | |
Florian Vaussard | b0fc1da | 2013-06-18 15:17:58 +0200 | [diff] [blame] | 580 | if (pdata) { |
| 581 | /* TODO: convert to device tree */ |
| 582 | err = twl4030_power_configure_scripts(pdata); |
Florian Vaussard | e77a4c2 | 2013-06-18 15:17:59 +0200 | [diff] [blame] | 583 | if (err) { |
| 584 | pr_err("TWL4030 failed to load scripts\n"); |
Florian Vaussard | cb3cabd | 2013-06-18 15:18:00 +0200 | [diff] [blame] | 585 | goto relock; |
Florian Vaussard | e77a4c2 | 2013-06-18 15:17:59 +0200 | [diff] [blame] | 586 | } |
Florian Vaussard | b0fc1da | 2013-06-18 15:17:58 +0200 | [diff] [blame] | 587 | err = twl4030_power_configure_resources(pdata); |
Florian Vaussard | e77a4c2 | 2013-06-18 15:17:59 +0200 | [diff] [blame] | 588 | if (err) { |
| 589 | pr_err("TWL4030 failed to configure resource\n"); |
Florian Vaussard | cb3cabd | 2013-06-18 15:18:00 +0200 | [diff] [blame] | 590 | goto relock; |
Florian Vaussard | e77a4c2 | 2013-06-18 15:17:59 +0200 | [diff] [blame] | 591 | } |
Florian Vaussard | b0fc1da | 2013-06-18 15:17:58 +0200 | [diff] [blame] | 592 | } |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 593 | |
Igor Grinberg | 26cc3ab | 2011-11-13 11:49:50 +0200 | [diff] [blame] | 594 | /* Board has to be wired properly to use this feature */ |
Florian Vaussard | b0fc1da | 2013-06-18 15:17:58 +0200 | [diff] [blame] | 595 | if (twl4030_power_use_poweroff(pdata, node) && !pm_power_off) { |
Igor Grinberg | 26cc3ab | 2011-11-13 11:49:50 +0200 | [diff] [blame] | 596 | /* Default for SEQ_OFFSYNC is set, lets ensure this */ |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 597 | err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &val, |
Igor Grinberg | 26cc3ab | 2011-11-13 11:49:50 +0200 | [diff] [blame] | 598 | TWL4030_PM_MASTER_CFG_P123_TRANSITION); |
| 599 | if (err) { |
| 600 | pr_warning("TWL4030 Unable to read registers\n"); |
| 601 | |
| 602 | } else if (!(val & SEQ_OFFSYNC)) { |
| 603 | val |= SEQ_OFFSYNC; |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 604 | err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, val, |
Igor Grinberg | 26cc3ab | 2011-11-13 11:49:50 +0200 | [diff] [blame] | 605 | TWL4030_PM_MASTER_CFG_P123_TRANSITION); |
| 606 | if (err) { |
| 607 | pr_err("TWL4030 Unable to setup SEQ_OFFSYNC\n"); |
| 608 | goto relock; |
| 609 | } |
| 610 | } |
| 611 | |
| 612 | pm_power_off = twl4030_power_off; |
| 613 | } |
| 614 | |
| 615 | relock: |
Florian Vaussard | cb3cabd | 2013-06-18 15:18:00 +0200 | [diff] [blame] | 616 | err2 = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 0, |
Peter Ujfalusi | 4850f12 | 2012-11-13 09:28:52 +0100 | [diff] [blame] | 617 | TWL4030_PM_MASTER_PROTECT_KEY); |
Florian Vaussard | cb3cabd | 2013-06-18 15:18:00 +0200 | [diff] [blame] | 618 | if (err2) { |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 619 | pr_err("TWL4030 Unable to relock registers\n"); |
Florian Vaussard | cb3cabd | 2013-06-18 15:18:00 +0200 | [diff] [blame] | 620 | return err2; |
| 621 | } |
| 622 | |
Florian Vaussard | 637d689 | 2013-06-18 15:17:56 +0200 | [diff] [blame] | 623 | return err; |
Amit Kucheria | ebf0bd3 | 2009-08-31 18:32:18 +0200 | [diff] [blame] | 624 | } |
Florian Vaussard | 637d689 | 2013-06-18 15:17:56 +0200 | [diff] [blame] | 625 | |
| 626 | static int twl4030_power_remove(struct platform_device *pdev) |
| 627 | { |
| 628 | return 0; |
| 629 | } |
| 630 | |
Florian Vaussard | b0fc1da | 2013-06-18 15:17:58 +0200 | [diff] [blame] | 631 | #ifdef CONFIG_OF |
| 632 | static const struct of_device_id twl4030_power_of_match[] = { |
| 633 | {.compatible = "ti,twl4030-power", }, |
| 634 | { }, |
| 635 | }; |
| 636 | MODULE_DEVICE_TABLE(of, twl4030_power_of_match); |
| 637 | #endif |
| 638 | |
Florian Vaussard | 637d689 | 2013-06-18 15:17:56 +0200 | [diff] [blame] | 639 | static struct platform_driver twl4030_power_driver = { |
| 640 | .driver = { |
| 641 | .name = "twl4030_power", |
| 642 | .owner = THIS_MODULE, |
Florian Vaussard | b0fc1da | 2013-06-18 15:17:58 +0200 | [diff] [blame] | 643 | .of_match_table = of_match_ptr(twl4030_power_of_match), |
Florian Vaussard | 637d689 | 2013-06-18 15:17:56 +0200 | [diff] [blame] | 644 | }, |
| 645 | .probe = twl4030_power_probe, |
| 646 | .remove = twl4030_power_remove, |
| 647 | }; |
| 648 | |
| 649 | module_platform_driver(twl4030_power_driver); |
| 650 | |
| 651 | MODULE_AUTHOR("Nokia Corporation"); |
| 652 | MODULE_AUTHOR("Texas Instruments, Inc."); |
| 653 | MODULE_DESCRIPTION("Power management for TWL4030"); |
| 654 | MODULE_LICENSE("GPL"); |
| 655 | MODULE_ALIAS("platform:twl4030_power"); |