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Jamie Iles0f4f0672010-02-02 20:23:15 +01001/*
2 * linux/arch/arm/include/asm/pmu.h
3 *
4 * Copyright (C) 2009 picoChip Designs Ltd, Jamie Iles
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#ifndef __ARM_PMU_H__
13#define __ARM_PMU_H__
14
Will Deacon28d7f4e2010-04-29 17:11:45 +010015enum arm_pmu_type {
16 ARM_PMU_DEVICE_CPU = 0,
17 ARM_NUM_PMU_DEVICES,
18};
19
Jamie Iles0f4f0672010-02-02 20:23:15 +010020#ifdef CONFIG_CPU_HAS_PMU
21
22struct pmu_irqs {
23 const int *irqs;
24 int num_irqs;
25};
26
27/**
28 * reserve_pmu() - reserve the hardware performance counters
29 *
30 * Reserve the hardware performance counters in the system for exclusive use.
31 * The 'struct pmu_irqs' for the system is returned on success, ERR_PTR()
32 * encoded error on failure.
33 */
34extern const struct pmu_irqs *
35reserve_pmu(void);
36
37/**
38 * release_pmu() - Relinquish control of the performance counters
39 *
40 * Release the performance counters and allow someone else to use them.
41 * Callers must have disabled the counters and released IRQs before calling
42 * this. The 'struct pmu_irqs' returned from reserve_pmu() must be passed as
43 * a cookie.
44 */
45extern int
46release_pmu(const struct pmu_irqs *irqs);
47
48/**
49 * init_pmu() - Initialise the PMU.
50 *
51 * Initialise the system ready for PMU enabling. This should typically set the
52 * IRQ affinity and nothing else. The users (oprofile/perf events etc) will do
53 * the actual hardware initialisation.
54 */
55extern int
56init_pmu(void);
57
58#else /* CONFIG_CPU_HAS_PMU */
59
60static inline const struct pmu_irqs *
61reserve_pmu(void)
62{
63 return ERR_PTR(-ENODEV);
64}
65
66static inline int
67release_pmu(const struct pmu_irqs *irqs)
68{
69 return -ENODEV;
70}
71
72static inline int
73init_pmu(void)
74{
75 return -ENODEV;
76}
77
78#endif /* CONFIG_CPU_HAS_PMU */
79
80#endif /* __ARM_PMU_H__ */