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Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001/*
Haavard Skinnemoenaa8e87c2008-02-24 14:26:03 +01002 * Copyright (C) 2006, 2008 Atmel Corporation
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07003 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#include <linux/clk.h>
10#include <linux/err.h>
11#include <linux/init.h>
12#include <linux/interrupt.h>
13#include <linux/irq.h>
14#include <linux/platform_device.h>
Rafael J. Wysockif25f4f52011-04-26 19:14:35 +020015#include <linux/syscore_ops.h>
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -070016
17#include <asm/io.h>
18
19#include "intc.h"
20
21struct intc {
Haavard Skinnemoenaa8e87c2008-02-24 14:26:03 +010022 void __iomem *regs;
23 struct irq_chip chip;
Haavard Skinnemoen02a00cf2008-02-24 13:51:38 +010024#ifdef CONFIG_PM
25 unsigned long suspend_ipr;
26 unsigned long saved_ipr[64];
27#endif
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -070028};
29
30extern struct platform_device at32_intc0_device;
31
32/*
33 * TODO: We may be able to implement mask/unmask by setting IxM flags
34 * in the status register.
35 */
Thomas Gleixner3972f692011-02-06 17:29:02 +010036static void intc_mask_irq(struct irq_data *d)
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -070037{
38
39}
40
Thomas Gleixner3972f692011-02-06 17:29:02 +010041static void intc_unmask_irq(struct irq_data *d)
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -070042{
43
44}
45
46static struct intc intc0 = {
47 .chip = {
48 .name = "intc",
Thomas Gleixner3972f692011-02-06 17:29:02 +010049 .irq_mask = intc_mask_irq,
50 .irq_unmask = intc_unmask_irq,
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -070051 },
52};
53
54/*
55 * All interrupts go via intc at some point.
56 */
57asmlinkage void do_IRQ(int level, struct pt_regs *regs)
58{
Haavard Skinnemoen4e0fadf2006-10-11 01:20:37 -070059 struct pt_regs *old_regs;
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -070060 unsigned int irq;
61 unsigned long status_reg;
62
63 local_irq_disable();
64
Haavard Skinnemoen4e0fadf2006-10-11 01:20:37 -070065 old_regs = set_irq_regs(regs);
66
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -070067 irq_enter();
68
69 irq = intc_readl(&intc0, INTCAUSE0 - 4 * level);
Thomas Gleixner3972f692011-02-06 17:29:02 +010070 generic_handle_irq(irq);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -070071
72 /*
73 * Clear all interrupt level masks so that we may handle
74 * interrupts during softirq processing. If this is a nested
75 * interrupt, interrupts must stay globally disabled until we
76 * return.
77 */
78 status_reg = sysreg_read(SR);
79 status_reg &= ~(SYSREG_BIT(I0M) | SYSREG_BIT(I1M)
80 | SYSREG_BIT(I2M) | SYSREG_BIT(I3M));
81 sysreg_write(SR, status_reg);
82
83 irq_exit();
Haavard Skinnemoen4e0fadf2006-10-11 01:20:37 -070084
85 set_irq_regs(old_regs);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -070086}
87
88void __init init_IRQ(void)
89{
90 extern void _evba(void);
91 extern void irq_level0(void);
92 struct resource *regs;
93 struct clk *pclk;
94 unsigned int i;
95 u32 offset, readback;
96
97 regs = platform_get_resource(&at32_intc0_device, IORESOURCE_MEM, 0);
98 if (!regs) {
99 printk(KERN_EMERG "intc: no mmio resource defined\n");
100 goto fail;
101 }
102 pclk = clk_get(&at32_intc0_device.dev, "pclk");
103 if (IS_ERR(pclk)) {
104 printk(KERN_EMERG "intc: no clock defined\n");
105 goto fail;
106 }
107
108 clk_enable(pclk);
109
Joe Perches28f65c112011-06-09 09:13:32 -0700110 intc0.regs = ioremap(regs->start, resource_size(regs));
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700111 if (!intc0.regs) {
112 printk(KERN_EMERG "intc: failed to map registers (0x%08lx)\n",
113 (unsigned long)regs->start);
114 goto fail;
115 }
116
117 /*
118 * Initialize all interrupts to level 0 (lowest priority). The
119 * priority level may be changed by calling
120 * irq_set_priority().
121 *
122 */
123 offset = (unsigned long)&irq_level0 - (unsigned long)&_evba;
124 for (i = 0; i < NR_INTERNAL_IRQS; i++) {
125 intc_writel(&intc0, INTPR0 + 4 * i, offset);
126 readback = intc_readl(&intc0, INTPR0 + 4 * i);
127 if (readback == offset)
Thomas Gleixnerd75f1bf2011-03-24 16:39:32 +0100128 irq_set_chip_and_handler(i, &intc0.chip,
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700129 handle_simple_irq);
130 }
131
132 /* Unmask all interrupt levels */
133 sysreg_write(SR, (sysreg_read(SR)
134 & ~(SR_I3M | SR_I2M | SR_I1M | SR_I0M)));
135
136 return;
137
138fail:
139 panic("Interrupt controller initialization failed!\n");
140}
141
Haavard Skinnemoen02a00cf2008-02-24 13:51:38 +0100142#ifdef CONFIG_PM
143void intc_set_suspend_handler(unsigned long offset)
144{
145 intc0.suspend_ipr = offset;
146}
147
Rafael J. Wysockif25f4f52011-04-26 19:14:35 +0200148static int intc_suspend(void)
Haavard Skinnemoen02a00cf2008-02-24 13:51:38 +0100149{
Haavard Skinnemoen02a00cf2008-02-24 13:51:38 +0100150 int i;
151
152 if (unlikely(!irqs_disabled())) {
153 pr_err("intc_suspend: called with interrupts enabled\n");
154 return -EINVAL;
155 }
156
Rafael J. Wysockif25f4f52011-04-26 19:14:35 +0200157 if (unlikely(!intc0.suspend_ipr)) {
Haavard Skinnemoen02a00cf2008-02-24 13:51:38 +0100158 pr_err("intc_suspend: suspend_ipr not initialized\n");
159 return -EINVAL;
160 }
161
162 for (i = 0; i < 64; i++) {
Rafael J. Wysockif25f4f52011-04-26 19:14:35 +0200163 intc0.saved_ipr[i] = intc_readl(&intc0, INTPR0 + 4 * i);
164 intc_writel(&intc0, INTPR0 + 4 * i, intc0.suspend_ipr);
Haavard Skinnemoen02a00cf2008-02-24 13:51:38 +0100165 }
166
167 return 0;
168}
169
Rafael J. Wysockif25f4f52011-04-26 19:14:35 +0200170static int intc_resume(void)
Haavard Skinnemoen02a00cf2008-02-24 13:51:38 +0100171{
Haavard Skinnemoen02a00cf2008-02-24 13:51:38 +0100172 int i;
173
Haavard Skinnemoen02a00cf2008-02-24 13:51:38 +0100174 for (i = 0; i < 64; i++)
Rafael J. Wysockif25f4f52011-04-26 19:14:35 +0200175 intc_writel(&intc0, INTPR0 + 4 * i, intc0.saved_ipr[i]);
Haavard Skinnemoen02a00cf2008-02-24 13:51:38 +0100176
177 return 0;
178}
179#else
180#define intc_suspend NULL
181#define intc_resume NULL
182#endif
183
Rafael J. Wysockif25f4f52011-04-26 19:14:35 +0200184static struct syscore_ops intc_syscore_ops = {
Haavard Skinnemoen02a00cf2008-02-24 13:51:38 +0100185 .suspend = intc_suspend,
186 .resume = intc_resume,
Haavard Skinnemoenaa8e87c2008-02-24 14:26:03 +0100187};
188
Rafael J. Wysockif25f4f52011-04-26 19:14:35 +0200189static int __init intc_init_syscore(void)
Haavard Skinnemoenaa8e87c2008-02-24 14:26:03 +0100190{
Rafael J. Wysockif25f4f52011-04-26 19:14:35 +0200191 register_syscore_ops(&intc_syscore_ops);
Haavard Skinnemoenaa8e87c2008-02-24 14:26:03 +0100192
Rafael J. Wysockif25f4f52011-04-26 19:14:35 +0200193 return 0;
Haavard Skinnemoenaa8e87c2008-02-24 14:26:03 +0100194}
Rafael J. Wysockif25f4f52011-04-26 19:14:35 +0200195device_initcall(intc_init_syscore);
Haavard Skinnemoenaa8e87c2008-02-24 14:26:03 +0100196
Haavard Skinnemoen597702a2007-10-31 20:34:11 +0100197unsigned long intc_get_pending(unsigned int group)
Haavard Skinnemoen69562112006-12-08 11:04:19 +0100198{
199 return intc_readl(&intc0, INTREQ0 + 4 * group);
200}
Haavard Skinnemoen597702a2007-10-31 20:34:11 +0100201EXPORT_SYMBOL_GPL(intc_get_pending);