blob: 183c76e1187db560fdbdaef981d3820aa8a0d76d [file] [log] [blame]
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001/*
2 * Copyright (c) 2008 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17/* mac80211 and PCI callbacks */
18
19#include <linux/nl80211.h>
20#include "core.h"
21
22#define ATH_PCI_VERSION "0.1"
23
24#define IEEE80211_HTCAP_MAXRXAMPDU_FACTOR 13
25#define IEEE80211_ACTION_CAT_HT 7
26#define IEEE80211_ACTION_HT_TXCHWIDTH 0
27
28static char *dev_info = "ath9k";
29
30MODULE_AUTHOR("Atheros Communications");
31MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
32MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
33MODULE_LICENSE("Dual BSD/GPL");
34
35static struct pci_device_id ath_pci_id_table[] __devinitdata = {
36 { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI */
37 { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
38 { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI */
39 { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */
40 { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
41 { 0 }
42};
43
44static int ath_get_channel(struct ath_softc *sc,
45 struct ieee80211_channel *chan)
46{
47 int i;
48
49 for (i = 0; i < sc->sc_ah->ah_nchan; i++) {
50 if (sc->sc_ah->ah_channels[i].channel == chan->center_freq)
51 return i;
52 }
53
54 return -1;
55}
56
57static u32 ath_get_extchanmode(struct ath_softc *sc,
58 struct ieee80211_channel *chan)
59{
60 u32 chanmode = 0;
61 u8 ext_chan_offset = sc->sc_ht_info.ext_chan_offset;
62 enum ath9k_ht_macmode tx_chan_width = sc->sc_ht_info.tx_chan_width;
63
64 switch (chan->band) {
65 case IEEE80211_BAND_2GHZ:
66 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_NONE) &&
67 (tx_chan_width == ATH9K_HT_MACMODE_20))
68 chanmode = CHANNEL_G_HT20;
69 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
70 (tx_chan_width == ATH9K_HT_MACMODE_2040))
71 chanmode = CHANNEL_G_HT40PLUS;
72 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_BELOW) &&
73 (tx_chan_width == ATH9K_HT_MACMODE_2040))
74 chanmode = CHANNEL_G_HT40MINUS;
75 break;
76 case IEEE80211_BAND_5GHZ:
77 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_NONE) &&
78 (tx_chan_width == ATH9K_HT_MACMODE_20))
79 chanmode = CHANNEL_A_HT20;
80 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
81 (tx_chan_width == ATH9K_HT_MACMODE_2040))
82 chanmode = CHANNEL_A_HT40PLUS;
83 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_BELOW) &&
84 (tx_chan_width == ATH9K_HT_MACMODE_2040))
85 chanmode = CHANNEL_A_HT40MINUS;
86 break;
87 default:
88 break;
89 }
90
91 return chanmode;
92}
93
94
95static int ath_setkey_tkip(struct ath_softc *sc,
96 struct ieee80211_key_conf *key,
97 struct ath9k_keyval *hk,
98 const u8 *addr)
99{
100 u8 *key_rxmic = NULL;
101 u8 *key_txmic = NULL;
102
103 key_txmic = key->key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
104 key_rxmic = key->key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
105
106 if (addr == NULL) {
107 /* Group key installation */
108 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
109 return ath_keyset(sc, key->keyidx, hk, addr);
110 }
111 if (!sc->sc_splitmic) {
112 /*
113 * data key goes at first index,
114 * the hal handles the MIC keys at index+64.
115 */
116 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
117 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
118 return ath_keyset(sc, key->keyidx, hk, addr);
119 }
120 /*
121 * TX key goes at first index, RX key at +32.
122 * The hal handles the MIC keys at index+64.
123 */
124 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
125 if (!ath_keyset(sc, key->keyidx, hk, NULL)) {
126 /* Txmic entry failed. No need to proceed further */
127 DPRINTF(sc, ATH_DBG_KEYCACHE,
128 "%s Setting TX MIC Key Failed\n", __func__);
129 return 0;
130 }
131
132 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
133 /* XXX delete tx key on failure? */
134 return ath_keyset(sc, key->keyidx+32, hk, addr);
135}
136
137static int ath_key_config(struct ath_softc *sc,
138 const u8 *addr,
139 struct ieee80211_key_conf *key)
140{
141 struct ieee80211_vif *vif;
142 struct ath9k_keyval hk;
143 const u8 *mac = NULL;
144 int ret = 0;
145 enum ieee80211_if_types opmode;
146
147 memset(&hk, 0, sizeof(hk));
148
149 switch (key->alg) {
150 case ALG_WEP:
151 hk.kv_type = ATH9K_CIPHER_WEP;
152 break;
153 case ALG_TKIP:
154 hk.kv_type = ATH9K_CIPHER_TKIP;
155 break;
156 case ALG_CCMP:
157 hk.kv_type = ATH9K_CIPHER_AES_CCM;
158 break;
159 default:
160 return -EINVAL;
161 }
162
163 hk.kv_len = key->keylen;
164 memcpy(hk.kv_val, key->key, key->keylen);
165
166 if (!sc->sc_vaps[0])
167 return -EIO;
168
169 vif = sc->sc_vaps[0]->av_if_data;
170 opmode = vif->type;
171
172 /*
173 * Strategy:
174 * For _M_STA mc tx, we will not setup a key at all since we never
175 * tx mc.
176 * _M_STA mc rx, we will use the keyID.
177 * for _M_IBSS mc tx, we will use the keyID, and no macaddr.
178 * for _M_IBSS mc rx, we will alloc a slot and plumb the mac of the
179 * peer node. BUT we will plumb a cleartext key so that we can do
180 * perSta default key table lookup in software.
181 */
182 if (is_broadcast_ether_addr(addr)) {
183 switch (opmode) {
184 case IEEE80211_IF_TYPE_STA:
185 /* default key: could be group WPA key
186 * or could be static WEP key */
187 mac = NULL;
188 break;
189 case IEEE80211_IF_TYPE_IBSS:
190 break;
191 case IEEE80211_IF_TYPE_AP:
192 break;
193 default:
194 ASSERT(0);
195 break;
196 }
197 } else {
198 mac = addr;
199 }
200
201 if (key->alg == ALG_TKIP)
202 ret = ath_setkey_tkip(sc, key, &hk, mac);
203 else
204 ret = ath_keyset(sc, key->keyidx, &hk, mac);
205
206 if (!ret)
207 return -EIO;
208
209 sc->sc_keytype = hk.kv_type;
210 return 0;
211}
212
213static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key)
214{
215#define ATH_MAX_NUM_KEYS 4
216 int freeslot;
217
218 freeslot = (key->keyidx >= ATH_MAX_NUM_KEYS) ? 1 : 0;
219 ath_key_reset(sc, key->keyidx, freeslot);
220#undef ATH_MAX_NUM_KEYS
221}
222
223static void setup_ht_cap(struct ieee80211_ht_info *ht_info)
224{
225/* Until mac80211 includes these fields */
226
227#define IEEE80211_HT_CAP_DSSSCCK40 0x1000
228#define IEEE80211_HT_CAP_MAXRXAMPDU_65536 0x3 /* 2 ^ 16 */
229#define IEEE80211_HT_CAP_MPDUDENSITY_8 0x6 /* 8 usec */
230
231 ht_info->ht_supported = 1;
232 ht_info->cap = (u16)IEEE80211_HT_CAP_SUP_WIDTH
233 |(u16)IEEE80211_HT_CAP_MIMO_PS
234 |(u16)IEEE80211_HT_CAP_SGI_40
235 |(u16)IEEE80211_HT_CAP_DSSSCCK40;
236
237 ht_info->ampdu_factor = IEEE80211_HT_CAP_MAXRXAMPDU_65536;
238 ht_info->ampdu_density = IEEE80211_HT_CAP_MPDUDENSITY_8;
239 /* setup supported mcs set */
240 memset(ht_info->supp_mcs_set, 0, 16);
241 ht_info->supp_mcs_set[0] = 0xff;
242 ht_info->supp_mcs_set[1] = 0xff;
243 ht_info->supp_mcs_set[12] = IEEE80211_HT_CAP_MCS_TX_DEFINED;
244}
245
246static int ath_rate2idx(struct ath_softc *sc, int rate)
247{
248 int i = 0, cur_band, n_rates;
249 struct ieee80211_hw *hw = sc->hw;
250
251 cur_band = hw->conf.channel->band;
252 n_rates = sc->sbands[cur_band].n_bitrates;
253
254 for (i = 0; i < n_rates; i++) {
255 if (sc->sbands[cur_band].bitrates[i].bitrate == rate)
256 break;
257 }
258
259 /*
260 * NB:mac80211 validates rx rate index against the supported legacy rate
261 * index only (should be done against ht rates also), return the highest
262 * legacy rate index for rx rate which does not match any one of the
263 * supported basic and extended rates to make mac80211 happy.
264 * The following hack will be cleaned up once the issue with
265 * the rx rate index validation in mac80211 is fixed.
266 */
267 if (i == n_rates)
268 return n_rates - 1;
269 return i;
270}
271
272static void ath9k_rx_prepare(struct ath_softc *sc,
273 struct sk_buff *skb,
274 struct ath_recv_status *status,
275 struct ieee80211_rx_status *rx_status)
276{
277 struct ieee80211_hw *hw = sc->hw;
278 struct ieee80211_channel *curchan = hw->conf.channel;
279
280 memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
281
282 rx_status->mactime = status->tsf;
283 rx_status->band = curchan->band;
284 rx_status->freq = curchan->center_freq;
285 rx_status->noise = ATH_DEFAULT_NOISE_FLOOR;
286 rx_status->signal = rx_status->noise + status->rssi;
287 rx_status->rate_idx = ath_rate2idx(sc, (status->rateKbps / 100));
288 rx_status->antenna = status->antenna;
289 rx_status->qual = status->rssi * 100 / 64;
290
291 if (status->flags & ATH_RX_MIC_ERROR)
292 rx_status->flag |= RX_FLAG_MMIC_ERROR;
293 if (status->flags & ATH_RX_FCS_ERROR)
294 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
295
296 rx_status->flag |= RX_FLAG_TSFT;
297}
298
299static u8 parse_mpdudensity(u8 mpdudensity)
300{
301 /*
302 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
303 * 0 for no restriction
304 * 1 for 1/4 us
305 * 2 for 1/2 us
306 * 3 for 1 us
307 * 4 for 2 us
308 * 5 for 4 us
309 * 6 for 8 us
310 * 7 for 16 us
311 */
312 switch (mpdudensity) {
313 case 0:
314 return 0;
315 case 1:
316 case 2:
317 case 3:
318 /* Our lower layer calculations limit our precision to
319 1 microsecond */
320 return 1;
321 case 4:
322 return 2;
323 case 5:
324 return 4;
325 case 6:
326 return 8;
327 case 7:
328 return 16;
329 default:
330 return 0;
331 }
332}
333
334static int ath9k_start(struct ieee80211_hw *hw)
335{
336 struct ath_softc *sc = hw->priv;
337 struct ieee80211_channel *curchan = hw->conf.channel;
338 int error = 0, pos;
339
340 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Starting driver with "
341 "initial channel: %d MHz\n", __func__, curchan->center_freq);
342
343 /* setup initial channel */
344
345 pos = ath_get_channel(sc, curchan);
346 if (pos == -1) {
347 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
348 return -EINVAL;
349 }
350
351 sc->sc_ah->ah_channels[pos].chanmode =
352 (curchan->band == IEEE80211_BAND_2GHZ) ? CHANNEL_G : CHANNEL_A;
353
354 /* open ath_dev */
355 error = ath_open(sc, &sc->sc_ah->ah_channels[pos]);
356 if (error) {
357 DPRINTF(sc, ATH_DBG_FATAL,
358 "%s: Unable to complete ath_open\n", __func__);
359 return error;
360 }
361
362 ieee80211_wake_queues(hw);
363 return 0;
364}
365
366static int ath9k_tx(struct ieee80211_hw *hw,
367 struct sk_buff *skb)
368{
369 struct ath_softc *sc = hw->priv;
370 int hdrlen, padsize;
371
372 /* Add the padding after the header if this is not already done */
373 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
374 if (hdrlen & 3) {
375 padsize = hdrlen % 4;
376 if (skb_headroom(skb) < padsize)
377 return -1;
378 skb_push(skb, padsize);
379 memmove(skb->data, skb->data + padsize, hdrlen);
380 }
381
382 DPRINTF(sc, ATH_DBG_XMIT, "%s: transmitting packet, skb: %p\n",
383 __func__,
384 skb);
385
386 if (ath_tx_start(sc, skb) != 0) {
387 DPRINTF(sc, ATH_DBG_XMIT, "%s: TX failed\n", __func__);
388 dev_kfree_skb_any(skb);
389 /* FIXME: Check for proper return value from ATH_DEV */
390 return 0;
391 }
392
393 return 0;
394}
395
396static void ath9k_stop(struct ieee80211_hw *hw)
397{
398 struct ath_softc *sc = hw->priv;
399 int error;
400
401 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Driver halt\n", __func__);
402
403 error = ath_suspend(sc);
404 if (error)
405 DPRINTF(sc, ATH_DBG_CONFIG,
406 "%s: Device is no longer present\n", __func__);
407
408 ieee80211_stop_queues(hw);
409}
410
411static int ath9k_add_interface(struct ieee80211_hw *hw,
412 struct ieee80211_if_init_conf *conf)
413{
414 struct ath_softc *sc = hw->priv;
415 int error, ic_opmode = 0;
416
417 /* Support only vap for now */
418
419 if (sc->sc_nvaps)
420 return -ENOBUFS;
421
422 switch (conf->type) {
423 case IEEE80211_IF_TYPE_STA:
424 ic_opmode = ATH9K_M_STA;
425 break;
426 case IEEE80211_IF_TYPE_IBSS:
427 ic_opmode = ATH9K_M_IBSS;
428 break;
Jouni Malinen2ad67de2008-08-11 14:01:47 +0300429 case IEEE80211_IF_TYPE_AP:
430 ic_opmode = ATH9K_M_HOSTAP;
431 break;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700432 default:
433 DPRINTF(sc, ATH_DBG_FATAL,
Jouni Malinen2ad67de2008-08-11 14:01:47 +0300434 "%s: Interface type %d not yet supported\n",
435 __func__, conf->type);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700436 return -EOPNOTSUPP;
437 }
438
439 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a VAP of type: %d\n",
440 __func__,
441 ic_opmode);
442
443 error = ath_vap_attach(sc, 0, conf->vif, ic_opmode);
444 if (error) {
445 DPRINTF(sc, ATH_DBG_FATAL,
446 "%s: Unable to attach vap, error: %d\n",
447 __func__, error);
448 return error;
449 }
450
451 return 0;
452}
453
454static void ath9k_remove_interface(struct ieee80211_hw *hw,
455 struct ieee80211_if_init_conf *conf)
456{
457 struct ath_softc *sc = hw->priv;
458 struct ath_vap *avp;
459 int error;
460
461 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach VAP\n", __func__);
462
463 avp = sc->sc_vaps[0];
464 if (avp == NULL) {
465 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
466 __func__);
467 return;
468 }
469
470#ifdef CONFIG_SLOW_ANT_DIV
471 ath_slow_ant_div_stop(&sc->sc_antdiv);
472#endif
473
474 /* Update ratectrl */
475 ath_rate_newstate(sc, avp);
476
477 /* Reclaim beacon resources */
Sujithb4696c8b2008-08-11 14:04:52 +0530478 if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP ||
479 sc->sc_ah->ah_opmode == ATH9K_M_IBSS) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700480 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
481 ath_beacon_return(sc, avp);
482 }
483
484 /* Set interrupt mask */
485 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
486 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_imask & ~ATH9K_INT_GLOBAL);
Sujith672840a2008-08-11 14:05:08 +0530487 sc->sc_flags &= ~SC_OP_BEACONS;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700488
489 error = ath_vap_detach(sc, 0);
490 if (error)
491 DPRINTF(sc, ATH_DBG_FATAL,
492 "%s: Unable to detach vap, error: %d\n",
493 __func__, error);
494}
495
496static int ath9k_config(struct ieee80211_hw *hw,
497 struct ieee80211_conf *conf)
498{
499 struct ath_softc *sc = hw->priv;
500 struct ieee80211_channel *curchan = hw->conf.channel;
501 int pos;
502
503 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
504 __func__,
505 curchan->center_freq);
506
507 pos = ath_get_channel(sc, curchan);
508 if (pos == -1) {
509 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
510 return -EINVAL;
511 }
512
513 sc->sc_ah->ah_channels[pos].chanmode =
Sujith86b89ee2008-08-07 10:54:57 +0530514 (curchan->band == IEEE80211_BAND_2GHZ) ?
515 CHANNEL_G : CHANNEL_A;
516
517 if (sc->sc_curaid && hw->conf.ht_conf.ht_supported)
518 sc->sc_ah->ah_channels[pos].chanmode =
519 ath_get_extchanmode(sc, curchan);
520
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700521 sc->sc_config.txpowlimit = 2 * conf->power_level;
522
523 /* set h/w channel */
524 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
525 DPRINTF(sc, ATH_DBG_FATAL, "%s: Unable to set channel\n",
526 __func__);
527
528 return 0;
529}
530
531static int ath9k_config_interface(struct ieee80211_hw *hw,
532 struct ieee80211_vif *vif,
533 struct ieee80211_if_conf *conf)
534{
535 struct ath_softc *sc = hw->priv;
Jouni Malinen2ad67de2008-08-11 14:01:47 +0300536 struct ath_hal *ah = sc->sc_ah;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700537 struct ath_vap *avp;
538 u32 rfilt = 0;
539 int error, i;
540 DECLARE_MAC_BUF(mac);
541
542 avp = sc->sc_vaps[0];
543 if (avp == NULL) {
544 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
545 __func__);
546 return -EINVAL;
547 }
548
Jouni Malinen2ad67de2008-08-11 14:01:47 +0300549 /* TODO: Need to decide which hw opmode to use for multi-interface
550 * cases */
551 if (vif->type == IEEE80211_IF_TYPE_AP &&
552 ah->ah_opmode != ATH9K_M_HOSTAP) {
553 ah->ah_opmode = ATH9K_M_HOSTAP;
554 ath9k_hw_setopmode(ah);
555 ath9k_hw_write_associd(ah, sc->sc_myaddr, 0);
556 /* Request full reset to get hw opmode changed properly */
557 sc->sc_flags |= SC_OP_FULL_RESET;
558 }
559
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700560 if ((conf->changed & IEEE80211_IFCC_BSSID) &&
561 !is_zero_ether_addr(conf->bssid)) {
562 switch (vif->type) {
563 case IEEE80211_IF_TYPE_STA:
564 case IEEE80211_IF_TYPE_IBSS:
565 /* Update ratectrl about the new state */
566 ath_rate_newstate(sc, avp);
567
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700568 /* Set BSSID */
569 memcpy(sc->sc_curbssid, conf->bssid, ETH_ALEN);
570 sc->sc_curaid = 0;
571 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
572 sc->sc_curaid);
573
574 /* Set aggregation protection mode parameters */
575 sc->sc_config.ath_aggr_prot = 0;
576
577 /*
578 * Reset our TSF so that its value is lower than the
579 * beacon that we are trying to catch.
580 * Only then hw will update its TSF register with the
581 * new beacon. Reset the TSF before setting the BSSID
582 * to avoid allowing in any frames that would update
583 * our TSF only to have us clear it
584 * immediately thereafter.
585 */
586 ath9k_hw_reset_tsf(sc->sc_ah);
587
588 /* Disable BMISS interrupt when we're not associated */
589 ath9k_hw_set_interrupts(sc->sc_ah,
590 sc->sc_imask &
591 ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS));
592 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
593
594 DPRINTF(sc, ATH_DBG_CONFIG,
595 "%s: RX filter 0x%x bssid %s aid 0x%x\n",
596 __func__, rfilt,
597 print_mac(mac, sc->sc_curbssid), sc->sc_curaid);
598
599 /* need to reconfigure the beacon */
Sujith672840a2008-08-11 14:05:08 +0530600 sc->sc_flags &= ~SC_OP_BEACONS ;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700601
602 break;
603 default:
604 break;
605 }
606 }
607
608 if ((conf->changed & IEEE80211_IFCC_BEACON) &&
609 (vif->type == IEEE80211_IF_TYPE_IBSS)) {
610 /*
611 * Allocate and setup the beacon frame.
612 *
613 * Stop any previous beacon DMA. This may be
614 * necessary, for example, when an ibss merge
615 * causes reconfiguration; we may be called
616 * with beacon transmission active.
617 */
618 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
619
620 error = ath_beacon_alloc(sc, 0);
621 if (error != 0)
622 return error;
623
624 ath_beacon_sync(sc, 0);
625 }
626
627 /* Check for WLAN_CAPABILITY_PRIVACY ? */
628 if ((avp->av_opmode != IEEE80211_IF_TYPE_STA)) {
629 for (i = 0; i < IEEE80211_WEP_NKID; i++)
630 if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
631 ath9k_hw_keysetmac(sc->sc_ah,
632 (u16)i,
633 sc->sc_curbssid);
634 }
635
636 /* Only legacy IBSS for now */
637 if (vif->type == IEEE80211_IF_TYPE_IBSS)
638 ath_update_chainmask(sc, 0);
639
640 return 0;
641}
642
643#define SUPPORTED_FILTERS \
644 (FIF_PROMISC_IN_BSS | \
645 FIF_ALLMULTI | \
646 FIF_CONTROL | \
647 FIF_OTHER_BSS | \
648 FIF_BCN_PRBRESP_PROMISC | \
649 FIF_FCSFAIL)
650
Sujith7dcfdcd2008-08-11 14:03:13 +0530651/* FIXME: sc->sc_full_reset ? */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700652static void ath9k_configure_filter(struct ieee80211_hw *hw,
653 unsigned int changed_flags,
654 unsigned int *total_flags,
655 int mc_count,
656 struct dev_mc_list *mclist)
657{
658 struct ath_softc *sc = hw->priv;
Sujith7dcfdcd2008-08-11 14:03:13 +0530659 u32 rfilt;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700660
661 changed_flags &= SUPPORTED_FILTERS;
662 *total_flags &= SUPPORTED_FILTERS;
663
Sujith7dcfdcd2008-08-11 14:03:13 +0530664 sc->rx_filter = *total_flags;
665 rfilt = ath_calcrxfilter(sc);
666 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
667
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700668 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
669 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
Sujith7dcfdcd2008-08-11 14:03:13 +0530670 ath9k_hw_write_associd(sc->sc_ah, ath_bcast_mac, 0);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700671 }
Sujith7dcfdcd2008-08-11 14:03:13 +0530672
673 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set HW RX filter: 0x%x\n",
674 __func__, sc->rx_filter);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700675}
676
677static void ath9k_sta_notify(struct ieee80211_hw *hw,
678 struct ieee80211_vif *vif,
679 enum sta_notify_cmd cmd,
680 const u8 *addr)
681{
682 struct ath_softc *sc = hw->priv;
683 struct ath_node *an;
684 unsigned long flags;
685 DECLARE_MAC_BUF(mac);
686
687 spin_lock_irqsave(&sc->node_lock, flags);
688 an = ath_node_find(sc, (u8 *) addr);
689 spin_unlock_irqrestore(&sc->node_lock, flags);
690
691 switch (cmd) {
692 case STA_NOTIFY_ADD:
693 spin_lock_irqsave(&sc->node_lock, flags);
694 if (!an) {
695 ath_node_attach(sc, (u8 *)addr, 0);
696 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a node: %s\n",
697 __func__,
698 print_mac(mac, addr));
699 } else {
700 ath_node_get(sc, (u8 *)addr);
701 }
702 spin_unlock_irqrestore(&sc->node_lock, flags);
703 break;
704 case STA_NOTIFY_REMOVE:
705 if (!an)
706 DPRINTF(sc, ATH_DBG_FATAL,
707 "%s: Removal of a non-existent node\n",
708 __func__);
709 else {
710 ath_node_put(sc, an, ATH9K_BH_STATUS_INTACT);
711 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Put a node: %s\n",
712 __func__,
713 print_mac(mac, addr));
714 }
715 break;
716 default:
717 break;
718 }
719}
720
721static int ath9k_conf_tx(struct ieee80211_hw *hw,
722 u16 queue,
723 const struct ieee80211_tx_queue_params *params)
724{
725 struct ath_softc *sc = hw->priv;
Sujithea9880f2008-08-07 10:53:10 +0530726 struct ath9k_tx_queue_info qi;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700727 int ret = 0, qnum;
728
729 if (queue >= WME_NUM_AC)
730 return 0;
731
732 qi.tqi_aifs = params->aifs;
733 qi.tqi_cwmin = params->cw_min;
734 qi.tqi_cwmax = params->cw_max;
735 qi.tqi_burstTime = params->txop;
736 qnum = ath_get_hal_qnum(queue, sc);
737
738 DPRINTF(sc, ATH_DBG_CONFIG,
739 "%s: Configure tx [queue/halq] [%d/%d], "
740 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
741 __func__,
742 queue,
743 qnum,
744 params->aifs,
745 params->cw_min,
746 params->cw_max,
747 params->txop);
748
749 ret = ath_txq_update(sc, qnum, &qi);
750 if (ret)
751 DPRINTF(sc, ATH_DBG_FATAL,
752 "%s: TXQ Update failed\n", __func__);
753
754 return ret;
755}
756
757static int ath9k_set_key(struct ieee80211_hw *hw,
758 enum set_key_cmd cmd,
759 const u8 *local_addr,
760 const u8 *addr,
761 struct ieee80211_key_conf *key)
762{
763 struct ath_softc *sc = hw->priv;
764 int ret = 0;
765
766 DPRINTF(sc, ATH_DBG_KEYCACHE, " %s: Set HW Key\n", __func__);
767
768 switch (cmd) {
769 case SET_KEY:
770 ret = ath_key_config(sc, addr, key);
771 if (!ret) {
772 set_bit(key->keyidx, sc->sc_keymap);
773 key->hw_key_idx = key->keyidx;
774 /* push IV and Michael MIC generation to stack */
775 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
776 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
777 }
778 break;
779 case DISABLE_KEY:
780 ath_key_delete(sc, key);
781 clear_bit(key->keyidx, sc->sc_keymap);
782 sc->sc_keytype = ATH9K_CIPHER_CLR;
783 break;
784 default:
785 ret = -EINVAL;
786 }
787
788 return ret;
789}
790
791static void ath9k_ht_conf(struct ath_softc *sc,
792 struct ieee80211_bss_conf *bss_conf)
793{
794#define IEEE80211_HT_CAP_40MHZ_INTOLERANT BIT(14)
795 struct ath_ht_info *ht_info = &sc->sc_ht_info;
796
797 if (bss_conf->assoc_ht) {
798 ht_info->ext_chan_offset =
799 bss_conf->ht_bss_conf->bss_cap &
800 IEEE80211_HT_IE_CHA_SEC_OFFSET;
801
802 if (!(bss_conf->ht_conf->cap &
803 IEEE80211_HT_CAP_40MHZ_INTOLERANT) &&
804 (bss_conf->ht_bss_conf->bss_cap &
805 IEEE80211_HT_IE_CHA_WIDTH))
806 ht_info->tx_chan_width = ATH9K_HT_MACMODE_2040;
807 else
808 ht_info->tx_chan_width = ATH9K_HT_MACMODE_20;
809
810 ath9k_hw_set11nmac2040(sc->sc_ah, ht_info->tx_chan_width);
811 ht_info->maxampdu = 1 << (IEEE80211_HTCAP_MAXRXAMPDU_FACTOR +
812 bss_conf->ht_conf->ampdu_factor);
813 ht_info->mpdudensity =
814 parse_mpdudensity(bss_conf->ht_conf->ampdu_density);
815
816 }
817
818#undef IEEE80211_HT_CAP_40MHZ_INTOLERANT
819}
820
821static void ath9k_bss_assoc_info(struct ath_softc *sc,
822 struct ieee80211_bss_conf *bss_conf)
823{
824 struct ieee80211_hw *hw = sc->hw;
825 struct ieee80211_channel *curchan = hw->conf.channel;
826 struct ath_vap *avp;
827 int pos;
828 DECLARE_MAC_BUF(mac);
829
830 if (bss_conf->assoc) {
831 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Bss Info ASSOC %d\n",
832 __func__,
833 bss_conf->aid);
834
835 avp = sc->sc_vaps[0];
836 if (avp == NULL) {
837 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
838 __func__);
839 return;
840 }
841
842 /* New association, store aid */
843 if (avp->av_opmode == ATH9K_M_STA) {
844 sc->sc_curaid = bss_conf->aid;
845 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
846 sc->sc_curaid);
847 }
848
849 /* Configure the beacon */
850 ath_beacon_config(sc, 0);
Sujith672840a2008-08-11 14:05:08 +0530851 sc->sc_flags |= SC_OP_BEACONS;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700852
853 /* Reset rssi stats */
854 sc->sc_halstats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER;
855 sc->sc_halstats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER;
856 sc->sc_halstats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER;
857 sc->sc_halstats.ns_avgtxrate = ATH_RATE_DUMMY_MARKER;
858
859 /* Update chainmask */
860 ath_update_chainmask(sc, bss_conf->assoc_ht);
861
862 DPRINTF(sc, ATH_DBG_CONFIG,
863 "%s: bssid %s aid 0x%x\n",
864 __func__,
865 print_mac(mac, sc->sc_curbssid), sc->sc_curaid);
866
867 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
868 __func__,
869 curchan->center_freq);
870
871 pos = ath_get_channel(sc, curchan);
872 if (pos == -1) {
873 DPRINTF(sc, ATH_DBG_FATAL,
874 "%s: Invalid channel\n", __func__);
875 return;
876 }
877
878 if (hw->conf.ht_conf.ht_supported)
879 sc->sc_ah->ah_channels[pos].chanmode =
880 ath_get_extchanmode(sc, curchan);
881 else
882 sc->sc_ah->ah_channels[pos].chanmode =
883 (curchan->band == IEEE80211_BAND_2GHZ) ?
884 CHANNEL_G : CHANNEL_A;
885
886 /* set h/w channel */
887 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
888 DPRINTF(sc, ATH_DBG_FATAL,
889 "%s: Unable to set channel\n",
890 __func__);
891
892 ath_rate_newstate(sc, avp);
893 /* Update ratectrl about the new state */
894 ath_rc_node_update(hw, avp->rc_node);
895 } else {
896 DPRINTF(sc, ATH_DBG_CONFIG,
897 "%s: Bss Info DISSOC\n", __func__);
898 sc->sc_curaid = 0;
899 }
900}
901
902static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
903 struct ieee80211_vif *vif,
904 struct ieee80211_bss_conf *bss_conf,
905 u32 changed)
906{
907 struct ath_softc *sc = hw->priv;
908
909 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
910 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed PREAMBLE %d\n",
911 __func__,
912 bss_conf->use_short_preamble);
913 if (bss_conf->use_short_preamble)
Sujith672840a2008-08-11 14:05:08 +0530914 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700915 else
Sujith672840a2008-08-11 14:05:08 +0530916 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700917 }
918
919 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
920 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed CTS PROT %d\n",
921 __func__,
922 bss_conf->use_cts_prot);
923 if (bss_conf->use_cts_prot &&
924 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
Sujith672840a2008-08-11 14:05:08 +0530925 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700926 else
Sujith672840a2008-08-11 14:05:08 +0530927 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700928 }
929
930 if (changed & BSS_CHANGED_HT) {
931 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed HT %d\n",
932 __func__,
933 bss_conf->assoc_ht);
934 ath9k_ht_conf(sc, bss_conf);
935 }
936
937 if (changed & BSS_CHANGED_ASSOC) {
938 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed ASSOC %d\n",
939 __func__,
940 bss_conf->assoc);
941 ath9k_bss_assoc_info(sc, bss_conf);
942 }
943}
944
945static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
946{
947 u64 tsf;
948 struct ath_softc *sc = hw->priv;
949 struct ath_hal *ah = sc->sc_ah;
950
951 tsf = ath9k_hw_gettsf64(ah);
952
953 return tsf;
954}
955
956static void ath9k_reset_tsf(struct ieee80211_hw *hw)
957{
958 struct ath_softc *sc = hw->priv;
959 struct ath_hal *ah = sc->sc_ah;
960
961 ath9k_hw_reset_tsf(ah);
962}
963
964static int ath9k_ampdu_action(struct ieee80211_hw *hw,
965 enum ieee80211_ampdu_mlme_action action,
966 const u8 *addr,
967 u16 tid,
968 u16 *ssn)
969{
970 struct ath_softc *sc = hw->priv;
971 int ret = 0;
972
973 switch (action) {
974 case IEEE80211_AMPDU_RX_START:
975 ret = ath_rx_aggr_start(sc, addr, tid, ssn);
976 if (ret < 0)
977 DPRINTF(sc, ATH_DBG_FATAL,
978 "%s: Unable to start RX aggregation\n",
979 __func__);
980 break;
981 case IEEE80211_AMPDU_RX_STOP:
982 ret = ath_rx_aggr_stop(sc, addr, tid);
983 if (ret < 0)
984 DPRINTF(sc, ATH_DBG_FATAL,
985 "%s: Unable to stop RX aggregation\n",
986 __func__);
987 break;
988 case IEEE80211_AMPDU_TX_START:
989 ret = ath_tx_aggr_start(sc, addr, tid, ssn);
990 if (ret < 0)
991 DPRINTF(sc, ATH_DBG_FATAL,
992 "%s: Unable to start TX aggregation\n",
993 __func__);
994 else
995 ieee80211_start_tx_ba_cb_irqsafe(hw, (u8 *)addr, tid);
996 break;
997 case IEEE80211_AMPDU_TX_STOP:
998 ret = ath_tx_aggr_stop(sc, addr, tid);
999 if (ret < 0)
1000 DPRINTF(sc, ATH_DBG_FATAL,
1001 "%s: Unable to stop TX aggregation\n",
1002 __func__);
1003
1004 ieee80211_stop_tx_ba_cb_irqsafe(hw, (u8 *)addr, tid);
1005 break;
1006 default:
1007 DPRINTF(sc, ATH_DBG_FATAL,
1008 "%s: Unknown AMPDU action\n", __func__);
1009 }
1010
1011 return ret;
1012}
1013
1014static struct ieee80211_ops ath9k_ops = {
1015 .tx = ath9k_tx,
1016 .start = ath9k_start,
1017 .stop = ath9k_stop,
1018 .add_interface = ath9k_add_interface,
1019 .remove_interface = ath9k_remove_interface,
1020 .config = ath9k_config,
1021 .config_interface = ath9k_config_interface,
1022 .configure_filter = ath9k_configure_filter,
1023 .get_stats = NULL,
1024 .sta_notify = ath9k_sta_notify,
1025 .conf_tx = ath9k_conf_tx,
1026 .get_tx_stats = NULL,
1027 .bss_info_changed = ath9k_bss_info_changed,
1028 .set_tim = NULL,
1029 .set_key = ath9k_set_key,
1030 .hw_scan = NULL,
1031 .get_tkip_seq = NULL,
1032 .set_rts_threshold = NULL,
1033 .set_frag_threshold = NULL,
1034 .set_retry_limit = NULL,
1035 .get_tsf = ath9k_get_tsf,
1036 .reset_tsf = ath9k_reset_tsf,
1037 .tx_last_beacon = NULL,
1038 .ampdu_action = ath9k_ampdu_action
1039};
1040
1041void ath_get_beaconconfig(struct ath_softc *sc,
1042 int if_id,
1043 struct ath_beacon_config *conf)
1044{
1045 struct ieee80211_hw *hw = sc->hw;
1046
1047 /* fill in beacon config data */
1048
1049 conf->beacon_interval = hw->conf.beacon_int;
1050 conf->listen_interval = 100;
1051 conf->dtim_count = 1;
1052 conf->bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf->listen_interval;
1053}
1054
1055int ath_update_beacon(struct ath_softc *sc,
1056 int if_id,
1057 struct ath_beacon_offset *bo,
1058 struct sk_buff *skb,
1059 int mcast)
1060{
1061 return 0;
1062}
1063
1064void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
1065 struct ath_xmit_status *tx_status, struct ath_node *an)
1066{
1067 struct ieee80211_hw *hw = sc->hw;
1068 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
1069
1070 DPRINTF(sc, ATH_DBG_XMIT,
1071 "%s: TX complete: skb: %p\n", __func__, skb);
1072
1073 if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK ||
1074 tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) {
1075 /* free driver's private data area of tx_info */
1076 if (tx_info->driver_data[0] != NULL)
1077 kfree(tx_info->driver_data[0]);
1078 tx_info->driver_data[0] = NULL;
1079 }
1080
1081 if (tx_status->flags & ATH_TX_BAR) {
1082 tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
1083 tx_status->flags &= ~ATH_TX_BAR;
1084 }
1085 if (tx_status->flags)
1086 tx_info->status.excessive_retries = 1;
1087
1088 tx_info->status.retry_count = tx_status->retries;
1089
1090 ieee80211_tx_status(hw, skb);
1091 if (an)
1092 ath_node_put(sc, an, ATH9K_BH_STATUS_CHANGE);
1093}
1094
1095int ath__rx_indicate(struct ath_softc *sc,
1096 struct sk_buff *skb,
1097 struct ath_recv_status *status,
1098 u16 keyix)
1099{
1100 struct ieee80211_hw *hw = sc->hw;
1101 struct ath_node *an = NULL;
1102 struct ieee80211_rx_status rx_status;
1103 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1104 int hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1105 int padsize;
1106 enum ATH_RX_TYPE st;
1107
1108 /* see if any padding is done by the hw and remove it */
1109 if (hdrlen & 3) {
1110 padsize = hdrlen % 4;
1111 memmove(skb->data + padsize, skb->data, hdrlen);
1112 skb_pull(skb, padsize);
1113 }
1114
1115 /* remove FCS before passing up to protocol stack */
1116 skb_trim(skb, (skb->len - FCS_LEN));
1117
1118 /* Prepare rx status */
1119 ath9k_rx_prepare(sc, skb, status, &rx_status);
1120
1121 if (!(keyix == ATH9K_RXKEYIX_INVALID) &&
1122 !(status->flags & ATH_RX_DECRYPT_ERROR)) {
1123 rx_status.flag |= RX_FLAG_DECRYPTED;
1124 } else if ((le16_to_cpu(hdr->frame_control) & IEEE80211_FCTL_PROTECTED)
1125 && !(status->flags & ATH_RX_DECRYPT_ERROR)
1126 && skb->len >= hdrlen + 4) {
1127 keyix = skb->data[hdrlen + 3] >> 6;
1128
1129 if (test_bit(keyix, sc->sc_keymap))
1130 rx_status.flag |= RX_FLAG_DECRYPTED;
1131 }
1132
1133 spin_lock_bh(&sc->node_lock);
1134 an = ath_node_find(sc, hdr->addr2);
1135 spin_unlock_bh(&sc->node_lock);
1136
1137 if (an) {
1138 ath_rx_input(sc, an,
1139 hw->conf.ht_conf.ht_supported,
1140 skb, status, &st);
1141 }
1142 if (!an || (st != ATH_RX_CONSUMED))
1143 __ieee80211_rx(hw, skb, &rx_status);
1144
1145 return 0;
1146}
1147
1148int ath_rx_subframe(struct ath_node *an,
1149 struct sk_buff *skb,
1150 struct ath_recv_status *status)
1151{
1152 struct ath_softc *sc = an->an_sc;
1153 struct ieee80211_hw *hw = sc->hw;
1154 struct ieee80211_rx_status rx_status;
1155
1156 /* Prepare rx status */
1157 ath9k_rx_prepare(sc, skb, status, &rx_status);
1158 if (!(status->flags & ATH_RX_DECRYPT_ERROR))
1159 rx_status.flag |= RX_FLAG_DECRYPTED;
1160
1161 __ieee80211_rx(hw, skb, &rx_status);
1162
1163 return 0;
1164}
1165
1166enum ath9k_ht_macmode ath_cwm_macmode(struct ath_softc *sc)
1167{
1168 return sc->sc_ht_info.tx_chan_width;
1169}
1170
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001171static int ath_detach(struct ath_softc *sc)
1172{
1173 struct ieee80211_hw *hw = sc->hw;
1174
1175 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach ATH hw\n", __func__);
1176
1177 /* Unregister hw */
1178
1179 ieee80211_unregister_hw(hw);
1180
1181 /* unregister Rate control */
1182 ath_rate_control_unregister();
1183
1184 /* tx/rx cleanup */
1185
1186 ath_rx_cleanup(sc);
1187 ath_tx_cleanup(sc);
1188
1189 /* Deinit */
1190
1191 ath_deinit(sc);
1192
1193 return 0;
1194}
1195
1196static int ath_attach(u16 devid,
1197 struct ath_softc *sc)
1198{
1199 struct ieee80211_hw *hw = sc->hw;
1200 int error = 0;
1201
1202 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach ATH hw\n", __func__);
1203
1204 error = ath_init(devid, sc);
1205 if (error != 0)
1206 return error;
1207
1208 /* Init nodes */
1209
1210 INIT_LIST_HEAD(&sc->node_list);
1211 spin_lock_init(&sc->node_lock);
1212
1213 /* get mac address from hardware and set in mac80211 */
1214
1215 SET_IEEE80211_PERM_ADDR(hw, sc->sc_myaddr);
1216
1217 /* setup channels and rates */
1218
1219 sc->sbands[IEEE80211_BAND_2GHZ].channels =
1220 sc->channels[IEEE80211_BAND_2GHZ];
1221 sc->sbands[IEEE80211_BAND_2GHZ].bitrates =
1222 sc->rates[IEEE80211_BAND_2GHZ];
1223 sc->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
1224
Sujith60b67f52008-08-07 10:52:38 +05301225 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001226 /* Setup HT capabilities for 2.4Ghz*/
1227 setup_ht_cap(&sc->sbands[IEEE80211_BAND_2GHZ].ht_info);
1228
1229 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
1230 &sc->sbands[IEEE80211_BAND_2GHZ];
1231
Sujith86b89ee2008-08-07 10:54:57 +05301232 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes)) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001233 sc->sbands[IEEE80211_BAND_5GHZ].channels =
1234 sc->channels[IEEE80211_BAND_5GHZ];
1235 sc->sbands[IEEE80211_BAND_5GHZ].bitrates =
1236 sc->rates[IEEE80211_BAND_5GHZ];
1237 sc->sbands[IEEE80211_BAND_5GHZ].band =
1238 IEEE80211_BAND_5GHZ;
1239
Sujith60b67f52008-08-07 10:52:38 +05301240 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001241 /* Setup HT capabilities for 5Ghz*/
1242 setup_ht_cap(&sc->sbands[IEEE80211_BAND_5GHZ].ht_info);
1243
1244 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
1245 &sc->sbands[IEEE80211_BAND_5GHZ];
1246 }
1247
1248 /* FIXME: Have to figure out proper hw init values later */
1249
1250 hw->queues = 4;
1251 hw->ampdu_queues = 1;
1252
1253 /* Register rate control */
1254 hw->rate_control_algorithm = "ath9k_rate_control";
1255 error = ath_rate_control_register();
1256 if (error != 0) {
1257 DPRINTF(sc, ATH_DBG_FATAL,
1258 "%s: Unable to register rate control "
1259 "algorithm:%d\n", __func__, error);
1260 ath_rate_control_unregister();
1261 goto bad;
1262 }
1263
1264 error = ieee80211_register_hw(hw);
1265 if (error != 0) {
1266 ath_rate_control_unregister();
1267 goto bad;
1268 }
1269
1270 /* initialize tx/rx engine */
1271
1272 error = ath_tx_init(sc, ATH_TXBUF);
1273 if (error != 0)
1274 goto bad1;
1275
1276 error = ath_rx_init(sc, ATH_RXBUF);
1277 if (error != 0)
1278 goto bad1;
1279
1280 return 0;
1281bad1:
1282 ath_detach(sc);
1283bad:
1284 return error;
1285}
1286
1287static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1288{
1289 void __iomem *mem;
1290 struct ath_softc *sc;
1291 struct ieee80211_hw *hw;
1292 const char *athname;
1293 u8 csz;
1294 u32 val;
1295 int ret = 0;
1296
1297 if (pci_enable_device(pdev))
1298 return -EIO;
1299
1300 /* XXX 32-bit addressing only */
1301 if (pci_set_dma_mask(pdev, 0xffffffff)) {
1302 printk(KERN_ERR "ath_pci: 32-bit DMA not available\n");
1303 ret = -ENODEV;
1304 goto bad;
1305 }
1306
1307 /*
1308 * Cache line size is used to size and align various
1309 * structures used to communicate with the hardware.
1310 */
1311 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
1312 if (csz == 0) {
1313 /*
1314 * Linux 2.4.18 (at least) writes the cache line size
1315 * register as a 16-bit wide register which is wrong.
1316 * We must have this setup properly for rx buffer
1317 * DMA to work so force a reasonable value here if it
1318 * comes up zero.
1319 */
1320 csz = L1_CACHE_BYTES / sizeof(u32);
1321 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
1322 }
1323 /*
1324 * The default setting of latency timer yields poor results,
1325 * set it to the value used by other systems. It may be worth
1326 * tweaking this setting more.
1327 */
1328 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
1329
1330 pci_set_master(pdev);
1331
1332 /*
1333 * Disable the RETRY_TIMEOUT register (0x41) to keep
1334 * PCI Tx retries from interfering with C3 CPU state.
1335 */
1336 pci_read_config_dword(pdev, 0x40, &val);
1337 if ((val & 0x0000ff00) != 0)
1338 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1339
1340 ret = pci_request_region(pdev, 0, "ath9k");
1341 if (ret) {
1342 dev_err(&pdev->dev, "PCI memory region reserve error\n");
1343 ret = -ENODEV;
1344 goto bad;
1345 }
1346
1347 mem = pci_iomap(pdev, 0, 0);
1348 if (!mem) {
1349 printk(KERN_ERR "PCI memory map error\n") ;
1350 ret = -EIO;
1351 goto bad1;
1352 }
1353
1354 hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
1355 if (hw == NULL) {
1356 printk(KERN_ERR "ath_pci: no memory for ieee80211_hw\n");
1357 goto bad2;
1358 }
1359
1360 hw->flags = IEEE80211_HW_SIGNAL_DBM |
1361 IEEE80211_HW_NOISE_DBM;
1362
1363 SET_IEEE80211_DEV(hw, &pdev->dev);
1364 pci_set_drvdata(pdev, hw);
1365
1366 sc = hw->priv;
1367 sc->hw = hw;
1368 sc->pdev = pdev;
1369 sc->mem = mem;
1370
1371 if (ath_attach(id->device, sc) != 0) {
1372 ret = -ENODEV;
1373 goto bad3;
1374 }
1375
1376 /* setup interrupt service routine */
1377
1378 if (request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath", sc)) {
1379 printk(KERN_ERR "%s: request_irq failed\n",
1380 wiphy_name(hw->wiphy));
1381 ret = -EIO;
1382 goto bad4;
1383 }
1384
1385 athname = ath9k_hw_probe(id->vendor, id->device);
1386
1387 printk(KERN_INFO "%s: %s: mem=0x%lx, irq=%d\n",
1388 wiphy_name(hw->wiphy),
1389 athname ? athname : "Atheros ???",
1390 (unsigned long)mem, pdev->irq);
1391
1392 return 0;
1393bad4:
1394 ath_detach(sc);
1395bad3:
1396 ieee80211_free_hw(hw);
1397bad2:
1398 pci_iounmap(pdev, mem);
1399bad1:
1400 pci_release_region(pdev, 0);
1401bad:
1402 pci_disable_device(pdev);
1403 return ret;
1404}
1405
1406static void ath_pci_remove(struct pci_dev *pdev)
1407{
1408 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1409 struct ath_softc *sc = hw->priv;
1410
1411 if (pdev->irq)
1412 free_irq(pdev->irq, sc);
1413 ath_detach(sc);
1414 pci_iounmap(pdev, sc->mem);
1415 pci_release_region(pdev, 0);
1416 pci_disable_device(pdev);
1417 ieee80211_free_hw(hw);
1418}
1419
1420#ifdef CONFIG_PM
1421
1422static int ath_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1423{
1424 pci_save_state(pdev);
1425 pci_disable_device(pdev);
1426 pci_set_power_state(pdev, 3);
1427
1428 return 0;
1429}
1430
1431static int ath_pci_resume(struct pci_dev *pdev)
1432{
1433 u32 val;
1434 int err;
1435
1436 err = pci_enable_device(pdev);
1437 if (err)
1438 return err;
1439 pci_restore_state(pdev);
1440 /*
1441 * Suspend/Resume resets the PCI configuration space, so we have to
1442 * re-disable the RETRY_TIMEOUT register (0x41) to keep
1443 * PCI Tx retries from interfering with C3 CPU state
1444 */
1445 pci_read_config_dword(pdev, 0x40, &val);
1446 if ((val & 0x0000ff00) != 0)
1447 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1448
1449 return 0;
1450}
1451
1452#endif /* CONFIG_PM */
1453
1454MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
1455
1456static struct pci_driver ath_pci_driver = {
1457 .name = "ath9k",
1458 .id_table = ath_pci_id_table,
1459 .probe = ath_pci_probe,
1460 .remove = ath_pci_remove,
1461#ifdef CONFIG_PM
1462 .suspend = ath_pci_suspend,
1463 .resume = ath_pci_resume,
1464#endif /* CONFIG_PM */
1465};
1466
1467static int __init init_ath_pci(void)
1468{
1469 printk(KERN_INFO "%s: %s\n", dev_info, ATH_PCI_VERSION);
1470
1471 if (pci_register_driver(&ath_pci_driver) < 0) {
1472 printk(KERN_ERR
1473 "ath_pci: No devices found, driver not installed.\n");
1474 pci_unregister_driver(&ath_pci_driver);
1475 return -ENODEV;
1476 }
1477
1478 return 0;
1479}
1480module_init(init_ath_pci);
1481
1482static void __exit exit_ath_pci(void)
1483{
1484 pci_unregister_driver(&ath_pci_driver);
1485 printk(KERN_INFO "%s: driver unloaded\n", dev_info);
1486}
1487module_exit(exit_ath_pci);