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Dmitry Lifshitz387450f2015-12-01 20:03:03 +02001/*
2 * Support for CompuLab CL-SOM-AM57x System-on-Module
3 *
4 * Copyright (C) 2015 CompuLab Ltd. - http://www.compulab.co.il/
5 * Author: Dmitry Lifshitz <lifshitz@compulab.co.il>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11
12/dts-v1/;
13
14#include <dt-bindings/gpio/gpio.h>
15#include <dt-bindings/interrupt-controller/irq.h>
16#include "dra74x.dtsi"
17
18/ {
19 model = "CompuLab CL-SOM-AM57x";
20 compatible = "compulab,cl-som-am57x", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7";
21
22 memory {
23 device_type = "memory";
24 reg = <0x80000000 0x20000000>; /* 512 MB - minimal configuration */
25 };
26
27 leds {
28 compatible = "gpio-leds";
29 pinctrl-names = "default";
30 pinctrl-0 = <&leds_pins_default>;
31
32 led@0 {
33 label = "cl-som-am57x:green";
34 gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
35 linux,default-trigger = "heartbeat";
36 default-state = "off";
37 };
38 };
Dmitry Lifshitz8deb60f2015-12-01 20:03:07 +020039
40 vdd_3v3: fixedregulator-vdd_3v3 {
41 compatible = "regulator-fixed";
42 regulator-name = "vdd_3v3";
43 regulator-min-microvolt = <3300000>;
44 regulator-max-microvolt = <3300000>;
45 };
Dmitry Lifshitz2d47fc32015-12-01 20:03:11 +020046
47 ads7846reg: fixedregulator-ads7846-reg {
48 compatible = "regulator-fixed";
49 regulator-name = "ads7846-reg";
50 regulator-min-microvolt = <3300000>;
51 regulator-max-microvolt = <3300000>;
52 };
Dmitry Lifshitz387450f2015-12-01 20:03:03 +020053};
54
55&dra7_pmx_core {
56 leds_pins_default: leds_pins_default {
57 pinctrl-single,pins = <
58 DRA7XX_CORE_IOPAD(0x347c, PIN_OUTPUT | MUX_MODE14) /* gpmc_a15.gpio2_5 */
59 >;
60 };
61
62 i2c1_pins_default: i2c1_pins_default {
63 pinctrl-single,pins = <
64 DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda.sda */
65 DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl.scl */
66 >;
67 };
68
Dmitry Lifshitz5691b612015-12-01 20:03:05 +020069 i2c3_pins_default: i2c3_pins_default {
70 pinctrl-single,pins = <
71 DRA7XX_CORE_IOPAD(0x36a4, PIN_INPUT| MUX_MODE10) /* mcasp1_aclkx.i2c3_sda */
72 DRA7XX_CORE_IOPAD(0x36a8, PIN_INPUT| MUX_MODE10) /* mcasp1_fsx.i2c3_scl */
73 >;
74 };
75
Dmitry Lifshitz387450f2015-12-01 20:03:03 +020076 i2c4_pins_default: i2c4_pins_default {
77 pinctrl-single,pins = <
78 DRA7XX_CORE_IOPAD(0x36ac, PIN_INPUT| MUX_MODE10) /* mcasp1_acl.i2c4_sda */
79 DRA7XX_CORE_IOPAD(0x36b0, PIN_INPUT| MUX_MODE10) /* mcasp1_fsr.i2c4_scl */
80 >;
81 };
82
83 tps659038_pins_default: tps659038_pins_default {
84 pinctrl-single,pins = <
85 DRA7XX_CORE_IOPAD(0x3818, PIN_INPUT_PULLUP | MUX_MODE14) /* wakeup0.gpio1_0 */
86 >;
87 };
Dmitry Lifshitz8deb60f2015-12-01 20:03:07 +020088
89 mmc2_pins_default: mmc2_pins_default {
90 pinctrl-single,pins = <
91 DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
92 DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
93 DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
94 DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
95 DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
96 DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
97 DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
98 DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
99 DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
100 DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
101 >;
102 };
Dmitry Lifshitzcc2d6812015-12-01 20:03:08 +0200103
104 qspi1_pins: pinmux_qspi1_pins {
105 pinctrl-single,pins = <
106 DRA7XX_CORE_IOPAD(0x3474, PIN_INPUT | MUX_MODE1) /* gpmc_a13.qspi1_rtclk */
107 DRA7XX_CORE_IOPAD(0x3480, PIN_INPUT | MUX_MODE1) /* gpmc_a16.qspi1_d0 */
108 DRA7XX_CORE_IOPAD(0x3484, PIN_INPUT | MUX_MODE1) /* gpmc_a17.qspi1_d1 */
109 DRA7XX_CORE_IOPAD(0x3488, PIN_INPUT | MUX_MODE1) /* qpmc_a18.qspi1_sclk */
110 DRA7XX_CORE_IOPAD(0x34b8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs2.qspi1_cs0 */
111 DRA7XX_CORE_IOPAD(0x34bc, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs3.qspi1_cs1 */
112 >;
113 };
Dmitry Lifshitz12ca4682015-12-01 20:03:09 +0200114
115 cpsw_pins_default: cpsw_pins_default {
116 pinctrl-single,pins = <
117 /* Slave at addr 0x0 */
118 DRA7XX_CORE_IOPAD(0x3650, PIN_OUTPUT | MUX_MODE0) /* rgmii0_tclk */
119 DRA7XX_CORE_IOPAD(0x3654, PIN_OUTPUT | MUX_MODE0) /* rgmii0_tctl */
120 DRA7XX_CORE_IOPAD(0x3658, PIN_OUTPUT | MUX_MODE0) /* rgmii0_td3 */
121 DRA7XX_CORE_IOPAD(0x365c, PIN_OUTPUT | MUX_MODE0) /* rgmii0_td2 */
122 DRA7XX_CORE_IOPAD(0x3660, PIN_OUTPUT | MUX_MODE0) /* rgmii0_td1 */
123 DRA7XX_CORE_IOPAD(0x3664, PIN_OUTPUT | MUX_MODE0) /* rgmii0_td0 */
124 DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rclk */
125 DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rctl */
126 DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd3 */
127 DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd2 */
128 DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd1 */
129 DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd0 */
130
131 /* Slave at addr 0x1 */
132 DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT | MUX_MODE3) /* vin2a_d12.rgmii1_tclk */
133 DRA7XX_CORE_IOPAD(0x359c, PIN_OUTPUT | MUX_MODE3) /* vin2a_d13.rgmii1_tctl */
134 DRA7XX_CORE_IOPAD(0x35a0, PIN_OUTPUT | MUX_MODE3) /* vin2a_d14.rgmii1_td3 */
135 DRA7XX_CORE_IOPAD(0x35a4, PIN_OUTPUT | MUX_MODE3) /* vin2a_d15.rgmii1_td2 */
136 DRA7XX_CORE_IOPAD(0x35a8, PIN_OUTPUT | MUX_MODE3) /* vin2a_d16.rgmii1_td1 */
137 DRA7XX_CORE_IOPAD(0x35ac, PIN_OUTPUT | MUX_MODE3) /* vin2a_d17.rgmii1_td0 */
138 DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d18.rgmii1_rclk */
139 DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d19.rgmii1_rctl */
140 DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d20.rgmii1_rd3 */
141 DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d21.rgmii1_rd2 */
142 DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d22.rgmii1_rd1 */
143 DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT_PULLUP | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */
144 >;
145 };
146
147 cpsw_pins_sleep: cpsw_pins_sleep {
148 pinctrl-single,pins = <
149 /* Slave 1 */
150 DRA7XX_CORE_IOPAD(0x3650, PIN_INPUT | MUX_MODE15)
151 DRA7XX_CORE_IOPAD(0x3654, PIN_INPUT | MUX_MODE15)
152 DRA7XX_CORE_IOPAD(0x3658, PIN_INPUT | MUX_MODE15)
153 DRA7XX_CORE_IOPAD(0x365c, PIN_INPUT | MUX_MODE15)
154 DRA7XX_CORE_IOPAD(0x3660, PIN_INPUT | MUX_MODE15)
155 DRA7XX_CORE_IOPAD(0x3664, PIN_INPUT | MUX_MODE15)
156 DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE15)
157 DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE15)
158 DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE15)
159 DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE15)
160 DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE15)
161 DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE15)
162
163 /* Slave 2 */
164 DRA7XX_CORE_IOPAD(0x3598, PIN_INPUT | MUX_MODE15)
165 DRA7XX_CORE_IOPAD(0x359c, PIN_INPUT | MUX_MODE15)
166 DRA7XX_CORE_IOPAD(0x35a0, PIN_INPUT | MUX_MODE15)
167 DRA7XX_CORE_IOPAD(0x35a4, PIN_INPUT | MUX_MODE15)
168 DRA7XX_CORE_IOPAD(0x35a8, PIN_INPUT | MUX_MODE15)
169 DRA7XX_CORE_IOPAD(0x35ac, PIN_INPUT | MUX_MODE15)
170 DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE15)
171 DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE15)
172 DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE15)
173 DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE15)
174 DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE15)
175 DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE15)
176 >;
177 };
178
179 davinci_mdio_pins_default: davinci_mdio_pins_default {
180 pinctrl-single,pins = <
181 /* MDIO */
182 DRA7XX_CORE_IOPAD(0x3590, PIN_OUTPUT_PULLUP | MUX_MODE3)/* vin2a_d10.mdio_mclk */
183 DRA7XX_CORE_IOPAD(0x3594, PIN_INPUT_PULLUP | MUX_MODE3) /* vin2a_d11.mdio_d */
184 >;
185 };
186
187 davinci_mdio_pins_sleep: davinci_mdio_pins_sleep {
188 pinctrl-single,pins = <
189 DRA7XX_CORE_IOPAD(0x3590, PIN_INPUT | MUX_MODE15)
190 DRA7XX_CORE_IOPAD(0x3594, PIN_INPUT | MUX_MODE15)
191 >;
192 };
Dmitry Lifshitz2d47fc32015-12-01 20:03:11 +0200193
194 ads7846_pins: pinmux_ads7846_pins {
195 pinctrl-single,pins = <
196 DRA7XX_CORE_IOPAD(0x3464, PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpmc_a9.gpio1_31 */
197 >;
198 };
Dmitry Lifshitz387450f2015-12-01 20:03:03 +0200199};
200
201&i2c1 {
202 status = "okay";
203 pinctrl-names = "default";
204 pinctrl-0 = <&i2c1_pins_default>;
205 clock-frequency = <400000>;
206};
207
Dmitry Lifshitz5691b612015-12-01 20:03:05 +0200208&i2c3 {
209 status = "okay";
210 pinctrl-names = "default";
211 pinctrl-0 = <&i2c3_pins_default>;
212 clock-frequency = <400000>;
213};
214
Dmitry Lifshitz387450f2015-12-01 20:03:03 +0200215&i2c4 {
216 status = "okay";
217 pinctrl-names = "default";
218 pinctrl-0 = <&i2c4_pins_default>;
219 clock-frequency = <400000>;
220
221 tps659038: tps659038@58 {
222 compatible = "ti,tps659038";
223 reg = <0x58>;
224 interrupt-parent = <&gpio1>;
225 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
226
227 pinctrl-names = "default";
228 pinctrl-0 = <&tps659038_pins_default>;
229
230 #interrupt-cells = <2>;
231 interrupt-controller;
232
233 ti,system-power-controller;
234
235 tps659038_pmic {
236 compatible = "ti,tps659038-pmic";
237
238 regulators {
239 smps12_reg: smps12 {
240 /* VDD_MPU */
241 regulator-name = "smps12";
242 regulator-min-microvolt = < 850000>;
243 regulator-max-microvolt = <1250000>;
244 regulator-always-on;
245 regulator-boot-on;
246 };
247
248 smps3_reg: smps3 {
249 /* VDD_DDR */
250 regulator-name = "smps3";
251 regulator-min-microvolt = <1500000>;
252 regulator-max-microvolt = <1500000>;
253 regulator-always-on;
254 regulator-boot-on;
255 };
256
257 smps45_reg: smps45 {
258 /* VDD_DSPEVE */
259 regulator-name = "smps45";
260 regulator-min-microvolt = < 850000>;
261 regulator-max-microvolt = <1250000>;
262 regulator-always-on;
263 regulator-boot-on;
264 };
265
266 smps6_reg: smps6 {
267 /* VDD_GPU */
268 regulator-name = "smps6";
269 regulator-min-microvolt = < 850000>;
270 regulator-max-microvolt = <1250000>;
271 regulator-always-on;
272 regulator-boot-on;
273 };
274
275 smps7_reg: smps7 {
276 /* VDD_CORE */
277 regulator-name = "smps7";
278 regulator-min-microvolt = < 850000>;
279 regulator-max-microvolt = <1160000>;
280 regulator-always-on;
281 regulator-boot-on;
282 };
283
284 smps8_reg: smps8 {
285 /* VDD_IVA */
286 regulator-name = "smps8";
287 regulator-min-microvolt = < 850000>;
288 regulator-max-microvolt = <1250000>;
289 regulator-always-on;
290 regulator-boot-on;
291 };
292
293 smps9_reg: smps9 {
294 /* PMIC_3V3 */
295 regulator-name = "smps9";
296 regulator-min-microvolt = <3300000>;
297 regulator-max-microvolt = <3300000>;
298 regulator-always-on;
299 regulator-boot-on;
300 };
301
302
303 ldo1_reg: ldo1 {
304 /* VDD_SD / VDDSHV8 */
305 regulator-name = "ldo1";
306 regulator-min-microvolt = <1800000>;
307 regulator-max-microvolt = <3300000>;
308 regulator-boot-on;
309 regulator-always-on;
310 };
311
312 ldo2_reg: ldo2 {
313 /* VDD_1V8 */
314 regulator-name = "ldo2";
315 regulator-min-microvolt = <1800000>;
316 regulator-max-microvolt = <1800000>;
317 regulator-always-on;
318 regulator-boot-on;
319 };
320
321 ldo3_reg: ldo3 {
322 /* VDDA_1V8_PHYA - supplies VDDA_SATA, VDDA_USB1/2/3 */
323 regulator-name = "ldo3";
324 regulator-min-microvolt = <1800000>;
325 regulator-max-microvolt = <1800000>;
326 regulator-always-on;
327 regulator-boot-on;
328 };
329
330 ldo4_reg: ldo4 {
331 /* VDDA_1V8_PHYB - supplies VDDA_HDMI, VDDA_PCIE/0/1 */
332 regulator-name = "ldo4";
333 regulator-min-microvolt = <1800000>;
334 regulator-max-microvolt = <1800000>;
335 regulator-always-on;
336 regulator-boot-on;
337 };
338
339 ldo9_reg: ldo9 {
340 /* VDD_RTC */
341 regulator-name = "ldo9";
342 regulator-min-microvolt = <1050000>;
343 regulator-max-microvolt = <1050000>;
344 regulator-always-on;
345 regulator-boot-on;
346 };
347
348 ldoln_reg: ldoln {
349 /* VDDA_1V8_PLL */
350 regulator-name = "ldoln";
351 regulator-min-microvolt = <1800000>;
352 regulator-max-microvolt = <1800000>;
353 regulator-always-on;
354 regulator-boot-on;
355 };
356
357 ldousb_reg: ldousb {
358 /* VDDA_3V_USB: VDDA_USBHS33 */
359 regulator-name = "ldousb";
360 regulator-min-microvolt = <3300000>;
361 regulator-max-microvolt = <3300000>;
362 regulator-always-on;
363 regulator-boot-on;
364 };
365
366 /* regen1 not used */
367 };
368 };
369
370 tps659038_pwr_button: tps659038_pwr_button {
371 compatible = "ti,palmas-pwrbutton";
372 interrupt-parent = <&tps659038>;
373 interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
374 wakeup-source;
375 ti,palmas-long-press-seconds = <12>;
376 };
377
378 tps659038_gpio: tps659038_gpio {
379 compatible = "ti,palmas-gpio";
380 gpio-controller;
381 #gpio-cells = <2>;
382 };
383 };
Dmitry Lifshitz1a472e12015-12-01 20:03:04 +0200384
385 rtc0: rtc@56 {
386 compatible = "emmicro,em3027";
387 reg = <0x56>;
388 };
Dmitry Lifshitz2c7cf1f2015-12-01 20:03:06 +0200389
390 eeprom_module: atmel@50 {
391 compatible = "atmel,24c08";
392 reg = <0x50>;
393 pagesize = <16>;
394 };
Dmitry Lifshitz387450f2015-12-01 20:03:03 +0200395};
396
397&cpu0 {
398 cpu0-supply = <&smps12_reg>;
399 voltage-tolerance = <1>;
400};
401
402&sata {
403 status = "okay";
404};
405
406&mailbox5 {
407 status = "okay";
408 mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
409 status = "okay";
410 };
411 mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
412 status = "okay";
413 };
414};
415
416&mailbox6 {
417 status = "okay";
418 mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
419 status = "okay";
420 };
421 mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
422 status = "okay";
423 };
424};
Dmitry Lifshitz8deb60f2015-12-01 20:03:07 +0200425
426&mmc2 {
427 status = "okay";
428
429 pinctrl-names = "default";
430 pinctrl-0 = <&mmc2_pins_default>;
431
432 vmmc-supply = <&vdd_3v3>;
433 bus-width = <8>;
434 ti,non-removable;
435 cap-mmc-dual-data-rate;
436};
Dmitry Lifshitzcc2d6812015-12-01 20:03:08 +0200437
438&qspi {
439 status = "okay";
440 pinctrl-names = "default";
441 pinctrl-0 = <&qspi1_pins>;
442
443 spi-max-frequency = <20000000>;
444
445 spi_flash: spi_flash@0 {
446 #address-cells = <1>;
447 #size-cells = <1>;
448 compatible = "spansion,m25p80", "jedec,spi-nor";
449 reg = <0>; /* CS0 */
450 spi-max-frequency = <20000000>;
451
452 partition@0 {
453 label = "uboot";
454 reg = <0x0 0xc0000>;
455 };
456
457 partition@c0000 {
458 label = "uboot environment";
459 reg = <0xc0000 0x40000>;
460 };
461
462 partition@100000 {
463 label = "reserved";
464 reg = <0x100000 0x0>;
465 };
466 };
Dmitry Lifshitz2d47fc32015-12-01 20:03:11 +0200467
468 /* touch controller */
469 ads7846@0 {
470 pinctrl-names = "default";
471 pinctrl-0 = <&ads7846_pins>;
472
473 compatible = "ti,ads7846";
474 vcc-supply = <&ads7846reg>;
475
476 reg = <1>; /* CS1 */
477 spi-max-frequency = <1500000>;
478
479 interrupt-parent = <&gpio1>;
480 interrupts = <31 0>;
481 pendown-gpio = <&gpio1 31 0>;
482
483
484 ti,x-min = /bits/ 16 <0x0>;
485 ti,x-max = /bits/ 16 <0x0fff>;
486 ti,y-min = /bits/ 16 <0x0>;
487 ti,y-max = /bits/ 16 <0x0fff>;
488
489 ti,x-plate-ohms = /bits/ 16 <180>;
490 ti,pressure-max = /bits/ 16 <255>;
491
492 ti,debounce-max = /bits/ 16 <30>;
493 ti,debounce-tol = /bits/ 16 <10>;
494 ti,debounce-rep = /bits/ 16 <1>;
495
496 linux,wakeup;
497 };
Dmitry Lifshitzcc2d6812015-12-01 20:03:08 +0200498};
Dmitry Lifshitz12ca4682015-12-01 20:03:09 +0200499
500&mac {
501 status = "okay";
502 pinctrl-names = "default", "sleep";
503 pinctrl-0 = <&cpsw_pins_default>;
504 pinctrl-1 = <&cpsw_pins_sleep>;
505 dual_emac;
506};
507
508&cpsw_emac0 {
509 phy_id = <&davinci_mdio>, <0>;
510 phy-mode = "rgmii";
511 dual_emac_res_vlan = <0>;
512};
513
514&cpsw_emac1 {
515 phy_id = <&davinci_mdio>, <1>;
516 phy-mode = "rgmii";
517 dual_emac_res_vlan = <1>;
518};
519
520&davinci_mdio {
521 pinctrl-names = "default", "sleep";
522 pinctrl-0 = <&davinci_mdio_pins_default>;
523 pinctrl-1 = <&davinci_mdio_pins_sleep>;
524};
Dmitry Lifshitz27ddd842015-12-01 20:03:10 +0200525
526&usb2_phy1 {
527 phy-supply = <&ldousb_reg>;
528};
529
530&usb2_phy2 {
531 phy-supply = <&ldousb_reg>;
532};
533
534&usb1 {
535 dr_mode = "host";
536};
537
538&usb2 {
539 dr_mode = "peripheral";
540};