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Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +02001==============
2BPF Design Q&A
3==============
4
Alexei Starovoitov2e397482017-10-30 19:39:56 -07005BPF extensibility and applicability to networking, tracing, security
6in the linux kernel and several user space implementations of BPF
7virtual machine led to a number of misunderstanding on what BPF actually is.
8This short QA is an attempt to address that and outline a direction
9of where BPF is heading long term.
10
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +020011.. contents::
12 :local:
13 :depth: 3
14
15Questions and Answers
16=====================
17
Alexei Starovoitov2e397482017-10-30 19:39:56 -070018Q: Is BPF a generic instruction set similar to x64 and arm64?
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +020019-------------------------------------------------------------
Alexei Starovoitov2e397482017-10-30 19:39:56 -070020A: NO.
21
22Q: Is BPF a generic virtual machine ?
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +020023-------------------------------------
Alexei Starovoitov2e397482017-10-30 19:39:56 -070024A: NO.
25
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +020026BPF is generic instruction set *with* C calling convention.
27-----------------------------------------------------------
Alexei Starovoitov2e397482017-10-30 19:39:56 -070028
29Q: Why C calling convention was chosen?
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +020030~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
31
Alexei Starovoitov2e397482017-10-30 19:39:56 -070032A: Because BPF programs are designed to run in the linux kernel
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +020033which is written in C, hence BPF defines instruction set compatible
34with two most used architectures x64 and arm64 (and takes into
35consideration important quirks of other architectures) and
36defines calling convention that is compatible with C calling
37convention of the linux kernel on those architectures.
Alexei Starovoitov2e397482017-10-30 19:39:56 -070038
39Q: can multiple return values be supported in the future?
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +020040~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Alexei Starovoitov2e397482017-10-30 19:39:56 -070041A: NO. BPF allows only register R0 to be used as return value.
42
43Q: can more than 5 function arguments be supported in the future?
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +020044~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Alexei Starovoitov2e397482017-10-30 19:39:56 -070045A: NO. BPF calling convention only allows registers R1-R5 to be used
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +020046as arguments. BPF is not a standalone instruction set.
47(unlike x64 ISA that allows msft, cdecl and other conventions)
Alexei Starovoitov2e397482017-10-30 19:39:56 -070048
49Q: can BPF programs access instruction pointer or return address?
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +020050-----------------------------------------------------------------
Alexei Starovoitov2e397482017-10-30 19:39:56 -070051A: NO.
52
53Q: can BPF programs access stack pointer ?
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +020054------------------------------------------
55A: NO.
56
57Only frame pointer (register R10) is accessible.
58From compiler point of view it's necessary to have stack pointer.
59For example LLVM defines register R11 as stack pointer in its
60BPF backend, but it makes sure that generated code never uses it.
Alexei Starovoitov2e397482017-10-30 19:39:56 -070061
62Q: Does C-calling convention diminishes possible use cases?
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +020063-----------------------------------------------------------
64A: YES.
65
66BPF design forces addition of major functionality in the form
67of kernel helper functions and kernel objects like BPF maps with
68seamless interoperability between them. It lets kernel call into
69BPF programs and programs call kernel helpers with zero overhead.
70As all of them were native C code. That is particularly the case
71for JITed BPF programs that are indistinguishable from
72native kernel C code.
Alexei Starovoitov2e397482017-10-30 19:39:56 -070073
74Q: Does it mean that 'innovative' extensions to BPF code are disallowed?
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +020075------------------------------------------------------------------------
76A: Soft yes.
77
78At least for now until BPF core has support for
79bpf-to-bpf calls, indirect calls, loops, global variables,
80jump tables, read only sections and all other normal constructs
81that C code can produce.
Alexei Starovoitov2e397482017-10-30 19:39:56 -070082
83Q: Can loops be supported in a safe way?
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +020084----------------------------------------
85A: It's not clear yet.
86
87BPF developers are trying to find a way to
88support bounded loops where the verifier can guarantee that
89the program terminates in less than 4096 instructions.
90
91Instruction level questions
92---------------------------
93
94Q: LD_ABS and LD_IND instructions vs C code
95~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Alexei Starovoitov2e397482017-10-30 19:39:56 -070096
97Q: How come LD_ABS and LD_IND instruction are present in BPF whereas
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +020098C code cannot express them and has to use builtin intrinsics?
Alexei Starovoitov2e397482017-10-30 19:39:56 -070099
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +0200100A: This is artifact of compatibility with classic BPF. Modern
101networking code in BPF performs better without them.
102See 'direct packet access'.
103
104Q: BPF instructions mapping not one-to-one to native CPU
105~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Alexei Starovoitov2e397482017-10-30 19:39:56 -0700106Q: It seems not all BPF instructions are one-to-one to native CPU.
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +0200107For example why BPF_JNE and other compare and jumps are not cpu-like?
108
Alexei Starovoitov2e397482017-10-30 19:39:56 -0700109A: This was necessary to avoid introducing flags into ISA which are
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +0200110impossible to make generic and efficient across CPU architectures.
Alexei Starovoitov2e397482017-10-30 19:39:56 -0700111
112Q: why BPF_DIV instruction doesn't map to x64 div?
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +0200113~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Alexei Starovoitov2e397482017-10-30 19:39:56 -0700114A: Because if we picked one-to-one relationship to x64 it would have made
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +0200115it more complicated to support on arm64 and other archs. Also it
116needs div-by-zero runtime check.
Alexei Starovoitov2e397482017-10-30 19:39:56 -0700117
118Q: why there is no BPF_SDIV for signed divide operation?
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +0200119~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Alexei Starovoitov2e397482017-10-30 19:39:56 -0700120A: Because it would be rarely used. llvm errors in such case and
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +0200121prints a suggestion to use unsigned divide instead
Alexei Starovoitov2e397482017-10-30 19:39:56 -0700122
123Q: Why BPF has implicit prologue and epilogue?
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +0200124~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Alexei Starovoitov2e397482017-10-30 19:39:56 -0700125A: Because architectures like sparc have register windows and in general
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +0200126there are enough subtle differences between architectures, so naive
127store return address into stack won't work. Another reason is BPF has
128to be safe from division by zero (and legacy exception path
129of LD_ABS insn). Those instructions need to invoke epilogue and
130return implicitly.
Alexei Starovoitov2e397482017-10-30 19:39:56 -0700131
132Q: Why BPF_JLT and BPF_JLE instructions were not introduced in the beginning?
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +0200133~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Alexei Starovoitov2e397482017-10-30 19:39:56 -0700134A: Because classic BPF didn't have them and BPF authors felt that compiler
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +0200135workaround would be acceptable. Turned out that programs lose performance
136due to lack of these compare instructions and they were added.
137These two instructions is a perfect example what kind of new BPF
138instructions are acceptable and can be added in the future.
139These two already had equivalent instructions in native CPUs.
140New instructions that don't have one-to-one mapping to HW instructions
141will not be accepted.
Alexei Starovoitov2e397482017-10-30 19:39:56 -0700142
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +0200143Q: BPF 32-bit subregister requirements
144~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Alexei Starovoitov2e397482017-10-30 19:39:56 -0700145Q: BPF 32-bit subregisters have a requirement to zero upper 32-bits of BPF
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +0200146registers which makes BPF inefficient virtual machine for 32-bit
147CPU architectures and 32-bit HW accelerators. Can true 32-bit registers
148be added to BPF in the future?
149
Alexei Starovoitov2e397482017-10-30 19:39:56 -0700150A: NO. The first thing to improve performance on 32-bit archs is to teach
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +0200151LLVM to generate code that uses 32-bit subregisters. Then second step
152is to teach verifier to mark operations where zero-ing upper bits
153is unnecessary. Then JITs can take advantage of those markings and
154drastically reduce size of generated code and improve performance.
Alexei Starovoitov2e397482017-10-30 19:39:56 -0700155
156Q: Does BPF have a stable ABI?
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +0200157------------------------------
Alexei Starovoitov2e397482017-10-30 19:39:56 -0700158A: YES. BPF instructions, arguments to BPF programs, set of helper
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +0200159functions and their arguments, recognized return codes are all part
160of ABI. However when tracing programs are using bpf_probe_read() helper
161to walk kernel internal datastructures and compile with kernel
162internal headers these accesses can and will break with newer
163kernels. The union bpf_attr -> kern_version is checked at load time
164to prevent accidentally loading kprobe-based bpf programs written
165for a different kernel. Networking programs don't do kern_version check.
Alexei Starovoitov2e397482017-10-30 19:39:56 -0700166
167Q: How much stack space a BPF program uses?
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +0200168-------------------------------------------
Alexei Starovoitov2e397482017-10-30 19:39:56 -0700169A: Currently all program types are limited to 512 bytes of stack
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +0200170space, but the verifier computes the actual amount of stack used
171and both interpreter and most JITed code consume necessary amount.
Alexei Starovoitov2e397482017-10-30 19:39:56 -0700172
173Q: Can BPF be offloaded to HW?
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +0200174------------------------------
Alexei Starovoitov2e397482017-10-30 19:39:56 -0700175A: YES. BPF HW offload is supported by NFP driver.
176
177Q: Does classic BPF interpreter still exist?
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +0200178--------------------------------------------
Alexei Starovoitov2e397482017-10-30 19:39:56 -0700179A: NO. Classic BPF programs are converted into extend BPF instructions.
180
181Q: Can BPF call arbitrary kernel functions?
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +0200182-------------------------------------------
Alexei Starovoitov2e397482017-10-30 19:39:56 -0700183A: NO. BPF programs can only call a set of helper functions which
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +0200184is defined for every program type.
Alexei Starovoitov2e397482017-10-30 19:39:56 -0700185
186Q: Can BPF overwrite arbitrary kernel memory?
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +0200187---------------------------------------------
188A: NO.
189
190Tracing bpf programs can *read* arbitrary memory with bpf_probe_read()
191and bpf_probe_read_str() helpers. Networking programs cannot read
192arbitrary memory, since they don't have access to these helpers.
193Programs can never read or write arbitrary memory directly.
Alexei Starovoitov2e397482017-10-30 19:39:56 -0700194
195Q: Can BPF overwrite arbitrary user memory?
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +0200196-------------------------------------------
197A: Sort-of.
Alexei Starovoitov2e397482017-10-30 19:39:56 -0700198
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +0200199Tracing BPF programs can overwrite the user memory
200of the current task with bpf_probe_write_user(). Every time such
201program is loaded the kernel will print warning message, so
202this helper is only useful for experiments and prototypes.
203Tracing BPF programs are root only.
204
205Q: bpf_trace_printk() helper warning
206------------------------------------
Alexei Starovoitov2e397482017-10-30 19:39:56 -0700207Q: When bpf_trace_printk() helper is used the kernel prints nasty
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +0200208warning message. Why is that?
Alexei Starovoitov2e397482017-10-30 19:39:56 -0700209
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +0200210A: This is done to nudge program authors into better interfaces when
211programs need to pass data to user space. Like bpf_perf_event_output()
212can be used to efficiently stream data via perf ring buffer.
213BPF maps can be used for asynchronous data sharing between kernel
214and user space. bpf_trace_printk() should only be used for debugging.
215
216Q: New functionality via kernel modules?
217----------------------------------------
Alexei Starovoitov2e397482017-10-30 19:39:56 -0700218Q: Can BPF functionality such as new program or map types, new
Jesper Dangaard Brouer1a6ac1d2018-05-14 15:42:22 +0200219helpers, etc be added out of kernel module code?
220
Alexei Starovoitov2e397482017-10-30 19:39:56 -0700221A: NO.