blob: 8f714cf8135bd23f74a405edc32307caadc513c2 [file] [log] [blame]
Bryan Wu1394f032007-05-06 14:50:22 -07001/*
Robin Getz96f10502009-09-24 14:11:24 +00002 * Set up the interrupt priorities
Bryan Wu1394f032007-05-06 14:50:22 -07003 *
Robin Getz96f10502009-09-24 14:11:24 +00004 * Copyright 2005-2009 Analog Devices Inc.
Bryan Wu1394f032007-05-06 14:50:22 -07005 *
Robin Getz96f10502009-09-24 14:11:24 +00006 * Licensed under the GPL-2 or later.
Bryan Wu1394f032007-05-06 14:50:22 -07007 */
8
9#include <linux/module.h>
Mike Frysinger1f83b8f2007-07-12 22:58:21 +080010#include <linux/irq.h>
Bryan Wu1394f032007-05-06 14:50:22 -070011#include <asm/blackfin.h>
Bryan Wu1394f032007-05-06 14:50:22 -070012
Mike Frysinger9216bbc2008-08-14 14:35:20 +080013void __init program_IAR(void)
Bryan Wu1394f032007-05-06 14:50:22 -070014{
15 /* Program the IAR0 Register with the configured priority */
16 bfin_write_SIC_IAR0(((CONFIG_PLLWAKE_ERROR - 7) << PLLWAKE_ERROR_POS) |
17 ((CONFIG_DMA_ERROR - 7) << DMA_ERROR_POS) |
18 ((CONFIG_PPI_ERROR - 7) << PPI_ERROR_POS) |
19 ((CONFIG_SPORT0_ERROR - 7) << SPORT0_ERROR_POS) |
20 ((CONFIG_SPI_ERROR - 7) << SPI_ERROR_POS) |
21 ((CONFIG_SPORT1_ERROR - 7) << SPORT1_ERROR_POS) |
22 ((CONFIG_UART_ERROR - 7) << UART_ERROR_POS) |
23 ((CONFIG_RTC_ERROR - 7) << RTC_ERROR_POS));
24
25 bfin_write_SIC_IAR1(((CONFIG_DMA0_PPI - 7) << DMA0_PPI_POS) |
26 ((CONFIG_DMA1_SPORT0RX - 7) << DMA1_SPORT0RX_POS) |
27 ((CONFIG_DMA2_SPORT0TX - 7) << DMA2_SPORT0TX_POS) |
28 ((CONFIG_DMA3_SPORT1RX - 7) << DMA3_SPORT1RX_POS) |
29 ((CONFIG_DMA4_SPORT1TX - 7) << DMA4_SPORT1TX_POS) |
30 ((CONFIG_DMA5_SPI - 7) << DMA5_SPI_POS) |
31 ((CONFIG_DMA6_UARTRX - 7) << DMA6_UARTRX_POS) |
32 ((CONFIG_DMA7_UARTTX - 7) << DMA7_UARTTX_POS));
33
34 bfin_write_SIC_IAR2(((CONFIG_TIMER0 - 7) << TIMER0_POS) |
35 ((CONFIG_TIMER1 - 7) << TIMER1_POS) |
36 ((CONFIG_TIMER2 - 7) << TIMER2_POS) |
37 ((CONFIG_PFA - 7) << PFA_POS) |
38 ((CONFIG_PFB - 7) << PFB_POS) |
39 ((CONFIG_MEMDMA0 - 7) << MEMDMA0_POS) |
40 ((CONFIG_MEMDMA1 - 7) << MEMDMA1_POS) |
41 ((CONFIG_WDTIMER - 7) << WDTIMER_POS));
42
43 SSYNC();
44}