Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2004-2009 Analog Devices Inc. |
| 3 | * 2005 National ICT Australia (NICTA) |
| 4 | * Aidan Williams <aidan@nicta.com.au> |
| 5 | * |
| 6 | * Licensed under the GPL-2 or later. |
| 7 | */ |
| 8 | |
| 9 | #include <linux/device.h> |
| 10 | #include <linux/platform_device.h> |
| 11 | #include <linux/mtd/mtd.h> |
| 12 | #include <linux/mtd/partitions.h> |
| 13 | #include <linux/mtd/physmap.h> |
| 14 | #include <linux/spi/spi.h> |
| 15 | #include <linux/spi/flash.h> |
| 16 | #include <linux/irq.h> |
| 17 | #include <linux/i2c.h> |
| 18 | #include <linux/interrupt.h> |
| 19 | #include <linux/usb/musb.h> |
Scott Jiang | 5e50175 | 2013-07-03 16:48:19 +0800 | [diff] [blame] | 20 | #include <asm/bfin_spi3.h> |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 21 | #include <asm/dma.h> |
| 22 | #include <asm/gpio.h> |
| 23 | #include <asm/nand.h> |
| 24 | #include <asm/dpmc.h> |
| 25 | #include <asm/portmux.h> |
| 26 | #include <asm/bfin_sdh.h> |
| 27 | #include <linux/input.h> |
| 28 | #include <linux/spi/ad7877.h> |
| 29 | |
| 30 | /* |
| 31 | * Name the Board for the /proc/cpuinfo |
| 32 | */ |
| 33 | const char bfin_board_name[] = "ADI BF609-EZKIT"; |
| 34 | |
| 35 | /* |
| 36 | * Driver needs to know address, irq and flag pin. |
| 37 | */ |
| 38 | |
| 39 | #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE) |
| 40 | #include <linux/usb/isp1760.h> |
| 41 | static struct resource bfin_isp1760_resources[] = { |
| 42 | [0] = { |
| 43 | .start = 0x2C0C0000, |
| 44 | .end = 0x2C0C0000 + 0xfffff, |
| 45 | .flags = IORESOURCE_MEM, |
| 46 | }, |
| 47 | [1] = { |
| 48 | .start = IRQ_PG7, |
| 49 | .end = IRQ_PG7, |
| 50 | .flags = IORESOURCE_IRQ, |
| 51 | }, |
| 52 | }; |
| 53 | |
| 54 | static struct isp1760_platform_data isp1760_priv = { |
| 55 | .is_isp1761 = 0, |
| 56 | .bus_width_16 = 1, |
| 57 | .port1_otg = 0, |
| 58 | .analog_oc = 0, |
| 59 | .dack_polarity_high = 0, |
| 60 | .dreq_polarity_high = 0, |
| 61 | }; |
| 62 | |
| 63 | static struct platform_device bfin_isp1760_device = { |
| 64 | .name = "isp1760", |
| 65 | .id = 0, |
| 66 | .dev = { |
| 67 | .platform_data = &isp1760_priv, |
| 68 | }, |
| 69 | .num_resources = ARRAY_SIZE(bfin_isp1760_resources), |
| 70 | .resource = bfin_isp1760_resources, |
| 71 | }; |
| 72 | #endif |
| 73 | |
| 74 | #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE) |
| 75 | #include <asm/bfin_rotary.h> |
| 76 | |
| 77 | static struct bfin_rotary_platform_data bfin_rotary_data = { |
| 78 | /*.rotary_up_key = KEY_UP,*/ |
| 79 | /*.rotary_down_key = KEY_DOWN,*/ |
| 80 | .rotary_rel_code = REL_WHEEL, |
| 81 | .rotary_button_key = KEY_ENTER, |
| 82 | .debounce = 10, /* 0..17 */ |
| 83 | .mode = ROT_QUAD_ENC | ROT_DEBE, |
| 84 | }; |
| 85 | |
| 86 | static struct resource bfin_rotary_resources[] = { |
| 87 | { |
| 88 | .start = IRQ_CNT, |
| 89 | .end = IRQ_CNT, |
| 90 | .flags = IORESOURCE_IRQ, |
| 91 | }, |
| 92 | }; |
| 93 | |
| 94 | static struct platform_device bfin_rotary_device = { |
| 95 | .name = "bfin-rotary", |
| 96 | .id = -1, |
| 97 | .num_resources = ARRAY_SIZE(bfin_rotary_resources), |
| 98 | .resource = bfin_rotary_resources, |
| 99 | .dev = { |
| 100 | .platform_data = &bfin_rotary_data, |
| 101 | }, |
| 102 | }; |
| 103 | #endif |
| 104 | |
| 105 | #if defined(CONFIG_STMMAC_ETH) || defined(CONFIG_STMMAC_ETH_MODULE) |
| 106 | #include <linux/stmmac.h> |
| 107 | |
Bob Liu | 3a3cf0d | 2012-05-17 14:21:22 +0800 | [diff] [blame] | 108 | static unsigned short pins[] = P_RMII0; |
| 109 | |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 110 | static struct stmmac_mdio_bus_data phy_private_data = { |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 111 | .phy_mask = 1, |
| 112 | }; |
| 113 | |
| 114 | static struct plat_stmmacenet_data eth_private_data = { |
| 115 | .bus_id = 0, |
| 116 | .enh_desc = 1, |
| 117 | .phy_addr = 1, |
| 118 | .mdio_bus_data = &phy_private_data, |
| 119 | }; |
| 120 | |
| 121 | static struct platform_device bfin_eth_device = { |
| 122 | .name = "stmmaceth", |
| 123 | .id = 0, |
| 124 | .num_resources = 2, |
| 125 | .resource = (struct resource[]) { |
| 126 | { |
| 127 | .start = EMAC0_MACCFG, |
| 128 | .end = EMAC0_MACCFG + 0x1274, |
| 129 | .flags = IORESOURCE_MEM, |
| 130 | }, |
| 131 | { |
| 132 | .name = "macirq", |
| 133 | .start = IRQ_EMAC0_STAT, |
| 134 | .end = IRQ_EMAC0_STAT, |
| 135 | .flags = IORESOURCE_IRQ, |
| 136 | }, |
| 137 | }, |
| 138 | .dev = { |
Bob Liu | 6e1953e | 2012-05-09 17:20:32 +0800 | [diff] [blame] | 139 | .power.can_wakeup = 1, |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 140 | .platform_data = ð_private_data, |
| 141 | } |
| 142 | }; |
| 143 | #endif |
| 144 | |
| 145 | #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE) |
| 146 | #include <linux/input/adxl34x.h> |
| 147 | static const struct adxl34x_platform_data adxl34x_info = { |
| 148 | .x_axis_offset = 0, |
| 149 | .y_axis_offset = 0, |
| 150 | .z_axis_offset = 0, |
| 151 | .tap_threshold = 0x31, |
| 152 | .tap_duration = 0x10, |
| 153 | .tap_latency = 0x60, |
| 154 | .tap_window = 0xF0, |
| 155 | .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN, |
| 156 | .act_axis_control = 0xFF, |
| 157 | .activity_threshold = 5, |
| 158 | .inactivity_threshold = 3, |
| 159 | .inactivity_time = 4, |
| 160 | .free_fall_threshold = 0x7, |
| 161 | .free_fall_time = 0x20, |
| 162 | .data_rate = 0x8, |
| 163 | .data_range = ADXL_FULL_RES, |
| 164 | |
| 165 | .ev_type = EV_ABS, |
| 166 | .ev_code_x = ABS_X, /* EV_REL */ |
| 167 | .ev_code_y = ABS_Y, /* EV_REL */ |
| 168 | .ev_code_z = ABS_Z, /* EV_REL */ |
| 169 | |
| 170 | .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */ |
| 171 | |
| 172 | /* .ev_code_ff = KEY_F,*/ /* EV_KEY */ |
| 173 | /* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */ |
| 174 | .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK, |
| 175 | .fifo_mode = ADXL_FIFO_STREAM, |
| 176 | .orientation_enable = ADXL_EN_ORIENTATION_3D, |
| 177 | .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8, |
| 178 | .divisor_length = ADXL_LP_FILTER_DIVISOR_16, |
| 179 | /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */ |
| 180 | .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C}, |
| 181 | }; |
| 182 | #endif |
| 183 | |
| 184 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) |
| 185 | static struct platform_device rtc_device = { |
| 186 | .name = "rtc-bfin", |
| 187 | .id = -1, |
| 188 | }; |
| 189 | #endif |
| 190 | |
| 191 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) |
| 192 | #ifdef CONFIG_SERIAL_BFIN_UART0 |
| 193 | static struct resource bfin_uart0_resources[] = { |
| 194 | { |
| 195 | .start = UART0_REVID, |
| 196 | .end = UART0_RXDIV+4, |
| 197 | .flags = IORESOURCE_MEM, |
| 198 | }, |
| 199 | { |
| 200 | .start = IRQ_UART0_TX, |
| 201 | .end = IRQ_UART0_TX, |
| 202 | .flags = IORESOURCE_IRQ, |
| 203 | }, |
| 204 | { |
| 205 | .start = IRQ_UART0_RX, |
| 206 | .end = IRQ_UART0_RX, |
| 207 | .flags = IORESOURCE_IRQ, |
| 208 | }, |
| 209 | { |
| 210 | .start = IRQ_UART0_STAT, |
| 211 | .end = IRQ_UART0_STAT, |
| 212 | .flags = IORESOURCE_IRQ, |
| 213 | }, |
| 214 | { |
| 215 | .start = CH_UART0_TX, |
| 216 | .end = CH_UART0_TX, |
| 217 | .flags = IORESOURCE_DMA, |
| 218 | }, |
| 219 | { |
| 220 | .start = CH_UART0_RX, |
| 221 | .end = CH_UART0_RX, |
| 222 | .flags = IORESOURCE_DMA, |
| 223 | }, |
| 224 | #ifdef CONFIG_BFIN_UART0_CTSRTS |
| 225 | { /* CTS pin -- 0 means not supported */ |
| 226 | .start = GPIO_PD10, |
| 227 | .end = GPIO_PD10, |
| 228 | .flags = IORESOURCE_IO, |
| 229 | }, |
| 230 | { /* RTS pin -- 0 means not supported */ |
| 231 | .start = GPIO_PD9, |
| 232 | .end = GPIO_PD9, |
| 233 | .flags = IORESOURCE_IO, |
| 234 | }, |
| 235 | #endif |
| 236 | }; |
| 237 | |
| 238 | static unsigned short bfin_uart0_peripherals[] = { |
| 239 | P_UART0_TX, P_UART0_RX, |
| 240 | #ifdef CONFIG_BFIN_UART0_CTSRTS |
| 241 | P_UART0_RTS, P_UART0_CTS, |
| 242 | #endif |
| 243 | 0 |
| 244 | }; |
| 245 | |
| 246 | static struct platform_device bfin_uart0_device = { |
| 247 | .name = "bfin-uart", |
| 248 | .id = 0, |
| 249 | .num_resources = ARRAY_SIZE(bfin_uart0_resources), |
| 250 | .resource = bfin_uart0_resources, |
| 251 | .dev = { |
| 252 | .platform_data = &bfin_uart0_peripherals, /* Passed to driver */ |
| 253 | }, |
| 254 | }; |
| 255 | #endif |
| 256 | #ifdef CONFIG_SERIAL_BFIN_UART1 |
| 257 | static struct resource bfin_uart1_resources[] = { |
| 258 | { |
| 259 | .start = UART1_REVID, |
| 260 | .end = UART1_RXDIV+4, |
| 261 | .flags = IORESOURCE_MEM, |
| 262 | }, |
| 263 | { |
| 264 | .start = IRQ_UART1_TX, |
| 265 | .end = IRQ_UART1_TX, |
| 266 | .flags = IORESOURCE_IRQ, |
| 267 | }, |
| 268 | { |
| 269 | .start = IRQ_UART1_RX, |
| 270 | .end = IRQ_UART1_RX, |
| 271 | .flags = IORESOURCE_IRQ, |
| 272 | }, |
| 273 | { |
| 274 | .start = IRQ_UART1_STAT, |
| 275 | .end = IRQ_UART1_STAT, |
| 276 | .flags = IORESOURCE_IRQ, |
| 277 | }, |
| 278 | { |
| 279 | .start = CH_UART1_TX, |
| 280 | .end = CH_UART1_TX, |
| 281 | .flags = IORESOURCE_DMA, |
| 282 | }, |
| 283 | { |
| 284 | .start = CH_UART1_RX, |
| 285 | .end = CH_UART1_RX, |
| 286 | .flags = IORESOURCE_DMA, |
| 287 | }, |
| 288 | #ifdef CONFIG_BFIN_UART1_CTSRTS |
| 289 | { /* CTS pin -- 0 means not supported */ |
| 290 | .start = GPIO_PG13, |
| 291 | .end = GPIO_PG13, |
| 292 | .flags = IORESOURCE_IO, |
| 293 | }, |
| 294 | { /* RTS pin -- 0 means not supported */ |
| 295 | .start = GPIO_PG10, |
| 296 | .end = GPIO_PG10, |
| 297 | .flags = IORESOURCE_IO, |
| 298 | }, |
| 299 | #endif |
| 300 | }; |
| 301 | |
| 302 | static unsigned short bfin_uart1_peripherals[] = { |
| 303 | P_UART1_TX, P_UART1_RX, |
| 304 | #ifdef CONFIG_BFIN_UART1_CTSRTS |
| 305 | P_UART1_RTS, P_UART1_CTS, |
| 306 | #endif |
| 307 | 0 |
| 308 | }; |
| 309 | |
| 310 | static struct platform_device bfin_uart1_device = { |
| 311 | .name = "bfin-uart", |
| 312 | .id = 1, |
| 313 | .num_resources = ARRAY_SIZE(bfin_uart1_resources), |
| 314 | .resource = bfin_uart1_resources, |
| 315 | .dev = { |
| 316 | .platform_data = &bfin_uart1_peripherals, /* Passed to driver */ |
| 317 | }, |
| 318 | }; |
| 319 | #endif |
| 320 | #endif |
| 321 | |
| 322 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) |
| 323 | #ifdef CONFIG_BFIN_SIR0 |
| 324 | static struct resource bfin_sir0_resources[] = { |
| 325 | { |
| 326 | .start = 0xFFC00400, |
| 327 | .end = 0xFFC004FF, |
| 328 | .flags = IORESOURCE_MEM, |
| 329 | }, |
| 330 | { |
| 331 | .start = IRQ_UART0_TX, |
| 332 | .end = IRQ_UART0_TX+1, |
| 333 | .flags = IORESOURCE_IRQ, |
| 334 | }, |
| 335 | { |
| 336 | .start = CH_UART0_TX, |
| 337 | .end = CH_UART0_TX+1, |
| 338 | .flags = IORESOURCE_DMA, |
| 339 | }, |
| 340 | }; |
| 341 | static struct platform_device bfin_sir0_device = { |
| 342 | .name = "bfin_sir", |
| 343 | .id = 0, |
| 344 | .num_resources = ARRAY_SIZE(bfin_sir0_resources), |
| 345 | .resource = bfin_sir0_resources, |
| 346 | }; |
| 347 | #endif |
| 348 | #ifdef CONFIG_BFIN_SIR1 |
| 349 | static struct resource bfin_sir1_resources[] = { |
| 350 | { |
| 351 | .start = 0xFFC02000, |
| 352 | .end = 0xFFC020FF, |
| 353 | .flags = IORESOURCE_MEM, |
| 354 | }, |
| 355 | { |
| 356 | .start = IRQ_UART1_TX, |
| 357 | .end = IRQ_UART1_TX+1, |
| 358 | .flags = IORESOURCE_IRQ, |
| 359 | }, |
| 360 | { |
| 361 | .start = CH_UART1_TX, |
| 362 | .end = CH_UART1_TX+1, |
| 363 | .flags = IORESOURCE_DMA, |
| 364 | }, |
| 365 | }; |
| 366 | static struct platform_device bfin_sir1_device = { |
| 367 | .name = "bfin_sir", |
| 368 | .id = 1, |
| 369 | .num_resources = ARRAY_SIZE(bfin_sir1_resources), |
| 370 | .resource = bfin_sir1_resources, |
| 371 | }; |
| 372 | #endif |
| 373 | #endif |
| 374 | |
| 375 | #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE) |
| 376 | static struct resource musb_resources[] = { |
| 377 | [0] = { |
| 378 | .start = 0xFFCC1000, |
| 379 | .end = 0xFFCC1398, |
| 380 | .flags = IORESOURCE_MEM, |
| 381 | }, |
| 382 | [1] = { /* general IRQ */ |
| 383 | .start = IRQ_USB_STAT, |
| 384 | .end = IRQ_USB_STAT, |
| 385 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, |
| 386 | .name = "mc" |
| 387 | }, |
| 388 | [2] = { /* DMA IRQ */ |
| 389 | .start = IRQ_USB_DMA, |
| 390 | .end = IRQ_USB_DMA, |
| 391 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, |
| 392 | .name = "dma" |
| 393 | }, |
| 394 | }; |
| 395 | |
| 396 | static struct musb_hdrc_config musb_config = { |
| 397 | .multipoint = 1, |
| 398 | .dyn_fifo = 0, |
| 399 | .dma = 1, |
| 400 | .num_eps = 16, |
| 401 | .dma_channels = 8, |
| 402 | .clkin = 48, /* musb CLKIN in MHZ */ |
| 403 | }; |
| 404 | |
| 405 | static struct musb_hdrc_platform_data musb_plat = { |
| 406 | #if defined(CONFIG_USB_MUSB_HDRC) && defined(CONFIG_USB_GADGET_MUSB_HDRC) |
| 407 | .mode = MUSB_OTG, |
| 408 | #elif defined(CONFIG_USB_MUSB_HDRC) |
| 409 | .mode = MUSB_HOST, |
| 410 | #elif defined(CONFIG_USB_GADGET_MUSB_HDRC) |
| 411 | .mode = MUSB_PERIPHERAL, |
| 412 | #endif |
| 413 | .config = &musb_config, |
| 414 | }; |
| 415 | |
| 416 | static u64 musb_dmamask = ~(u32)0; |
| 417 | |
| 418 | static struct platform_device musb_device = { |
| 419 | .name = "musb-blackfin", |
| 420 | .id = 0, |
| 421 | .dev = { |
| 422 | .dma_mask = &musb_dmamask, |
| 423 | .coherent_dma_mask = 0xffffffff, |
| 424 | .platform_data = &musb_plat, |
| 425 | }, |
| 426 | .num_resources = ARRAY_SIZE(musb_resources), |
| 427 | .resource = musb_resources, |
| 428 | }; |
| 429 | #endif |
| 430 | |
| 431 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) |
| 432 | #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART |
| 433 | static struct resource bfin_sport0_uart_resources[] = { |
| 434 | { |
| 435 | .start = SPORT0_TCR1, |
| 436 | .end = SPORT0_MRCS3+4, |
| 437 | .flags = IORESOURCE_MEM, |
| 438 | }, |
| 439 | { |
| 440 | .start = IRQ_SPORT0_RX, |
| 441 | .end = IRQ_SPORT0_RX+1, |
| 442 | .flags = IORESOURCE_IRQ, |
| 443 | }, |
| 444 | { |
| 445 | .start = IRQ_SPORT0_ERROR, |
| 446 | .end = IRQ_SPORT0_ERROR, |
| 447 | .flags = IORESOURCE_IRQ, |
| 448 | }, |
| 449 | }; |
| 450 | |
| 451 | static unsigned short bfin_sport0_peripherals[] = { |
| 452 | P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS, |
| 453 | P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0 |
| 454 | }; |
| 455 | |
| 456 | static struct platform_device bfin_sport0_uart_device = { |
| 457 | .name = "bfin-sport-uart", |
| 458 | .id = 0, |
| 459 | .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources), |
| 460 | .resource = bfin_sport0_uart_resources, |
| 461 | .dev = { |
| 462 | .platform_data = &bfin_sport0_peripherals, /* Passed to driver */ |
| 463 | }, |
| 464 | }; |
| 465 | #endif |
| 466 | #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART |
| 467 | static struct resource bfin_sport1_uart_resources[] = { |
| 468 | { |
| 469 | .start = SPORT1_TCR1, |
| 470 | .end = SPORT1_MRCS3+4, |
| 471 | .flags = IORESOURCE_MEM, |
| 472 | }, |
| 473 | { |
| 474 | .start = IRQ_SPORT1_RX, |
| 475 | .end = IRQ_SPORT1_RX+1, |
| 476 | .flags = IORESOURCE_IRQ, |
| 477 | }, |
| 478 | { |
| 479 | .start = IRQ_SPORT1_ERROR, |
| 480 | .end = IRQ_SPORT1_ERROR, |
| 481 | .flags = IORESOURCE_IRQ, |
| 482 | }, |
| 483 | }; |
| 484 | |
| 485 | static unsigned short bfin_sport1_peripherals[] = { |
| 486 | P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS, |
| 487 | P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0 |
| 488 | }; |
| 489 | |
| 490 | static struct platform_device bfin_sport1_uart_device = { |
| 491 | .name = "bfin-sport-uart", |
| 492 | .id = 1, |
| 493 | .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources), |
| 494 | .resource = bfin_sport1_uart_resources, |
| 495 | .dev = { |
| 496 | .platform_data = &bfin_sport1_peripherals, /* Passed to driver */ |
| 497 | }, |
| 498 | }; |
| 499 | #endif |
| 500 | #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART |
| 501 | static struct resource bfin_sport2_uart_resources[] = { |
| 502 | { |
| 503 | .start = SPORT2_TCR1, |
| 504 | .end = SPORT2_MRCS3+4, |
| 505 | .flags = IORESOURCE_MEM, |
| 506 | }, |
| 507 | { |
| 508 | .start = IRQ_SPORT2_RX, |
| 509 | .end = IRQ_SPORT2_RX+1, |
| 510 | .flags = IORESOURCE_IRQ, |
| 511 | }, |
| 512 | { |
| 513 | .start = IRQ_SPORT2_ERROR, |
| 514 | .end = IRQ_SPORT2_ERROR, |
| 515 | .flags = IORESOURCE_IRQ, |
| 516 | }, |
| 517 | }; |
| 518 | |
| 519 | static unsigned short bfin_sport2_peripherals[] = { |
| 520 | P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS, |
| 521 | P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0 |
| 522 | }; |
| 523 | |
| 524 | static struct platform_device bfin_sport2_uart_device = { |
| 525 | .name = "bfin-sport-uart", |
| 526 | .id = 2, |
| 527 | .num_resources = ARRAY_SIZE(bfin_sport2_uart_resources), |
| 528 | .resource = bfin_sport2_uart_resources, |
| 529 | .dev = { |
| 530 | .platform_data = &bfin_sport2_peripherals, /* Passed to driver */ |
| 531 | }, |
| 532 | }; |
| 533 | #endif |
| 534 | #endif |
| 535 | |
| 536 | #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE) |
| 537 | |
| 538 | static unsigned short bfin_can0_peripherals[] = { |
| 539 | P_CAN0_RX, P_CAN0_TX, 0 |
| 540 | }; |
| 541 | |
| 542 | static struct resource bfin_can0_resources[] = { |
| 543 | { |
| 544 | .start = 0xFFC00A00, |
| 545 | .end = 0xFFC00FFF, |
| 546 | .flags = IORESOURCE_MEM, |
| 547 | }, |
| 548 | { |
| 549 | .start = IRQ_CAN0_RX, |
| 550 | .end = IRQ_CAN0_RX, |
| 551 | .flags = IORESOURCE_IRQ, |
| 552 | }, |
| 553 | { |
| 554 | .start = IRQ_CAN0_TX, |
| 555 | .end = IRQ_CAN0_TX, |
| 556 | .flags = IORESOURCE_IRQ, |
| 557 | }, |
| 558 | { |
| 559 | .start = IRQ_CAN0_STAT, |
| 560 | .end = IRQ_CAN0_STAT, |
| 561 | .flags = IORESOURCE_IRQ, |
| 562 | }, |
| 563 | }; |
| 564 | |
| 565 | static struct platform_device bfin_can0_device = { |
| 566 | .name = "bfin_can", |
| 567 | .id = 0, |
| 568 | .num_resources = ARRAY_SIZE(bfin_can0_resources), |
| 569 | .resource = bfin_can0_resources, |
| 570 | .dev = { |
| 571 | .platform_data = &bfin_can0_peripherals, /* Passed to driver */ |
| 572 | }, |
| 573 | }; |
| 574 | |
| 575 | #endif |
| 576 | |
| 577 | #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE) |
| 578 | static struct mtd_partition partition_info[] = { |
| 579 | { |
| 580 | .name = "bootloader(nand)", |
| 581 | .offset = 0, |
| 582 | .size = 0x80000, |
| 583 | }, { |
| 584 | .name = "linux kernel(nand)", |
| 585 | .offset = MTDPART_OFS_APPEND, |
| 586 | .size = 4 * 1024 * 1024, |
| 587 | }, |
| 588 | { |
| 589 | .name = "file system(nand)", |
| 590 | .offset = MTDPART_OFS_APPEND, |
| 591 | .size = MTDPART_SIZ_FULL, |
| 592 | }, |
| 593 | }; |
| 594 | |
| 595 | static struct bf5xx_nand_platform bfin_nand_platform = { |
| 596 | .data_width = NFC_NWIDTH_8, |
| 597 | .partitions = partition_info, |
| 598 | .nr_partitions = ARRAY_SIZE(partition_info), |
| 599 | .rd_dly = 3, |
| 600 | .wr_dly = 3, |
| 601 | }; |
| 602 | |
| 603 | static struct resource bfin_nand_resources[] = { |
| 604 | { |
| 605 | .start = 0xFFC03B00, |
| 606 | .end = 0xFFC03B4F, |
| 607 | .flags = IORESOURCE_MEM, |
| 608 | }, |
| 609 | { |
| 610 | .start = CH_NFC, |
| 611 | .end = CH_NFC, |
| 612 | .flags = IORESOURCE_IRQ, |
| 613 | }, |
| 614 | }; |
| 615 | |
| 616 | static struct platform_device bfin_nand_device = { |
| 617 | .name = "bfin-nand", |
| 618 | .id = 0, |
| 619 | .num_resources = ARRAY_SIZE(bfin_nand_resources), |
| 620 | .resource = bfin_nand_resources, |
| 621 | .dev = { |
| 622 | .platform_data = &bfin_nand_platform, |
| 623 | }, |
| 624 | }; |
| 625 | #endif |
| 626 | |
| 627 | #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE) |
| 628 | |
| 629 | static struct bfin_sd_host bfin_sdh_data = { |
| 630 | .dma_chan = CH_RSI, |
| 631 | .irq_int0 = IRQ_RSI_INT0, |
| 632 | .pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0}, |
| 633 | }; |
| 634 | |
| 635 | static struct platform_device bfin_sdh_device = { |
| 636 | .name = "bfin-sdh", |
| 637 | .id = 0, |
| 638 | .dev = { |
| 639 | .platform_data = &bfin_sdh_data, |
| 640 | }, |
| 641 | }; |
| 642 | #endif |
| 643 | |
Bob Liu | 1c40093 | 2012-05-15 13:58:56 +0800 | [diff] [blame] | 644 | #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 645 | static struct mtd_partition ezkit_partitions[] = { |
| 646 | { |
| 647 | .name = "bootloader(nor)", |
| 648 | .size = 0x80000, |
| 649 | .offset = 0, |
| 650 | }, { |
| 651 | .name = "linux kernel(nor)", |
| 652 | .size = 0x400000, |
| 653 | .offset = MTDPART_OFS_APPEND, |
| 654 | }, { |
| 655 | .name = "file system(nor)", |
| 656 | .size = 0x1000000 - 0x80000 - 0x400000, |
| 657 | .offset = MTDPART_OFS_APPEND, |
| 658 | }, |
| 659 | }; |
| 660 | |
| 661 | int bf609_nor_flash_init(struct platform_device *dev) |
| 662 | { |
| 663 | #define CONFIG_SMC_GCTL_VAL 0x00000010 |
| 664 | const unsigned short pins[] = { |
| 665 | P_A3, P_A4, P_A5, P_A6, P_A7, P_A8, P_A9, P_A10, P_A11, P_A12, |
| 666 | P_A13, P_A14, P_A15, P_A16, P_A17, P_A18, P_A19, P_A20, P_A21, |
| 667 | P_A22, P_A23, P_A24, P_A25, P_NORCK, 0, |
| 668 | }; |
| 669 | |
| 670 | peripheral_request_list(pins, "smc0"); |
| 671 | |
| 672 | bfin_write32(SMC_GCTL, CONFIG_SMC_GCTL_VAL); |
Bob Liu | 1c40093 | 2012-05-15 13:58:56 +0800 | [diff] [blame] | 673 | bfin_write32(SMC_B0CTL, 0x01002011); |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 674 | bfin_write32(SMC_B0TIM, 0x08170977); |
| 675 | bfin_write32(SMC_B0ETIM, 0x00092231); |
| 676 | return 0; |
| 677 | } |
| 678 | |
Steven Miao | 0220874 | 2012-05-04 13:01:47 +0800 | [diff] [blame] | 679 | void bf609_nor_flash_exit(struct platform_device *dev) |
| 680 | { |
| 681 | const unsigned short pins[] = { |
| 682 | P_A3, P_A4, P_A5, P_A6, P_A7, P_A8, P_A9, P_A10, P_A11, P_A12, |
| 683 | P_A13, P_A14, P_A15, P_A16, P_A17, P_A18, P_A19, P_A20, P_A21, |
| 684 | P_A22, P_A23, P_A24, P_A25, P_NORCK, 0, |
| 685 | }; |
| 686 | |
| 687 | peripheral_free_list(pins); |
| 688 | |
| 689 | bfin_write32(SMC_GCTL, 0); |
Steven Miao | 0220874 | 2012-05-04 13:01:47 +0800 | [diff] [blame] | 690 | } |
| 691 | |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 692 | static struct physmap_flash_data ezkit_flash_data = { |
| 693 | .width = 2, |
| 694 | .parts = ezkit_partitions, |
Steven Miao | 0220874 | 2012-05-04 13:01:47 +0800 | [diff] [blame] | 695 | .init = bf609_nor_flash_init, |
| 696 | .exit = bf609_nor_flash_exit, |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 697 | .nr_parts = ARRAY_SIZE(ezkit_partitions), |
Bob Liu | 3fa8c4b | 2012-06-05 17:20:32 +0800 | [diff] [blame] | 698 | #ifdef CONFIG_ROMKERNEL |
| 699 | .probe_type = "map_rom", |
| 700 | #endif |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 701 | }; |
| 702 | |
| 703 | static struct resource ezkit_flash_resource = { |
| 704 | .start = 0xb0000000, |
| 705 | .end = 0xb0ffffff, |
| 706 | .flags = IORESOURCE_MEM, |
| 707 | }; |
| 708 | |
| 709 | static struct platform_device ezkit_flash_device = { |
Bob Liu | 1c40093 | 2012-05-15 13:58:56 +0800 | [diff] [blame] | 710 | .name = "physmap-flash", |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 711 | .id = 0, |
| 712 | .dev = { |
| 713 | .platform_data = &ezkit_flash_data, |
| 714 | }, |
| 715 | .num_resources = 1, |
| 716 | .resource = &ezkit_flash_resource, |
| 717 | }; |
| 718 | #endif |
| 719 | |
| 720 | #if defined(CONFIG_MTD_M25P80) \ |
| 721 | || defined(CONFIG_MTD_M25P80_MODULE) |
| 722 | /* SPI flash chip (w25q32) */ |
| 723 | static struct mtd_partition bfin_spi_flash_partitions[] = { |
| 724 | { |
| 725 | .name = "bootloader(spi)", |
| 726 | .size = 0x00080000, |
| 727 | .offset = 0, |
| 728 | .mask_flags = MTD_CAP_ROM |
| 729 | }, { |
| 730 | .name = "linux kernel(spi)", |
| 731 | .size = 0x00180000, |
| 732 | .offset = MTDPART_OFS_APPEND, |
| 733 | }, { |
| 734 | .name = "file system(spi)", |
| 735 | .size = MTDPART_SIZ_FULL, |
| 736 | .offset = MTDPART_OFS_APPEND, |
| 737 | } |
| 738 | }; |
| 739 | |
| 740 | static struct flash_platform_data bfin_spi_flash_data = { |
| 741 | .name = "m25p80", |
| 742 | .parts = bfin_spi_flash_partitions, |
| 743 | .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), |
| 744 | .type = "w25q32", |
| 745 | }; |
| 746 | |
Scott Jiang | 5e50175 | 2013-07-03 16:48:19 +0800 | [diff] [blame] | 747 | static struct bfin_spi3_chip spi_flash_chip_info = { |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 748 | .enable_dma = true, /* use dma transfer with this chip*/ |
| 749 | }; |
| 750 | #endif |
| 751 | |
| 752 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) |
Scott Jiang | 5e50175 | 2013-07-03 16:48:19 +0800 | [diff] [blame] | 753 | static struct bfin_spi3_chip spidev_chip_info = { |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 754 | .enable_dma = true, |
| 755 | }; |
| 756 | #endif |
| 757 | |
Scott Jiang | 2984b52 | 2012-06-21 16:50:58 -0400 | [diff] [blame] | 758 | #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 759 | static struct platform_device bfin_i2s_pcm = { |
| 760 | .name = "bfin-i2s-pcm-audio", |
| 761 | .id = -1, |
| 762 | }; |
| 763 | #endif |
| 764 | |
| 765 | #if defined(CONFIG_SND_BF6XX_SOC_I2S) || \ |
| 766 | defined(CONFIG_SND_BF6XX_SOC_I2S_MODULE) |
| 767 | #include <asm/bfin_sport3.h> |
| 768 | static struct resource bfin_snd_resources[] = { |
| 769 | { |
| 770 | .start = SPORT0_CTL_A, |
| 771 | .end = SPORT0_CTL_A, |
| 772 | .flags = IORESOURCE_MEM, |
| 773 | }, |
| 774 | { |
| 775 | .start = SPORT0_CTL_B, |
| 776 | .end = SPORT0_CTL_B, |
| 777 | .flags = IORESOURCE_MEM, |
| 778 | }, |
| 779 | { |
| 780 | .start = CH_SPORT0_TX, |
| 781 | .end = CH_SPORT0_TX, |
| 782 | .flags = IORESOURCE_DMA, |
| 783 | }, |
| 784 | { |
| 785 | .start = CH_SPORT0_RX, |
| 786 | .end = CH_SPORT0_RX, |
| 787 | .flags = IORESOURCE_DMA, |
| 788 | }, |
| 789 | { |
| 790 | .start = IRQ_SPORT0_TX_STAT, |
| 791 | .end = IRQ_SPORT0_TX_STAT, |
| 792 | .flags = IORESOURCE_IRQ, |
| 793 | }, |
| 794 | { |
| 795 | .start = IRQ_SPORT0_RX_STAT, |
| 796 | .end = IRQ_SPORT0_RX_STAT, |
| 797 | .flags = IORESOURCE_IRQ, |
| 798 | }, |
| 799 | }; |
| 800 | |
| 801 | static const unsigned short bfin_snd_pin[] = { |
| 802 | P_SPORT0_ACLK, P_SPORT0_AFS, P_SPORT0_AD0, P_SPORT0_BCLK, |
| 803 | P_SPORT0_BFS, P_SPORT0_BD0, 0, |
| 804 | }; |
| 805 | |
| 806 | static struct bfin_snd_platform_data bfin_snd_data = { |
| 807 | .pin_req = bfin_snd_pin, |
| 808 | }; |
| 809 | |
| 810 | static struct platform_device bfin_i2s = { |
| 811 | .name = "bfin-i2s", |
| 812 | .num_resources = ARRAY_SIZE(bfin_snd_resources), |
| 813 | .resource = bfin_snd_resources, |
| 814 | .dev = { |
| 815 | .platform_data = &bfin_snd_data, |
| 816 | }, |
| 817 | }; |
| 818 | #endif |
| 819 | |
Scott Jiang | 63f49dc | 2012-08-10 18:06:09 -0400 | [diff] [blame] | 820 | #if defined(CONFIG_SND_BF5XX_SOC_AD1836) \ |
| 821 | || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE) |
| 822 | static const char * const ad1836_link[] = { |
Lars-Peter Clausen | 34f4095 | 2013-05-28 19:22:16 +0200 | [diff] [blame] | 823 | "bfin-i2s.0", |
Scott Jiang | 63f49dc | 2012-08-10 18:06:09 -0400 | [diff] [blame] | 824 | "spi0.76", |
| 825 | }; |
| 826 | static struct platform_device bfin_ad1836_machine = { |
| 827 | .name = "bfin-snd-ad1836", |
| 828 | .id = -1, |
| 829 | .dev = { |
| 830 | .platform_data = (void *)ad1836_link, |
| 831 | }, |
| 832 | }; |
| 833 | #endif |
| 834 | |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 835 | #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61) || \ |
| 836 | defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61_MODULE) |
| 837 | static struct platform_device adau1761_device = { |
| 838 | .name = "bfin-eval-adau1x61", |
| 839 | }; |
| 840 | #endif |
| 841 | |
| 842 | #if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE) |
| 843 | #include <sound/adau17x1.h> |
| 844 | static struct adau1761_platform_data adau1761_info = { |
| 845 | .lineout_mode = ADAU1761_OUTPUT_MODE_LINE, |
| 846 | .headphone_mode = ADAU1761_OUTPUT_MODE_HEADPHONE_CAPLESS, |
| 847 | }; |
| 848 | #endif |
| 849 | |
| 850 | #if defined(CONFIG_VIDEO_BLACKFIN_CAPTURE) \ |
| 851 | || defined(CONFIG_VIDEO_BLACKFIN_CAPTURE_MODULE) |
| 852 | #include <linux/videodev2.h> |
| 853 | #include <media/blackfin/bfin_capture.h> |
| 854 | #include <media/blackfin/ppi.h> |
| 855 | |
| 856 | static const unsigned short ppi_req[] = { |
| 857 | P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3, |
| 858 | P_PPI0_D4, P_PPI0_D5, P_PPI0_D6, P_PPI0_D7, |
Scott Jiang | 338881a | 2012-06-01 12:06:25 -0400 | [diff] [blame] | 859 | P_PPI0_D8, P_PPI0_D9, P_PPI0_D10, P_PPI0_D11, |
| 860 | P_PPI0_D12, P_PPI0_D13, P_PPI0_D14, P_PPI0_D15, |
Vivi Li | 00afdbb | 2012-07-04 14:20:33 +0800 | [diff] [blame] | 861 | #if !defined(CONFIG_VIDEO_VS6624) && !defined(CONFIG_VIDEO_VS6624_MODULE) |
Scott Jiang | 338881a | 2012-06-01 12:06:25 -0400 | [diff] [blame] | 862 | P_PPI0_D16, P_PPI0_D17, P_PPI0_D18, P_PPI0_D19, |
| 863 | P_PPI0_D20, P_PPI0_D21, P_PPI0_D22, P_PPI0_D23, |
Vivi Li | 00afdbb | 2012-07-04 14:20:33 +0800 | [diff] [blame] | 864 | #endif |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 865 | P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2, |
| 866 | 0, |
| 867 | }; |
| 868 | |
| 869 | static const struct ppi_info ppi_info = { |
| 870 | .type = PPI_TYPE_EPPI3, |
| 871 | .dma_ch = CH_EPPI0_CH0, |
| 872 | .irq_err = IRQ_EPPI0_STAT, |
| 873 | .base = (void __iomem *)EPPI0_STAT, |
| 874 | .pin_req = ppi_req, |
| 875 | }; |
| 876 | |
| 877 | #if defined(CONFIG_VIDEO_VS6624) \ |
| 878 | || defined(CONFIG_VIDEO_VS6624_MODULE) |
| 879 | static struct v4l2_input vs6624_inputs[] = { |
| 880 | { |
| 881 | .index = 0, |
| 882 | .name = "Camera", |
| 883 | .type = V4L2_INPUT_TYPE_CAMERA, |
| 884 | .std = V4L2_STD_UNKNOWN, |
| 885 | }, |
| 886 | }; |
| 887 | |
| 888 | static struct bcap_route vs6624_routes[] = { |
| 889 | { |
| 890 | .input = 0, |
| 891 | .output = 0, |
| 892 | }, |
| 893 | }; |
| 894 | |
Vivi Li | 00afdbb | 2012-07-04 14:20:33 +0800 | [diff] [blame] | 895 | static const unsigned vs6624_ce_pin = GPIO_PE4; |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 896 | |
| 897 | static struct bfin_capture_config bfin_capture_data = { |
| 898 | .card_name = "BF609", |
| 899 | .inputs = vs6624_inputs, |
| 900 | .num_inputs = ARRAY_SIZE(vs6624_inputs), |
| 901 | .routes = vs6624_routes, |
| 902 | .i2c_adapter_id = 0, |
| 903 | .board_info = { |
| 904 | .type = "vs6624", |
| 905 | .addr = 0x10, |
| 906 | .platform_data = (void *)&vs6624_ce_pin, |
| 907 | }, |
| 908 | .ppi_info = &ppi_info, |
| 909 | .ppi_control = (PACK_EN | DLEN_8 | EPPI_CTL_FS1HI_FS2HI |
| 910 | | EPPI_CTL_POLC3 | EPPI_CTL_SYNC2 | EPPI_CTL_NON656), |
Scott Jiang | ac5bb893 | 2012-06-20 18:32:11 -0400 | [diff] [blame] | 911 | .blank_pixels = 4, |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 912 | }; |
| 913 | #endif |
| 914 | |
Scott Jiang | 338881a | 2012-06-01 12:06:25 -0400 | [diff] [blame] | 915 | #if defined(CONFIG_VIDEO_ADV7842) \ |
| 916 | || defined(CONFIG_VIDEO_ADV7842_MODULE) |
| 917 | #include <media/adv7842.h> |
| 918 | |
| 919 | static struct v4l2_input adv7842_inputs[] = { |
| 920 | { |
| 921 | .index = 0, |
| 922 | .name = "Composite", |
| 923 | .type = V4L2_INPUT_TYPE_CAMERA, |
| 924 | .std = V4L2_STD_ALL, |
Scott Jiang | 688da5e | 2012-06-14 18:23:08 -0400 | [diff] [blame] | 925 | .capabilities = V4L2_IN_CAP_STD, |
Scott Jiang | 338881a | 2012-06-01 12:06:25 -0400 | [diff] [blame] | 926 | }, |
| 927 | { |
| 928 | .index = 1, |
| 929 | .name = "S-Video", |
| 930 | .type = V4L2_INPUT_TYPE_CAMERA, |
| 931 | .std = V4L2_STD_ALL, |
Scott Jiang | 688da5e | 2012-06-14 18:23:08 -0400 | [diff] [blame] | 932 | .capabilities = V4L2_IN_CAP_STD, |
Scott Jiang | 338881a | 2012-06-01 12:06:25 -0400 | [diff] [blame] | 933 | }, |
| 934 | { |
| 935 | .index = 2, |
| 936 | .name = "Component", |
| 937 | .type = V4L2_INPUT_TYPE_CAMERA, |
Hans Verkuil | a8451ed | 2013-02-15 15:12:01 -0300 | [diff] [blame] | 938 | .capabilities = V4L2_IN_CAP_DV_TIMINGS, |
Scott Jiang | 338881a | 2012-06-01 12:06:25 -0400 | [diff] [blame] | 939 | }, |
| 940 | { |
| 941 | .index = 3, |
| 942 | .name = "VGA", |
| 943 | .type = V4L2_INPUT_TYPE_CAMERA, |
Hans Verkuil | a8451ed | 2013-02-15 15:12:01 -0300 | [diff] [blame] | 944 | .capabilities = V4L2_IN_CAP_DV_TIMINGS, |
Scott Jiang | 338881a | 2012-06-01 12:06:25 -0400 | [diff] [blame] | 945 | }, |
| 946 | { |
| 947 | .index = 4, |
| 948 | .name = "HDMI", |
| 949 | .type = V4L2_INPUT_TYPE_CAMERA, |
Hans Verkuil | a8451ed | 2013-02-15 15:12:01 -0300 | [diff] [blame] | 950 | .capabilities = V4L2_IN_CAP_DV_TIMINGS, |
Scott Jiang | 338881a | 2012-06-01 12:06:25 -0400 | [diff] [blame] | 951 | }, |
| 952 | }; |
| 953 | |
| 954 | static struct bcap_route adv7842_routes[] = { |
| 955 | { |
| 956 | .input = 3, |
Scott Jiang | b5c00ae | 2012-06-08 14:22:36 -0400 | [diff] [blame] | 957 | .output = 0, |
Scott Jiang | 688da5e | 2012-06-14 18:23:08 -0400 | [diff] [blame] | 958 | .ppi_control = (PACK_EN | DLEN_8 | EPPI_CTL_FLDSEL |
| 959 | | EPPI_CTL_ACTIVE656), |
Scott Jiang | 338881a | 2012-06-01 12:06:25 -0400 | [diff] [blame] | 960 | }, |
| 961 | { |
| 962 | .input = 4, |
Scott Jiang | b5c00ae | 2012-06-08 14:22:36 -0400 | [diff] [blame] | 963 | .output = 0, |
Scott Jiang | 338881a | 2012-06-01 12:06:25 -0400 | [diff] [blame] | 964 | }, |
| 965 | { |
| 966 | .input = 2, |
Scott Jiang | b5c00ae | 2012-06-08 14:22:36 -0400 | [diff] [blame] | 967 | .output = 0, |
Scott Jiang | 338881a | 2012-06-01 12:06:25 -0400 | [diff] [blame] | 968 | }, |
| 969 | { |
| 970 | .input = 1, |
Scott Jiang | b5c00ae | 2012-06-08 14:22:36 -0400 | [diff] [blame] | 971 | .output = 0, |
Scott Jiang | 338881a | 2012-06-01 12:06:25 -0400 | [diff] [blame] | 972 | }, |
| 973 | { |
| 974 | .input = 0, |
Scott Jiang | 688da5e | 2012-06-14 18:23:08 -0400 | [diff] [blame] | 975 | .output = 1, |
| 976 | .ppi_control = (EPPI_CTL_SPLTWRD | PACK_EN | DLEN_16 |
| 977 | | EPPI_CTL_FS1LO_FS2LO | EPPI_CTL_POLC2 |
| 978 | | EPPI_CTL_SYNC2 | EPPI_CTL_NON656), |
Scott Jiang | b5c00ae | 2012-06-08 14:22:36 -0400 | [diff] [blame] | 979 | }, |
| 980 | }; |
| 981 | |
| 982 | static struct adv7842_output_format adv7842_opf[] = { |
| 983 | { |
| 984 | .op_ch_sel = ADV7842_OP_CH_SEL_BRG, |
| 985 | .op_format_sel = ADV7842_OP_FORMAT_SEL_SDR_ITU656_8, |
| 986 | .op_656_range = 1, |
| 987 | .blank_data = 1, |
| 988 | .insert_av_codes = 1, |
Scott Jiang | 338881a | 2012-06-01 12:06:25 -0400 | [diff] [blame] | 989 | }, |
Scott Jiang | 688da5e | 2012-06-14 18:23:08 -0400 | [diff] [blame] | 990 | { |
| 991 | .op_ch_sel = ADV7842_OP_CH_SEL_RGB, |
| 992 | .op_format_sel = ADV7842_OP_FORMAT_SEL_SDR_ITU656_16, |
| 993 | .op_656_range = 1, |
| 994 | .blank_data = 1, |
| 995 | }, |
Scott Jiang | 338881a | 2012-06-01 12:06:25 -0400 | [diff] [blame] | 996 | }; |
| 997 | |
| 998 | static struct adv7842_platform_data adv7842_data = { |
Scott Jiang | b5c00ae | 2012-06-08 14:22:36 -0400 | [diff] [blame] | 999 | .opf = adv7842_opf, |
| 1000 | .num_opf = ARRAY_SIZE(adv7842_opf), |
Scott Jiang | 338881a | 2012-06-01 12:06:25 -0400 | [diff] [blame] | 1001 | .ain_sel = ADV7842_AIN10_11_12_NC_SYNC_4_1, |
Scott Jiang | 338881a | 2012-06-01 12:06:25 -0400 | [diff] [blame] | 1002 | .prim_mode = ADV7842_PRIM_MODE_SDP, |
| 1003 | .vid_std_select = ADV7842_SDP_VID_STD_CVBS_SD_4x1, |
| 1004 | .inp_color_space = ADV7842_INP_COLOR_SPACE_AUTO, |
Scott Jiang | e942d61 | 2012-07-13 17:43:33 -0400 | [diff] [blame] | 1005 | .i2c_sdp_io = 0x40, |
| 1006 | .i2c_sdp = 0x41, |
| 1007 | .i2c_cp = 0x42, |
| 1008 | .i2c_vdp = 0x43, |
| 1009 | .i2c_afe = 0x44, |
| 1010 | .i2c_hdmi = 0x45, |
| 1011 | .i2c_repeater = 0x46, |
| 1012 | .i2c_edid = 0x47, |
| 1013 | .i2c_infoframe = 0x48, |
| 1014 | .i2c_cec = 0x49, |
| 1015 | .i2c_avlink = 0x4a, |
Scott Jiang | b5c00ae | 2012-06-08 14:22:36 -0400 | [diff] [blame] | 1016 | .i2c_ex = 0x26, |
Scott Jiang | 338881a | 2012-06-01 12:06:25 -0400 | [diff] [blame] | 1017 | }; |
| 1018 | |
| 1019 | static struct bfin_capture_config bfin_capture_data = { |
| 1020 | .card_name = "BF609", |
| 1021 | .inputs = adv7842_inputs, |
| 1022 | .num_inputs = ARRAY_SIZE(adv7842_inputs), |
| 1023 | .routes = adv7842_routes, |
| 1024 | .i2c_adapter_id = 0, |
| 1025 | .board_info = { |
| 1026 | .type = "adv7842", |
| 1027 | .addr = 0x20, |
| 1028 | .platform_data = (void *)&adv7842_data, |
| 1029 | }, |
| 1030 | .ppi_info = &ppi_info, |
| 1031 | .ppi_control = (PACK_EN | DLEN_8 | EPPI_CTL_FLDSEL |
| 1032 | | EPPI_CTL_ACTIVE656), |
| 1033 | }; |
| 1034 | #endif |
| 1035 | |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 1036 | static struct platform_device bfin_capture_device = { |
| 1037 | .name = "bfin_capture", |
| 1038 | .dev = { |
| 1039 | .platform_data = &bfin_capture_data, |
| 1040 | }, |
| 1041 | }; |
| 1042 | #endif |
| 1043 | |
Scott Jiang | e942d61 | 2012-07-13 17:43:33 -0400 | [diff] [blame] | 1044 | #if defined(CONFIG_VIDEO_BLACKFIN_DISPLAY) \ |
| 1045 | || defined(CONFIG_VIDEO_BLACKFIN_DISPLAY_MODULE) |
| 1046 | #include <linux/videodev2.h> |
| 1047 | #include <media/blackfin/bfin_display.h> |
| 1048 | #include <media/blackfin/ppi.h> |
| 1049 | |
| 1050 | static const unsigned short ppi_req_disp[] = { |
| 1051 | P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3, |
| 1052 | P_PPI0_D4, P_PPI0_D5, P_PPI0_D6, P_PPI0_D7, |
| 1053 | P_PPI0_D8, P_PPI0_D9, P_PPI0_D10, P_PPI0_D11, |
| 1054 | P_PPI0_D12, P_PPI0_D13, P_PPI0_D14, P_PPI0_D15, |
| 1055 | P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2, |
| 1056 | 0, |
| 1057 | }; |
| 1058 | |
| 1059 | static const struct ppi_info ppi_info = { |
| 1060 | .type = PPI_TYPE_EPPI3, |
| 1061 | .dma_ch = CH_EPPI0_CH0, |
| 1062 | .irq_err = IRQ_EPPI0_STAT, |
| 1063 | .base = (void __iomem *)EPPI0_STAT, |
| 1064 | .pin_req = ppi_req_disp, |
| 1065 | }; |
| 1066 | |
| 1067 | #if defined(CONFIG_VIDEO_ADV7511) \ |
| 1068 | || defined(CONFIG_VIDEO_ADV7511_MODULE) |
| 1069 | #include <media/adv7511.h> |
| 1070 | |
| 1071 | static struct v4l2_output adv7511_outputs[] = { |
| 1072 | { |
| 1073 | .index = 0, |
| 1074 | .name = "HDMI", |
| 1075 | .type = V4L2_INPUT_TYPE_CAMERA, |
Hans Verkuil | a8451ed | 2013-02-15 15:12:01 -0300 | [diff] [blame] | 1076 | .capabilities = V4L2_OUT_CAP_DV_TIMINGS, |
Scott Jiang | e942d61 | 2012-07-13 17:43:33 -0400 | [diff] [blame] | 1077 | }, |
| 1078 | }; |
| 1079 | |
| 1080 | static struct disp_route adv7511_routes[] = { |
| 1081 | { |
| 1082 | .output = 0, |
| 1083 | }, |
| 1084 | }; |
| 1085 | |
| 1086 | static struct adv7511_platform_data adv7511_data = { |
| 1087 | .edid_addr = 0x7e, |
| 1088 | .i2c_ex = 0x25, |
| 1089 | }; |
| 1090 | |
| 1091 | static struct bfin_display_config bfin_display_data = { |
| 1092 | .card_name = "BF609", |
| 1093 | .outputs = adv7511_outputs, |
| 1094 | .num_outputs = ARRAY_SIZE(adv7511_outputs), |
| 1095 | .routes = adv7511_routes, |
| 1096 | .i2c_adapter_id = 0, |
| 1097 | .board_info = { |
| 1098 | .type = "adv7511", |
| 1099 | .addr = 0x39, |
| 1100 | .platform_data = (void *)&adv7511_data, |
| 1101 | }, |
| 1102 | .ppi_info = &ppi_info, |
| 1103 | .ppi_control = (EPPI_CTL_SPLTWRD | PACK_EN | DLEN_16 |
| 1104 | | EPPI_CTL_FS1LO_FS2LO | EPPI_CTL_POLC3 |
| 1105 | | EPPI_CTL_IFSGEN | EPPI_CTL_SYNC2 |
| 1106 | | EPPI_CTL_NON656 | EPPI_CTL_DIR), |
| 1107 | }; |
| 1108 | #endif |
| 1109 | |
| 1110 | static struct platform_device bfin_display_device = { |
| 1111 | .name = "bfin_display", |
| 1112 | .dev = { |
| 1113 | .platform_data = &bfin_display_data, |
| 1114 | }, |
| 1115 | }; |
| 1116 | #endif |
| 1117 | |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 1118 | #if defined(CONFIG_BFIN_CRC) |
| 1119 | #define BFIN_CRC_NAME "bfin-crc" |
| 1120 | |
| 1121 | static struct resource bfin_crc0_resources[] = { |
| 1122 | { |
| 1123 | .start = REG_CRC0_CTL, |
| 1124 | .end = REG_CRC0_REVID+4, |
| 1125 | .flags = IORESOURCE_MEM, |
| 1126 | }, |
| 1127 | { |
| 1128 | .start = IRQ_CRC0_DCNTEXP, |
| 1129 | .end = IRQ_CRC0_DCNTEXP, |
| 1130 | .flags = IORESOURCE_IRQ, |
| 1131 | }, |
| 1132 | { |
| 1133 | .start = CH_MEM_STREAM0_SRC_CRC0, |
| 1134 | .end = CH_MEM_STREAM0_SRC_CRC0, |
| 1135 | .flags = IORESOURCE_DMA, |
| 1136 | }, |
| 1137 | { |
| 1138 | .start = CH_MEM_STREAM0_DEST_CRC0, |
| 1139 | .end = CH_MEM_STREAM0_DEST_CRC0, |
| 1140 | .flags = IORESOURCE_DMA, |
| 1141 | }, |
| 1142 | }; |
| 1143 | |
| 1144 | static struct platform_device bfin_crc0_device = { |
| 1145 | .name = BFIN_CRC_NAME, |
| 1146 | .id = 0, |
| 1147 | .num_resources = ARRAY_SIZE(bfin_crc0_resources), |
| 1148 | .resource = bfin_crc0_resources, |
| 1149 | }; |
| 1150 | |
| 1151 | static struct resource bfin_crc1_resources[] = { |
| 1152 | { |
| 1153 | .start = REG_CRC1_CTL, |
| 1154 | .end = REG_CRC1_REVID+4, |
| 1155 | .flags = IORESOURCE_MEM, |
| 1156 | }, |
| 1157 | { |
| 1158 | .start = IRQ_CRC1_DCNTEXP, |
| 1159 | .end = IRQ_CRC1_DCNTEXP, |
| 1160 | .flags = IORESOURCE_IRQ, |
| 1161 | }, |
| 1162 | { |
| 1163 | .start = CH_MEM_STREAM1_SRC_CRC1, |
| 1164 | .end = CH_MEM_STREAM1_SRC_CRC1, |
| 1165 | .flags = IORESOURCE_DMA, |
| 1166 | }, |
| 1167 | { |
| 1168 | .start = CH_MEM_STREAM1_DEST_CRC1, |
| 1169 | .end = CH_MEM_STREAM1_DEST_CRC1, |
| 1170 | .flags = IORESOURCE_DMA, |
| 1171 | }, |
| 1172 | }; |
| 1173 | |
| 1174 | static struct platform_device bfin_crc1_device = { |
| 1175 | .name = BFIN_CRC_NAME, |
| 1176 | .id = 1, |
| 1177 | .num_resources = ARRAY_SIZE(bfin_crc1_resources), |
| 1178 | .resource = bfin_crc1_resources, |
| 1179 | }; |
| 1180 | #endif |
| 1181 | |
Sonic Zhang | c21e783 | 2012-05-22 18:25:57 +0800 | [diff] [blame] | 1182 | #if defined(CONFIG_CRYPTO_DEV_BFIN_CRC) |
| 1183 | #define BFIN_CRYPTO_CRC_NAME "bfin-hmac-crc" |
| 1184 | #define BFIN_CRYPTO_CRC_POLY_DATA 0x5c5c5c5c |
| 1185 | |
| 1186 | static struct resource bfin_crypto_crc_resources[] = { |
| 1187 | { |
| 1188 | .start = REG_CRC0_CTL, |
| 1189 | .end = REG_CRC0_REVID+4, |
| 1190 | .flags = IORESOURCE_MEM, |
| 1191 | }, |
| 1192 | { |
| 1193 | .start = IRQ_CRC0_DCNTEXP, |
| 1194 | .end = IRQ_CRC0_DCNTEXP, |
| 1195 | .flags = IORESOURCE_IRQ, |
| 1196 | }, |
| 1197 | { |
| 1198 | .start = CH_MEM_STREAM0_SRC_CRC0, |
| 1199 | .end = CH_MEM_STREAM0_SRC_CRC0, |
| 1200 | .flags = IORESOURCE_DMA, |
| 1201 | }, |
Sonic Zhang | c21e783 | 2012-05-22 18:25:57 +0800 | [diff] [blame] | 1202 | }; |
| 1203 | |
| 1204 | static struct platform_device bfin_crypto_crc_device = { |
| 1205 | .name = BFIN_CRYPTO_CRC_NAME, |
| 1206 | .id = 0, |
| 1207 | .num_resources = ARRAY_SIZE(bfin_crypto_crc_resources), |
| 1208 | .resource = bfin_crypto_crc_resources, |
| 1209 | .dev = { |
| 1210 | .platform_data = (void *)BFIN_CRYPTO_CRC_POLY_DATA, |
| 1211 | }, |
| 1212 | }; |
| 1213 | #endif |
| 1214 | |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 1215 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) |
| 1216 | static const struct ad7877_platform_data bfin_ad7877_ts_info = { |
| 1217 | .model = 7877, |
| 1218 | .vref_delay_usecs = 50, /* internal, no capacitor */ |
| 1219 | .x_plate_ohms = 419, |
| 1220 | .y_plate_ohms = 486, |
| 1221 | .pressure_max = 1000, |
| 1222 | .pressure_min = 0, |
| 1223 | .stopacq_polarity = 1, |
| 1224 | .first_conversion_delay = 3, |
| 1225 | .acquisition_time = 1, |
| 1226 | .averaging = 1, |
| 1227 | .pen_down_acc_interval = 1, |
| 1228 | }; |
| 1229 | #endif |
| 1230 | |
Steven Miao | bbca5c6 | 2012-06-07 15:06:45 +0800 | [diff] [blame] | 1231 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) |
| 1232 | #include <linux/input.h> |
| 1233 | #include <linux/gpio_keys.h> |
| 1234 | |
| 1235 | static struct gpio_keys_button bfin_gpio_keys_table[] = { |
| 1236 | {BTN_0, GPIO_PB10, 1, "gpio-keys: BTN0"}, |
| 1237 | {BTN_1, GPIO_PE1, 1, "gpio-keys: BTN1"}, |
| 1238 | }; |
| 1239 | |
| 1240 | static struct gpio_keys_platform_data bfin_gpio_keys_data = { |
| 1241 | .buttons = bfin_gpio_keys_table, |
| 1242 | .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table), |
| 1243 | }; |
| 1244 | |
| 1245 | static struct platform_device bfin_device_gpiokeys = { |
| 1246 | .name = "gpio-keys", |
| 1247 | .dev = { |
| 1248 | .platform_data = &bfin_gpio_keys_data, |
| 1249 | }, |
| 1250 | }; |
| 1251 | #endif |
| 1252 | |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 1253 | static struct spi_board_info bfin_spi_board_info[] __initdata = { |
| 1254 | #if defined(CONFIG_MTD_M25P80) \ |
| 1255 | || defined(CONFIG_MTD_M25P80_MODULE) |
| 1256 | { |
| 1257 | /* the modalias must be the same as spi device driver name */ |
| 1258 | .modalias = "m25p80", /* Name of spi_driver for this device */ |
| 1259 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ |
| 1260 | .bus_num = 0, /* Framework bus number */ |
| 1261 | .chip_select = 1, /* SPI_SSEL1*/ |
| 1262 | .platform_data = &bfin_spi_flash_data, |
| 1263 | .controller_data = &spi_flash_chip_info, |
| 1264 | .mode = SPI_MODE_3, |
| 1265 | }, |
| 1266 | #endif |
| 1267 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) |
| 1268 | { |
| 1269 | .modalias = "ad7877", |
| 1270 | .platform_data = &bfin_ad7877_ts_info, |
Scott Jiang | 2cdd700 | 2012-05-18 16:13:03 -0400 | [diff] [blame] | 1271 | .irq = IRQ_PD9, |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 1272 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ |
| 1273 | .bus_num = 0, |
Scott Jiang | 2cdd700 | 2012-05-18 16:13:03 -0400 | [diff] [blame] | 1274 | .chip_select = 4, |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 1275 | }, |
| 1276 | #endif |
| 1277 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) |
| 1278 | { |
| 1279 | .modalias = "spidev", |
| 1280 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
| 1281 | .bus_num = 0, |
| 1282 | .chip_select = 1, |
| 1283 | .controller_data = &spidev_chip_info, |
| 1284 | }, |
| 1285 | #endif |
| 1286 | #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE) |
| 1287 | { |
| 1288 | .modalias = "adxl34x", |
| 1289 | .platform_data = &adxl34x_info, |
| 1290 | .irq = IRQ_PC5, |
| 1291 | .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ |
| 1292 | .bus_num = 1, |
| 1293 | .chip_select = 2, |
| 1294 | .mode = SPI_MODE_3, |
| 1295 | }, |
| 1296 | #endif |
| 1297 | }; |
Scott Jiang | 5e50175 | 2013-07-03 16:48:19 +0800 | [diff] [blame] | 1298 | #if IS_ENABLED(CONFIG_SPI_BFIN_V3) |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 1299 | /* SPI (0) */ |
| 1300 | static struct resource bfin_spi0_resource[] = { |
| 1301 | { |
| 1302 | .start = SPI0_REGBASE, |
| 1303 | .end = SPI0_REGBASE + 0xFF, |
| 1304 | .flags = IORESOURCE_MEM, |
| 1305 | }, |
| 1306 | { |
| 1307 | .start = CH_SPI0_TX, |
| 1308 | .end = CH_SPI0_TX, |
| 1309 | .flags = IORESOURCE_DMA, |
| 1310 | }, |
| 1311 | { |
| 1312 | .start = CH_SPI0_RX, |
| 1313 | .end = CH_SPI0_RX, |
| 1314 | .flags = IORESOURCE_DMA, |
| 1315 | }, |
| 1316 | }; |
| 1317 | |
| 1318 | /* SPI (1) */ |
| 1319 | static struct resource bfin_spi1_resource[] = { |
| 1320 | { |
| 1321 | .start = SPI1_REGBASE, |
| 1322 | .end = SPI1_REGBASE + 0xFF, |
| 1323 | .flags = IORESOURCE_MEM, |
| 1324 | }, |
| 1325 | { |
| 1326 | .start = CH_SPI1_TX, |
| 1327 | .end = CH_SPI1_TX, |
| 1328 | .flags = IORESOURCE_DMA, |
| 1329 | }, |
| 1330 | { |
| 1331 | .start = CH_SPI1_RX, |
| 1332 | .end = CH_SPI1_RX, |
| 1333 | .flags = IORESOURCE_DMA, |
| 1334 | }, |
| 1335 | |
| 1336 | }; |
| 1337 | |
| 1338 | /* SPI controller data */ |
Scott Jiang | 5e50175 | 2013-07-03 16:48:19 +0800 | [diff] [blame] | 1339 | static struct bfin_spi3_master bf60x_spi_master_info0 = { |
Scott Jiang | 2cdd700 | 2012-05-18 16:13:03 -0400 | [diff] [blame] | 1340 | .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS, |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 1341 | .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, |
| 1342 | }; |
| 1343 | |
| 1344 | static struct platform_device bf60x_spi_master0 = { |
Scott Jiang | 5e50175 | 2013-07-03 16:48:19 +0800 | [diff] [blame] | 1345 | .name = "bfin-spi3", |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 1346 | .id = 0, /* Bus number */ |
| 1347 | .num_resources = ARRAY_SIZE(bfin_spi0_resource), |
| 1348 | .resource = bfin_spi0_resource, |
| 1349 | .dev = { |
| 1350 | .platform_data = &bf60x_spi_master_info0, /* Passed to driver */ |
| 1351 | }, |
| 1352 | }; |
| 1353 | |
Scott Jiang | 5e50175 | 2013-07-03 16:48:19 +0800 | [diff] [blame] | 1354 | static struct bfin_spi3_master bf60x_spi_master_info1 = { |
Scott Jiang | 2cdd700 | 2012-05-18 16:13:03 -0400 | [diff] [blame] | 1355 | .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS, |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 1356 | .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0}, |
| 1357 | }; |
| 1358 | |
| 1359 | static struct platform_device bf60x_spi_master1 = { |
Scott Jiang | 5e50175 | 2013-07-03 16:48:19 +0800 | [diff] [blame] | 1360 | .name = "bfin-spi3", |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 1361 | .id = 1, /* Bus number */ |
| 1362 | .num_resources = ARRAY_SIZE(bfin_spi1_resource), |
| 1363 | .resource = bfin_spi1_resource, |
| 1364 | .dev = { |
| 1365 | .platform_data = &bf60x_spi_master_info1, /* Passed to driver */ |
| 1366 | }, |
| 1367 | }; |
| 1368 | #endif /* spi master and devices */ |
| 1369 | |
| 1370 | #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) |
Sonic Zhang | cf93feb | 2012-05-15 15:25:50 +0800 | [diff] [blame] | 1371 | static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0}; |
| 1372 | |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 1373 | static struct resource bfin_twi0_resource[] = { |
| 1374 | [0] = { |
| 1375 | .start = TWI0_CLKDIV, |
| 1376 | .end = TWI0_CLKDIV + 0xFF, |
| 1377 | .flags = IORESOURCE_MEM, |
| 1378 | }, |
| 1379 | [1] = { |
| 1380 | .start = IRQ_TWI0, |
| 1381 | .end = IRQ_TWI0, |
| 1382 | .flags = IORESOURCE_IRQ, |
| 1383 | }, |
| 1384 | }; |
| 1385 | |
| 1386 | static struct platform_device i2c_bfin_twi0_device = { |
| 1387 | .name = "i2c-bfin-twi", |
| 1388 | .id = 0, |
| 1389 | .num_resources = ARRAY_SIZE(bfin_twi0_resource), |
| 1390 | .resource = bfin_twi0_resource, |
Sonic Zhang | cf93feb | 2012-05-15 15:25:50 +0800 | [diff] [blame] | 1391 | .dev = { |
| 1392 | .platform_data = &bfin_twi0_pins, |
| 1393 | }, |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 1394 | }; |
| 1395 | |
Sonic Zhang | cf93feb | 2012-05-15 15:25:50 +0800 | [diff] [blame] | 1396 | static const u16 bfin_twi1_pins[] = {P_TWI1_SCL, P_TWI1_SDA, 0}; |
| 1397 | |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 1398 | static struct resource bfin_twi1_resource[] = { |
| 1399 | [0] = { |
| 1400 | .start = TWI1_CLKDIV, |
| 1401 | .end = TWI1_CLKDIV + 0xFF, |
| 1402 | .flags = IORESOURCE_MEM, |
| 1403 | }, |
| 1404 | [1] = { |
| 1405 | .start = IRQ_TWI1, |
| 1406 | .end = IRQ_TWI1, |
| 1407 | .flags = IORESOURCE_IRQ, |
| 1408 | }, |
| 1409 | }; |
| 1410 | |
| 1411 | static struct platform_device i2c_bfin_twi1_device = { |
| 1412 | .name = "i2c-bfin-twi", |
| 1413 | .id = 1, |
| 1414 | .num_resources = ARRAY_SIZE(bfin_twi1_resource), |
| 1415 | .resource = bfin_twi1_resource, |
Sonic Zhang | cf93feb | 2012-05-15 15:25:50 +0800 | [diff] [blame] | 1416 | .dev = { |
| 1417 | .platform_data = &bfin_twi1_pins, |
| 1418 | }, |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 1419 | }; |
| 1420 | #endif |
| 1421 | |
| 1422 | static struct i2c_board_info __initdata bfin_i2c_board_info0[] = { |
| 1423 | #if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE) |
| 1424 | { |
| 1425 | I2C_BOARD_INFO("adxl34x", 0x53), |
| 1426 | .irq = IRQ_PC5, |
| 1427 | .platform_data = (void *)&adxl34x_info, |
| 1428 | }, |
| 1429 | #endif |
| 1430 | #if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE) |
| 1431 | { |
| 1432 | I2C_BOARD_INFO("adau1761", 0x38), |
| 1433 | .platform_data = (void *)&adau1761_info |
| 1434 | }, |
| 1435 | #endif |
Scott Jiang | 335dd55 | 2012-06-01 18:12:52 -0400 | [diff] [blame] | 1436 | #if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE) |
| 1437 | { |
| 1438 | I2C_BOARD_INFO("ssm2602", 0x1b), |
| 1439 | }, |
| 1440 | #endif |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 1441 | }; |
| 1442 | |
| 1443 | static struct i2c_board_info __initdata bfin_i2c_board_info1[] = { |
| 1444 | }; |
| 1445 | |
| 1446 | static const unsigned int cclk_vlev_datasheet[] = |
| 1447 | { |
| 1448 | /* |
| 1449 | * Internal VLEV BF54XSBBC1533 |
| 1450 | ****temporarily using these values until data sheet is updated |
| 1451 | */ |
| 1452 | VRPAIR(VLEV_085, 150000000), |
| 1453 | VRPAIR(VLEV_090, 250000000), |
| 1454 | VRPAIR(VLEV_110, 276000000), |
| 1455 | VRPAIR(VLEV_115, 301000000), |
| 1456 | VRPAIR(VLEV_120, 525000000), |
| 1457 | VRPAIR(VLEV_125, 550000000), |
| 1458 | VRPAIR(VLEV_130, 600000000), |
| 1459 | }; |
| 1460 | |
| 1461 | static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = { |
| 1462 | .tuple_tab = cclk_vlev_datasheet, |
| 1463 | .tabsize = ARRAY_SIZE(cclk_vlev_datasheet), |
| 1464 | .vr_settling_time = 25 /* us */, |
| 1465 | }; |
| 1466 | |
| 1467 | static struct platform_device bfin_dpmc = { |
| 1468 | .name = "bfin dpmc", |
| 1469 | .dev = { |
| 1470 | .platform_data = &bfin_dmpc_vreg_data, |
| 1471 | }, |
| 1472 | }; |
| 1473 | |
| 1474 | static struct platform_device *ezkit_devices[] __initdata = { |
| 1475 | |
| 1476 | &bfin_dpmc, |
| 1477 | |
| 1478 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) |
| 1479 | &rtc_device, |
| 1480 | #endif |
| 1481 | |
| 1482 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) |
| 1483 | #ifdef CONFIG_SERIAL_BFIN_UART0 |
| 1484 | &bfin_uart0_device, |
| 1485 | #endif |
| 1486 | #ifdef CONFIG_SERIAL_BFIN_UART1 |
| 1487 | &bfin_uart1_device, |
| 1488 | #endif |
| 1489 | #endif |
| 1490 | |
| 1491 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) |
| 1492 | #ifdef CONFIG_BFIN_SIR0 |
| 1493 | &bfin_sir0_device, |
| 1494 | #endif |
| 1495 | #ifdef CONFIG_BFIN_SIR1 |
| 1496 | &bfin_sir1_device, |
| 1497 | #endif |
| 1498 | #endif |
| 1499 | |
| 1500 | #if defined(CONFIG_STMMAC_ETH) || defined(CONFIG_STMMAC_ETH_MODULE) |
| 1501 | &bfin_eth_device, |
| 1502 | #endif |
| 1503 | |
| 1504 | #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE) |
| 1505 | &musb_device, |
| 1506 | #endif |
| 1507 | |
| 1508 | #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE) |
| 1509 | &bfin_isp1760_device, |
| 1510 | #endif |
| 1511 | |
| 1512 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) |
| 1513 | #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART |
| 1514 | &bfin_sport0_uart_device, |
| 1515 | #endif |
| 1516 | #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART |
| 1517 | &bfin_sport1_uart_device, |
| 1518 | #endif |
| 1519 | #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART |
| 1520 | &bfin_sport2_uart_device, |
| 1521 | #endif |
| 1522 | #endif |
| 1523 | |
| 1524 | #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE) |
| 1525 | &bfin_can0_device, |
| 1526 | #endif |
| 1527 | |
| 1528 | #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE) |
| 1529 | &bfin_nand_device, |
| 1530 | #endif |
| 1531 | |
| 1532 | #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE) |
| 1533 | &bfin_sdh_device, |
| 1534 | #endif |
| 1535 | |
Scott Jiang | 5e50175 | 2013-07-03 16:48:19 +0800 | [diff] [blame] | 1536 | #if IS_ENABLED(CONFIG_SPI_BFIN_V3) |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 1537 | &bf60x_spi_master0, |
| 1538 | &bf60x_spi_master1, |
| 1539 | #endif |
| 1540 | |
| 1541 | #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE) |
| 1542 | &bfin_rotary_device, |
| 1543 | #endif |
| 1544 | |
| 1545 | #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) |
| 1546 | &i2c_bfin_twi0_device, |
| 1547 | #if !defined(CONFIG_BF542) |
| 1548 | &i2c_bfin_twi1_device, |
| 1549 | #endif |
| 1550 | #endif |
| 1551 | |
| 1552 | #if defined(CONFIG_BFIN_CRC) |
| 1553 | &bfin_crc0_device, |
| 1554 | &bfin_crc1_device, |
| 1555 | #endif |
Sonic Zhang | c21e783 | 2012-05-22 18:25:57 +0800 | [diff] [blame] | 1556 | #if defined(CONFIG_CRYPTO_DEV_BFIN_CRC) |
| 1557 | &bfin_crypto_crc_device, |
| 1558 | #endif |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 1559 | |
| 1560 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) |
| 1561 | &bfin_device_gpiokeys, |
| 1562 | #endif |
| 1563 | |
Bob Liu | 1c40093 | 2012-05-15 13:58:56 +0800 | [diff] [blame] | 1564 | #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 1565 | &ezkit_flash_device, |
| 1566 | #endif |
Scott Jiang | 2984b52 | 2012-06-21 16:50:58 -0400 | [diff] [blame] | 1567 | #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 1568 | &bfin_i2s_pcm, |
| 1569 | #endif |
| 1570 | #if defined(CONFIG_SND_BF6XX_SOC_I2S) || \ |
| 1571 | defined(CONFIG_SND_BF6XX_SOC_I2S_MODULE) |
| 1572 | &bfin_i2s, |
| 1573 | #endif |
Scott Jiang | 63f49dc | 2012-08-10 18:06:09 -0400 | [diff] [blame] | 1574 | #if defined(CONFIG_SND_BF5XX_SOC_AD1836) || \ |
| 1575 | defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE) |
| 1576 | &bfin_ad1836_machine, |
| 1577 | #endif |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 1578 | #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61) || \ |
| 1579 | defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61_MODULE) |
| 1580 | &adau1761_device, |
| 1581 | #endif |
| 1582 | #if defined(CONFIG_VIDEO_BLACKFIN_CAPTURE) \ |
| 1583 | || defined(CONFIG_VIDEO_BLACKFIN_CAPTURE_MODULE) |
| 1584 | &bfin_capture_device, |
| 1585 | #endif |
Scott Jiang | e942d61 | 2012-07-13 17:43:33 -0400 | [diff] [blame] | 1586 | #if defined(CONFIG_VIDEO_BLACKFIN_DISPLAY) \ |
| 1587 | || defined(CONFIG_VIDEO_BLACKFIN_DISPLAY_MODULE) |
| 1588 | &bfin_display_device, |
| 1589 | #endif |
| 1590 | |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 1591 | }; |
| 1592 | |
| 1593 | static int __init ezkit_init(void) |
| 1594 | { |
| 1595 | printk(KERN_INFO "%s(): registering device resources\n", __func__); |
| 1596 | |
| 1597 | i2c_register_board_info(0, bfin_i2c_board_info0, |
| 1598 | ARRAY_SIZE(bfin_i2c_board_info0)); |
| 1599 | i2c_register_board_info(1, bfin_i2c_board_info1, |
| 1600 | ARRAY_SIZE(bfin_i2c_board_info1)); |
| 1601 | |
| 1602 | #if defined(CONFIG_STMMAC_ETH) || defined(CONFIG_STMMAC_ETH_MODULE) |
Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 1603 | if (!peripheral_request_list(pins, "emac0")) |
| 1604 | printk(KERN_ERR "%s(): request emac pins failed\n", __func__); |
| 1605 | #endif |
| 1606 | |
| 1607 | platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices)); |
| 1608 | |
| 1609 | spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); |
| 1610 | |
| 1611 | return 0; |
| 1612 | } |
| 1613 | |
| 1614 | arch_initcall(ezkit_init); |
| 1615 | |
| 1616 | static struct platform_device *ezkit_early_devices[] __initdata = { |
| 1617 | #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK) |
| 1618 | #ifdef CONFIG_SERIAL_BFIN_UART0 |
| 1619 | &bfin_uart0_device, |
| 1620 | #endif |
| 1621 | #ifdef CONFIG_SERIAL_BFIN_UART1 |
| 1622 | &bfin_uart1_device, |
| 1623 | #endif |
| 1624 | #endif |
| 1625 | |
| 1626 | #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE) |
| 1627 | #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART |
| 1628 | &bfin_sport0_uart_device, |
| 1629 | #endif |
| 1630 | #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART |
| 1631 | &bfin_sport1_uart_device, |
| 1632 | #endif |
| 1633 | #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART |
| 1634 | &bfin_sport2_uart_device, |
| 1635 | #endif |
| 1636 | #endif |
| 1637 | }; |
| 1638 | |
| 1639 | void __init native_machine_early_platform_add_devices(void) |
| 1640 | { |
| 1641 | printk(KERN_INFO "register early platform devices\n"); |
| 1642 | early_platform_add_devices(ezkit_early_devices, |
| 1643 | ARRAY_SIZE(ezkit_early_devices)); |
| 1644 | } |