blob: 300f110fd180be1ff4e1c542e12249940a3100ba [file] [log] [blame]
Jesse Barnes79e53942008-11-07 14:24:08 -08001/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28#include <linux/i2c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090029#include <linux/slab.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080030#include <linux/delay.h>
31#include "drmP.h"
32#include "drm.h"
33#include "drm_crtc.h"
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +080034#include "drm_edid.h"
Chris Wilsonea5b2132010-08-04 13:50:23 +010035#include "intel_drv.h"
Jesse Barnes79e53942008-11-07 14:24:08 -080036#include "i915_drm.h"
37#include "i915_drv.h"
38#include "intel_sdvo_regs.h"
39
Zhenyu Wang14571b42010-03-30 14:06:33 +080040#define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41#define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42#define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
43#define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
44
45#define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
46 SDVO_TV_MASK)
47
48#define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
49#define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
Chris Wilson32aad862010-08-04 13:50:25 +010050#define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
Zhenyu Wang14571b42010-03-30 14:06:33 +080051
Jesse Barnes79e53942008-11-07 14:24:08 -080052
Zhao Yakuice6feab2009-08-24 13:50:26 +080053static char *tv_format_names[] = {
54 "NTSC_M" , "NTSC_J" , "NTSC_443",
55 "PAL_B" , "PAL_D" , "PAL_G" ,
56 "PAL_H" , "PAL_I" , "PAL_M" ,
57 "PAL_N" , "PAL_NC" , "PAL_60" ,
58 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
59 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
60 "SECAM_60"
61};
62
63#define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
64
Chris Wilsonea5b2132010-08-04 13:50:23 +010065struct intel_sdvo {
66 struct intel_encoder base;
67
Keith Packardf9c10a92009-05-30 12:16:25 -070068 u8 slave_addr;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080069
70 /* Register for the SDVO device: SDVOB or SDVOC */
Eric Anholtc751ce42010-03-25 11:48:48 -070071 int sdvo_reg;
Jesse Barnes79e53942008-11-07 14:24:08 -080072
Jesse Barnese2f0ba92009-02-02 15:11:52 -080073 /* Active outputs controlled by this SDVO output */
74 uint16_t controlled_output;
Jesse Barnes79e53942008-11-07 14:24:08 -080075
Jesse Barnese2f0ba92009-02-02 15:11:52 -080076 /*
77 * Capabilities of the SDVO device returned by
78 * i830_sdvo_get_capabilities()
79 */
Jesse Barnes79e53942008-11-07 14:24:08 -080080 struct intel_sdvo_caps caps;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080081
82 /* Pixel clock limitations reported by the SDVO device, in kHz */
Jesse Barnes79e53942008-11-07 14:24:08 -080083 int pixel_clock_min, pixel_clock_max;
84
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +080085 /*
86 * For multiple function SDVO device,
87 * this is for current attached outputs.
88 */
89 uint16_t attached_output;
90
Jesse Barnese2f0ba92009-02-02 15:11:52 -080091 /**
92 * This is set if we're going to treat the device as TV-out.
93 *
94 * While we have these nice friendly flags for output types that ought
95 * to decide this for us, the S-Video output on our HDMI+S-Video card
96 * shows up as RGB1 (VGA).
97 */
98 bool is_tv;
99
Zhao Yakuice6feab2009-08-24 13:50:26 +0800100 /* This is for current tv format name */
101 char *tv_format_name;
102
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800103 /**
104 * This is set if we treat the device as HDMI, instead of DVI.
105 */
106 bool is_hdmi;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800107
Ma Ling7086c872009-05-13 11:20:06 +0800108 /**
109 * This is set if we detect output of sdvo device as LVDS.
110 */
111 bool is_lvds;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800112
113 /**
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800114 * This is sdvo flags for input timing.
115 */
116 uint8_t sdvo_flags;
117
118 /**
119 * This is sdvo fixed pannel mode pointer
120 */
121 struct drm_display_mode *sdvo_lvds_fixed_mode;
122
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800123 /*
124 * supported encoding mode, used to determine whether HDMI is
125 * supported
126 */
127 struct intel_sdvo_encode encode;
128
Eric Anholtc751ce42010-03-25 11:48:48 -0700129 /* DDC bus used by this SDVO encoder */
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800130 uint8_t ddc_bus;
131
Keith Packard57cdaf92009-09-04 13:07:54 +0800132 /* Mac mini hack -- use the same DDC as the analog connector */
133 struct i2c_adapter *analog_ddc_bus;
134
Zhenyu Wang14571b42010-03-30 14:06:33 +0800135};
136
137struct intel_sdvo_connector {
Chris Wilson615fb932010-08-04 13:50:24 +0100138 struct intel_connector base;
139
Zhenyu Wang14571b42010-03-30 14:06:33 +0800140 /* Mark the type of connector */
141 uint16_t output_flag;
142
143 /* This contains all current supported TV format */
144 char *tv_format_supported[TV_FORMAT_NUM];
145 int format_supported_num;
146 struct drm_property *tv_format_property;
147 struct drm_property *tv_format_name_property[TV_FORMAT_NUM];
148
149 /**
150 * Returned SDTV resolutions allowed for the current format, if the
151 * device reported it.
152 */
153 struct intel_sdvo_sdtv_resolution_reply sdtv_resolutions;
154
Zhao Yakuib9219c52009-09-10 15:45:46 +0800155 /* add the property for the SDVO-TV */
156 struct drm_property *left_property;
157 struct drm_property *right_property;
158 struct drm_property *top_property;
159 struct drm_property *bottom_property;
160 struct drm_property *hpos_property;
161 struct drm_property *vpos_property;
162
163 /* add the property for the SDVO-TV/LVDS */
164 struct drm_property *brightness_property;
165 struct drm_property *contrast_property;
166 struct drm_property *saturation_property;
167 struct drm_property *hue_property;
168
169 /* Add variable to record current setting for the above property */
170 u32 left_margin, right_margin, top_margin, bottom_margin;
171 /* this is to get the range of margin.*/
172 u32 max_hscan, max_vscan;
173 u32 max_hpos, cur_hpos;
174 u32 max_vpos, cur_vpos;
175 u32 cur_brightness, max_brightness;
176 u32 cur_contrast, max_contrast;
177 u32 cur_saturation, max_saturation;
178 u32 cur_hue, max_hue;
Jesse Barnes79e53942008-11-07 14:24:08 -0800179};
180
Chris Wilsonea5b2132010-08-04 13:50:23 +0100181static struct intel_sdvo *enc_to_intel_sdvo(struct drm_encoder *encoder)
182{
183 return container_of(enc_to_intel_encoder(encoder), struct intel_sdvo, base);
184}
185
Chris Wilson615fb932010-08-04 13:50:24 +0100186static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
187{
188 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
189}
190
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800191static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100192intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
Chris Wilson32aad862010-08-04 13:50:25 +0100193static bool
194intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
195 struct intel_sdvo_connector *intel_sdvo_connector,
196 int type);
197static bool
198intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
199 struct intel_sdvo_connector *intel_sdvo_connector);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800200
Jesse Barnes79e53942008-11-07 14:24:08 -0800201/**
202 * Writes the SDVOB or SDVOC with the given value, but always writes both
203 * SDVOB and SDVOC to work around apparent hardware issues (according to
204 * comments in the BIOS).
205 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100206static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800207{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100208 struct drm_device *dev = intel_sdvo->base.enc.dev;
Jesse Barnes79e53942008-11-07 14:24:08 -0800209 struct drm_i915_private *dev_priv = dev->dev_private;
Jesse Barnes79e53942008-11-07 14:24:08 -0800210 u32 bval = val, cval = val;
211 int i;
212
Chris Wilsonea5b2132010-08-04 13:50:23 +0100213 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
214 I915_WRITE(intel_sdvo->sdvo_reg, val);
215 I915_READ(intel_sdvo->sdvo_reg);
Zhao Yakui461ed3c2010-03-30 15:11:33 +0800216 return;
217 }
218
Chris Wilsonea5b2132010-08-04 13:50:23 +0100219 if (intel_sdvo->sdvo_reg == SDVOB) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800220 cval = I915_READ(SDVOC);
221 } else {
222 bval = I915_READ(SDVOB);
223 }
224 /*
225 * Write the registers twice for luck. Sometimes,
226 * writing them only once doesn't appear to 'stick'.
227 * The BIOS does this too. Yay, magic
228 */
229 for (i = 0; i < 2; i++)
230 {
231 I915_WRITE(SDVOB, bval);
232 I915_READ(SDVOB);
233 I915_WRITE(SDVOC, cval);
234 I915_READ(SDVOC);
235 }
236}
237
Chris Wilson32aad862010-08-04 13:50:25 +0100238static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
Jesse Barnes79e53942008-11-07 14:24:08 -0800239{
Chris Wilson32aad862010-08-04 13:50:25 +0100240 u8 out_buf[2] = { addr, 0 };
Jesse Barnes79e53942008-11-07 14:24:08 -0800241 u8 buf[2];
Jesse Barnes79e53942008-11-07 14:24:08 -0800242 struct i2c_msg msgs[] = {
243 {
Chris Wilsonea5b2132010-08-04 13:50:23 +0100244 .addr = intel_sdvo->slave_addr >> 1,
Jesse Barnes79e53942008-11-07 14:24:08 -0800245 .flags = 0,
246 .len = 1,
247 .buf = out_buf,
248 },
249 {
Chris Wilsonea5b2132010-08-04 13:50:23 +0100250 .addr = intel_sdvo->slave_addr >> 1,
Jesse Barnes79e53942008-11-07 14:24:08 -0800251 .flags = I2C_M_RD,
252 .len = 1,
253 .buf = buf,
254 }
255 };
Chris Wilson32aad862010-08-04 13:50:25 +0100256 int ret;
Jesse Barnes79e53942008-11-07 14:24:08 -0800257
Chris Wilsonea5b2132010-08-04 13:50:23 +0100258 if ((ret = i2c_transfer(intel_sdvo->base.i2c_bus, msgs, 2)) == 2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800259 {
260 *ch = buf[0];
261 return true;
262 }
263
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800264 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
Jesse Barnes79e53942008-11-07 14:24:08 -0800265 return false;
266}
267
Chris Wilson32aad862010-08-04 13:50:25 +0100268static bool intel_sdvo_write_byte(struct intel_sdvo *intel_sdvo, int addr, u8 ch)
Jesse Barnes79e53942008-11-07 14:24:08 -0800269{
Chris Wilson32aad862010-08-04 13:50:25 +0100270 u8 out_buf[2] = { addr, ch };
Jesse Barnes79e53942008-11-07 14:24:08 -0800271 struct i2c_msg msgs[] = {
272 {
Chris Wilsonea5b2132010-08-04 13:50:23 +0100273 .addr = intel_sdvo->slave_addr >> 1,
Jesse Barnes79e53942008-11-07 14:24:08 -0800274 .flags = 0,
275 .len = 2,
276 .buf = out_buf,
277 }
278 };
279
Chris Wilson32aad862010-08-04 13:50:25 +0100280 return i2c_transfer(intel_sdvo->base.i2c_bus, msgs, 1) == 1;
Jesse Barnes79e53942008-11-07 14:24:08 -0800281}
282
283#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
284/** Mapping of command numbers to names, for debug output */
Tobias Klauser005568b2009-02-09 22:02:42 +0100285static const struct _sdvo_cmd_name {
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800286 u8 cmd;
287 char *name;
Jesse Barnes79e53942008-11-07 14:24:08 -0800288} sdvo_cmd_names[] = {
289 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
290 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
291 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
292 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
Jesse Barnes79e53942008-11-07 14:24:08 -0800328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
Zhao Yakuib9219c52009-09-10 15:45:46 +0800332 /* Add the op code for SDVO enhancements */
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_POSITION_H),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POSITION_H),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_POSITION_H),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_POSITION_V),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POSITION_V),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_POSITION_V),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800357 /* HDMI op code */
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
Jesse Barnes79e53942008-11-07 14:24:08 -0800378};
379
Zhao Yakui461ed3c2010-03-30 15:11:33 +0800380#define IS_SDVOB(reg) (reg == SDVOB || reg == PCH_SDVOB)
Chris Wilsonea5b2132010-08-04 13:50:23 +0100381#define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
Jesse Barnes79e53942008-11-07 14:24:08 -0800382
Chris Wilsonea5b2132010-08-04 13:50:23 +0100383static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
Chris Wilson32aad862010-08-04 13:50:25 +0100384 const void *args, int args_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800385{
Jesse Barnes79e53942008-11-07 14:24:08 -0800386 int i;
387
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800388 DRM_DEBUG_KMS("%s: W: %02X ",
Chris Wilsonea5b2132010-08-04 13:50:23 +0100389 SDVO_NAME(intel_sdvo), cmd);
Jesse Barnes79e53942008-11-07 14:24:08 -0800390 for (i = 0; i < args_len; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800391 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800392 for (; i < 8; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800393 DRM_LOG_KMS(" ");
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400394 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800395 if (cmd == sdvo_cmd_names[i].cmd) {
yakui_zhao342dc382009-06-02 14:12:00 +0800396 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
Jesse Barnes79e53942008-11-07 14:24:08 -0800397 break;
398 }
399 }
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400400 if (i == ARRAY_SIZE(sdvo_cmd_names))
yakui_zhao342dc382009-06-02 14:12:00 +0800401 DRM_LOG_KMS("(%02X)", cmd);
402 DRM_LOG_KMS("\n");
Jesse Barnes79e53942008-11-07 14:24:08 -0800403}
Jesse Barnes79e53942008-11-07 14:24:08 -0800404
Chris Wilson32aad862010-08-04 13:50:25 +0100405static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
406 const void *args, int args_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800407{
408 int i;
409
Chris Wilsonea5b2132010-08-04 13:50:23 +0100410 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
Jesse Barnes79e53942008-11-07 14:24:08 -0800411
412 for (i = 0; i < args_len; i++) {
Chris Wilson32aad862010-08-04 13:50:25 +0100413 if (!intel_sdvo_write_byte(intel_sdvo, SDVO_I2C_ARG_0 - i,
414 ((u8*)args)[i]))
415 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -0800416 }
417
Chris Wilson32aad862010-08-04 13:50:25 +0100418 return intel_sdvo_write_byte(intel_sdvo, SDVO_I2C_OPCODE, cmd);
Jesse Barnes79e53942008-11-07 14:24:08 -0800419}
420
Jesse Barnes79e53942008-11-07 14:24:08 -0800421static const char *cmd_status_names[] = {
422 "Power on",
423 "Success",
424 "Not supported",
425 "Invalid arg",
426 "Pending",
427 "Target not specified",
428 "Scaling not supported"
429};
430
Chris Wilsonea5b2132010-08-04 13:50:23 +0100431static void intel_sdvo_debug_response(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800432 void *response, int response_len,
433 u8 status)
434{
Zhenyu Wang33b52962009-03-24 14:02:40 +0800435 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -0800436
Chris Wilsonea5b2132010-08-04 13:50:23 +0100437 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -0800438 for (i = 0; i < response_len; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800439 DRM_LOG_KMS("%02X ", ((u8 *)response)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800440 for (; i < 8; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800441 DRM_LOG_KMS(" ");
Jesse Barnes79e53942008-11-07 14:24:08 -0800442 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
yakui_zhao342dc382009-06-02 14:12:00 +0800443 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800444 else
yakui_zhao342dc382009-06-02 14:12:00 +0800445 DRM_LOG_KMS("(??? %d)", status);
446 DRM_LOG_KMS("\n");
Jesse Barnes79e53942008-11-07 14:24:08 -0800447}
Jesse Barnes79e53942008-11-07 14:24:08 -0800448
Chris Wilson32aad862010-08-04 13:50:25 +0100449static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
450 void *response, int response_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800451{
452 int i;
453 u8 status;
454 u8 retry = 50;
455
456 while (retry--) {
457 /* Read the command response */
458 for (i = 0; i < response_len; i++) {
Chris Wilson32aad862010-08-04 13:50:25 +0100459 if (!intel_sdvo_read_byte(intel_sdvo,
460 SDVO_I2C_RETURN_0 + i,
461 &((u8 *)response)[i]))
462 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -0800463 }
464
465 /* read the return status */
Chris Wilson32aad862010-08-04 13:50:25 +0100466 if (!intel_sdvo_read_byte(intel_sdvo, SDVO_I2C_CMD_STATUS,
467 &status))
468 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -0800469
Chris Wilsonea5b2132010-08-04 13:50:23 +0100470 intel_sdvo_debug_response(intel_sdvo, response, response_len,
Jesse Barnes79e53942008-11-07 14:24:08 -0800471 status);
472 if (status != SDVO_CMD_STATUS_PENDING)
Chris Wilson32aad862010-08-04 13:50:25 +0100473 break;
Jesse Barnes79e53942008-11-07 14:24:08 -0800474
475 mdelay(50);
476 }
477
Chris Wilson32aad862010-08-04 13:50:25 +0100478 return status == SDVO_CMD_STATUS_SUCCESS;
Jesse Barnes79e53942008-11-07 14:24:08 -0800479}
480
Hannes Ederb358d0a2008-12-18 21:18:47 +0100481static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800482{
483 if (mode->clock >= 100000)
484 return 1;
485 else if (mode->clock >= 50000)
486 return 2;
487 else
488 return 4;
489}
490
491/**
Zhao Yakui6a304ca2010-01-08 10:58:19 +0800492 * Try to read the response after issuie the DDC switch command. But it
493 * is noted that we must do the action of reading response and issuing DDC
494 * switch command in one I2C transaction. Otherwise when we try to start
495 * another I2C transaction after issuing the DDC bus switch, it will be
496 * switched to the internal SDVO register.
Jesse Barnes79e53942008-11-07 14:24:08 -0800497 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100498static void intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
Hannes Ederb358d0a2008-12-18 21:18:47 +0100499 u8 target)
Jesse Barnes79e53942008-11-07 14:24:08 -0800500{
Zhao Yakui6a304ca2010-01-08 10:58:19 +0800501 u8 out_buf[2], cmd_buf[2], ret_value[2], ret;
502 struct i2c_msg msgs[] = {
503 {
Chris Wilsonea5b2132010-08-04 13:50:23 +0100504 .addr = intel_sdvo->slave_addr >> 1,
Zhao Yakui6a304ca2010-01-08 10:58:19 +0800505 .flags = 0,
506 .len = 2,
507 .buf = out_buf,
508 },
509 /* the following two are to read the response */
510 {
Chris Wilsonea5b2132010-08-04 13:50:23 +0100511 .addr = intel_sdvo->slave_addr >> 1,
Zhao Yakui6a304ca2010-01-08 10:58:19 +0800512 .flags = 0,
513 .len = 1,
514 .buf = cmd_buf,
515 },
516 {
Chris Wilsonea5b2132010-08-04 13:50:23 +0100517 .addr = intel_sdvo->slave_addr >> 1,
Zhao Yakui6a304ca2010-01-08 10:58:19 +0800518 .flags = I2C_M_RD,
519 .len = 1,
520 .buf = ret_value,
521 },
522 };
523
Chris Wilsonea5b2132010-08-04 13:50:23 +0100524 intel_sdvo_debug_write(intel_sdvo, SDVO_CMD_SET_CONTROL_BUS_SWITCH,
Zhao Yakui6a304ca2010-01-08 10:58:19 +0800525 &target, 1);
526 /* write the DDC switch command argument */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100527 intel_sdvo_write_byte(intel_sdvo, SDVO_I2C_ARG_0, target);
Zhao Yakui6a304ca2010-01-08 10:58:19 +0800528
529 out_buf[0] = SDVO_I2C_OPCODE;
530 out_buf[1] = SDVO_CMD_SET_CONTROL_BUS_SWITCH;
531 cmd_buf[0] = SDVO_I2C_CMD_STATUS;
532 cmd_buf[1] = 0;
533 ret_value[0] = 0;
534 ret_value[1] = 0;
535
Chris Wilsonea5b2132010-08-04 13:50:23 +0100536 ret = i2c_transfer(intel_sdvo->base.i2c_bus, msgs, 3);
Zhao Yakui6a304ca2010-01-08 10:58:19 +0800537 if (ret != 3) {
538 /* failure in I2C transfer */
539 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
540 return;
541 }
542 if (ret_value[0] != SDVO_CMD_STATUS_SUCCESS) {
543 DRM_DEBUG_KMS("DDC switch command returns response %d\n",
544 ret_value[0]);
545 return;
546 }
547 return;
Jesse Barnes79e53942008-11-07 14:24:08 -0800548}
549
Chris Wilson32aad862010-08-04 13:50:25 +0100550static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
551{
552 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
553 return false;
554
555 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
556}
557
558static bool
559intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
560{
561 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
562 return false;
563
564 return intel_sdvo_read_response(intel_sdvo, value, len);
565}
566
567static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
Jesse Barnes79e53942008-11-07 14:24:08 -0800568{
569 struct intel_sdvo_set_target_input_args targets = {0};
Chris Wilson32aad862010-08-04 13:50:25 +0100570 return intel_sdvo_set_value(intel_sdvo,
571 SDVO_CMD_SET_TARGET_INPUT,
572 &targets, sizeof(targets));
Jesse Barnes79e53942008-11-07 14:24:08 -0800573}
574
575/**
576 * Return whether each input is trained.
577 *
578 * This function is making an assumption about the layout of the response,
579 * which should be checked against the docs.
580 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100581static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800582{
583 struct intel_sdvo_get_trained_inputs_response response;
Jesse Barnes79e53942008-11-07 14:24:08 -0800584
Chris Wilson32aad862010-08-04 13:50:25 +0100585 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
586 &response, sizeof(response)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800587 return false;
588
589 *input_1 = response.input0_trained;
590 *input_2 = response.input1_trained;
591 return true;
592}
593
Chris Wilsonea5b2132010-08-04 13:50:23 +0100594static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800595 u16 outputs)
596{
Chris Wilson32aad862010-08-04 13:50:25 +0100597 return intel_sdvo_set_value(intel_sdvo,
598 SDVO_CMD_SET_ACTIVE_OUTPUTS,
599 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800600}
601
Chris Wilsonea5b2132010-08-04 13:50:23 +0100602static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800603 int mode)
604{
Chris Wilson32aad862010-08-04 13:50:25 +0100605 u8 state = SDVO_ENCODER_STATE_ON;
Jesse Barnes79e53942008-11-07 14:24:08 -0800606
607 switch (mode) {
608 case DRM_MODE_DPMS_ON:
609 state = SDVO_ENCODER_STATE_ON;
610 break;
611 case DRM_MODE_DPMS_STANDBY:
612 state = SDVO_ENCODER_STATE_STANDBY;
613 break;
614 case DRM_MODE_DPMS_SUSPEND:
615 state = SDVO_ENCODER_STATE_SUSPEND;
616 break;
617 case DRM_MODE_DPMS_OFF:
618 state = SDVO_ENCODER_STATE_OFF;
619 break;
620 }
621
Chris Wilson32aad862010-08-04 13:50:25 +0100622 return intel_sdvo_set_value(intel_sdvo,
623 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
Jesse Barnes79e53942008-11-07 14:24:08 -0800624}
625
Chris Wilsonea5b2132010-08-04 13:50:23 +0100626static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800627 int *clock_min,
628 int *clock_max)
629{
630 struct intel_sdvo_pixel_clock_range clocks;
Jesse Barnes79e53942008-11-07 14:24:08 -0800631
Chris Wilson32aad862010-08-04 13:50:25 +0100632 if (!intel_sdvo_get_value(intel_sdvo,
633 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
634 &clocks, sizeof(clocks)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800635 return false;
636
637 /* Convert the values from units of 10 kHz to kHz. */
638 *clock_min = clocks.min * 10;
639 *clock_max = clocks.max * 10;
Jesse Barnes79e53942008-11-07 14:24:08 -0800640 return true;
641}
642
Chris Wilsonea5b2132010-08-04 13:50:23 +0100643static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800644 u16 outputs)
645{
Chris Wilson32aad862010-08-04 13:50:25 +0100646 return intel_sdvo_set_value(intel_sdvo,
647 SDVO_CMD_SET_TARGET_OUTPUT,
648 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800649}
650
Chris Wilsonea5b2132010-08-04 13:50:23 +0100651static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
Jesse Barnes79e53942008-11-07 14:24:08 -0800652 struct intel_sdvo_dtd *dtd)
653{
Chris Wilson32aad862010-08-04 13:50:25 +0100654 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
655 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
Jesse Barnes79e53942008-11-07 14:24:08 -0800656}
657
Chris Wilsonea5b2132010-08-04 13:50:23 +0100658static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800659 struct intel_sdvo_dtd *dtd)
660{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100661 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800662 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
663}
664
Chris Wilsonea5b2132010-08-04 13:50:23 +0100665static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800666 struct intel_sdvo_dtd *dtd)
667{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100668 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800669 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
670}
671
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800672static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100673intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800674 uint16_t clock,
675 uint16_t width,
676 uint16_t height)
677{
678 struct intel_sdvo_preferred_input_timing_args args;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800679
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800680 memset(&args, 0, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800681 args.clock = clock;
682 args.width = width;
683 args.height = height;
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800684 args.interlace = 0;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800685
Chris Wilsonea5b2132010-08-04 13:50:23 +0100686 if (intel_sdvo->is_lvds &&
687 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
688 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800689 args.scaled = 1;
690
Chris Wilson32aad862010-08-04 13:50:25 +0100691 return intel_sdvo_set_value(intel_sdvo,
692 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
693 &args, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800694}
695
Chris Wilsonea5b2132010-08-04 13:50:23 +0100696static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800697 struct intel_sdvo_dtd *dtd)
698{
Chris Wilson32aad862010-08-04 13:50:25 +0100699 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
700 &dtd->part1, sizeof(dtd->part1)) &&
701 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
702 &dtd->part2, sizeof(dtd->part2));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800703}
Jesse Barnes79e53942008-11-07 14:24:08 -0800704
Chris Wilsonea5b2132010-08-04 13:50:23 +0100705static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800706{
Chris Wilson32aad862010-08-04 13:50:25 +0100707 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800708}
709
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800710static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
Chris Wilson32aad862010-08-04 13:50:25 +0100711 const struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800712{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800713 uint16_t width, height;
714 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
715 uint16_t h_sync_offset, v_sync_offset;
Jesse Barnes79e53942008-11-07 14:24:08 -0800716
717 width = mode->crtc_hdisplay;
718 height = mode->crtc_vdisplay;
719
720 /* do some mode translations */
721 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
722 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
723
724 v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
725 v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
726
727 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
728 v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
729
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800730 dtd->part1.clock = mode->clock / 10;
731 dtd->part1.h_active = width & 0xff;
732 dtd->part1.h_blank = h_blank_len & 0xff;
733 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800734 ((h_blank_len >> 8) & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800735 dtd->part1.v_active = height & 0xff;
736 dtd->part1.v_blank = v_blank_len & 0xff;
737 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800738 ((v_blank_len >> 8) & 0xf);
739
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800740 dtd->part2.h_sync_off = h_sync_offset & 0xff;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800741 dtd->part2.h_sync_width = h_sync_len & 0xff;
742 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
Jesse Barnes79e53942008-11-07 14:24:08 -0800743 (v_sync_len & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800744 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800745 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
746 ((v_sync_len & 0x30) >> 4);
747
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800748 dtd->part2.dtd_flags = 0x18;
Jesse Barnes79e53942008-11-07 14:24:08 -0800749 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800750 dtd->part2.dtd_flags |= 0x2;
Jesse Barnes79e53942008-11-07 14:24:08 -0800751 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800752 dtd->part2.dtd_flags |= 0x4;
Jesse Barnes79e53942008-11-07 14:24:08 -0800753
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800754 dtd->part2.sdvo_flags = 0;
755 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
756 dtd->part2.reserved = 0;
757}
Jesse Barnes79e53942008-11-07 14:24:08 -0800758
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800759static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
Chris Wilson32aad862010-08-04 13:50:25 +0100760 const struct intel_sdvo_dtd *dtd)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800761{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800762 mode->hdisplay = dtd->part1.h_active;
763 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
764 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800765 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800766 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
767 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
768 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
769 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
770
771 mode->vdisplay = dtd->part1.v_active;
772 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
773 mode->vsync_start = mode->vdisplay;
774 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800775 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800776 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
777 mode->vsync_end = mode->vsync_start +
778 (dtd->part2.v_sync_off_width & 0xf);
779 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
780 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
781 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
782
783 mode->clock = dtd->part1.clock * 10;
784
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800785 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800786 if (dtd->part2.dtd_flags & 0x2)
787 mode->flags |= DRM_MODE_FLAG_PHSYNC;
788 if (dtd->part2.dtd_flags & 0x4)
789 mode->flags |= DRM_MODE_FLAG_PVSYNC;
790}
791
Chris Wilsonea5b2132010-08-04 13:50:23 +0100792static bool intel_sdvo_get_supp_encode(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800793 struct intel_sdvo_encode *encode)
794{
Chris Wilson32aad862010-08-04 13:50:25 +0100795 if (intel_sdvo_get_value(intel_sdvo,
796 SDVO_CMD_GET_SUPP_ENCODE,
797 encode, sizeof(*encode)))
798 return true;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800799
Chris Wilson32aad862010-08-04 13:50:25 +0100800 /* non-support means DVI */
801 memset(encode, 0, sizeof(*encode));
802 return false;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800803}
804
Chris Wilsonea5b2132010-08-04 13:50:23 +0100805static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
Eric Anholtc751ce42010-03-25 11:48:48 -0700806 uint8_t mode)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800807{
Chris Wilson32aad862010-08-04 13:50:25 +0100808 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800809}
810
Chris Wilsonea5b2132010-08-04 13:50:23 +0100811static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800812 uint8_t mode)
813{
Chris Wilson32aad862010-08-04 13:50:25 +0100814 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800815}
816
817#if 0
Chris Wilsonea5b2132010-08-04 13:50:23 +0100818static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800819{
820 int i, j;
821 uint8_t set_buf_index[2];
822 uint8_t av_split;
823 uint8_t buf_size;
824 uint8_t buf[48];
825 uint8_t *pos;
826
Chris Wilson32aad862010-08-04 13:50:25 +0100827 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800828
829 for (i = 0; i <= av_split; i++) {
830 set_buf_index[0] = i; set_buf_index[1] = 0;
Eric Anholtc751ce42010-03-25 11:48:48 -0700831 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800832 set_buf_index, 2);
Eric Anholtc751ce42010-03-25 11:48:48 -0700833 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
834 intel_sdvo_read_response(encoder, &buf_size, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800835
836 pos = buf;
837 for (j = 0; j <= buf_size; j += 8) {
Eric Anholtc751ce42010-03-25 11:48:48 -0700838 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800839 NULL, 0);
Eric Anholtc751ce42010-03-25 11:48:48 -0700840 intel_sdvo_read_response(encoder, pos, 8);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800841 pos += 8;
842 }
843 }
844}
845#endif
846
Chris Wilson32aad862010-08-04 13:50:25 +0100847static bool intel_sdvo_set_hdmi_buf(struct intel_sdvo *intel_sdvo,
Eric Anholtc751ce42010-03-25 11:48:48 -0700848 int index,
849 uint8_t *data, int8_t size, uint8_t tx_rate)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800850{
851 uint8_t set_buf_index[2];
852
853 set_buf_index[0] = index;
854 set_buf_index[1] = 0;
855
Chris Wilson32aad862010-08-04 13:50:25 +0100856 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_INDEX,
857 set_buf_index, 2))
858 return false;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800859
860 for (; size > 0; size -= 8) {
Chris Wilson32aad862010-08-04 13:50:25 +0100861 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_DATA, data, 8))
862 return false;
863
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800864 data += 8;
865 }
866
Chris Wilson32aad862010-08-04 13:50:25 +0100867 return intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_TXRATE, &tx_rate, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800868}
869
870static uint8_t intel_sdvo_calc_hbuf_csum(uint8_t *data, uint8_t size)
871{
872 uint8_t csum = 0;
873 int i;
874
875 for (i = 0; i < size; i++)
876 csum += data[i];
877
878 return 0x100 - csum;
879}
880
881#define DIP_TYPE_AVI 0x82
882#define DIP_VERSION_AVI 0x2
883#define DIP_LEN_AVI 13
884
885struct dip_infoframe {
886 uint8_t type;
887 uint8_t version;
888 uint8_t len;
889 uint8_t checksum;
890 union {
891 struct {
892 /* Packet Byte #1 */
893 uint8_t S:2;
894 uint8_t B:2;
895 uint8_t A:1;
896 uint8_t Y:2;
897 uint8_t rsvd1:1;
898 /* Packet Byte #2 */
899 uint8_t R:4;
900 uint8_t M:2;
901 uint8_t C:2;
902 /* Packet Byte #3 */
903 uint8_t SC:2;
904 uint8_t Q:2;
905 uint8_t EC:3;
906 uint8_t ITC:1;
907 /* Packet Byte #4 */
908 uint8_t VIC:7;
909 uint8_t rsvd2:1;
910 /* Packet Byte #5 */
911 uint8_t PR:4;
912 uint8_t rsvd3:4;
913 /* Packet Byte #6~13 */
914 uint16_t top_bar_end;
915 uint16_t bottom_bar_start;
916 uint16_t left_bar_end;
917 uint16_t right_bar_start;
918 } avi;
919 struct {
920 /* Packet Byte #1 */
921 uint8_t channel_count:3;
922 uint8_t rsvd1:1;
923 uint8_t coding_type:4;
924 /* Packet Byte #2 */
925 uint8_t sample_size:2; /* SS0, SS1 */
926 uint8_t sample_frequency:3;
927 uint8_t rsvd2:3;
928 /* Packet Byte #3 */
929 uint8_t coding_type_private:5;
930 uint8_t rsvd3:3;
931 /* Packet Byte #4 */
932 uint8_t channel_allocation;
933 /* Packet Byte #5 */
934 uint8_t rsvd4:3;
935 uint8_t level_shift:4;
936 uint8_t downmix_inhibit:1;
937 } audio;
938 uint8_t payload[28];
939 } __attribute__ ((packed)) u;
940} __attribute__((packed));
941
Chris Wilson32aad862010-08-04 13:50:25 +0100942static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800943 struct drm_display_mode * mode)
944{
945 struct dip_infoframe avi_if = {
946 .type = DIP_TYPE_AVI,
947 .version = DIP_VERSION_AVI,
948 .len = DIP_LEN_AVI,
949 };
950
951 avi_if.checksum = intel_sdvo_calc_hbuf_csum((uint8_t *)&avi_if,
952 4 + avi_if.len);
Chris Wilson32aad862010-08-04 13:50:25 +0100953 return intel_sdvo_set_hdmi_buf(intel_sdvo, 1, (uint8_t *)&avi_if,
954 4 + avi_if.len,
955 SDVO_HBUF_TX_VSYNC);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800956}
957
Chris Wilson32aad862010-08-04 13:50:25 +0100958static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +0800959{
Zhao Yakuice6feab2009-08-24 13:50:26 +0800960 struct intel_sdvo_tv_format format;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800961 uint32_t format_map, i;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800962
963 for (i = 0; i < TV_FORMAT_NUM; i++)
Chris Wilsonea5b2132010-08-04 13:50:23 +0100964 if (tv_format_names[i] == intel_sdvo->tv_format_name)
Zhao Yakuice6feab2009-08-24 13:50:26 +0800965 break;
966
967 format_map = 1 << i;
968 memset(&format, 0, sizeof(format));
Chris Wilson32aad862010-08-04 13:50:25 +0100969 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
Zhao Yakuice6feab2009-08-24 13:50:26 +0800970
Chris Wilson32aad862010-08-04 13:50:25 +0100971 BUILD_BUG_ON(sizeof(format) != 6);
972 return intel_sdvo_set_value(intel_sdvo,
973 SDVO_CMD_SET_TV_FORMAT,
974 &format, sizeof(format));
975}
Zhao Yakuice6feab2009-08-24 13:50:26 +0800976
Chris Wilson32aad862010-08-04 13:50:25 +0100977static bool
978intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
979 struct drm_display_mode *mode)
980{
981 struct intel_sdvo_dtd output_dtd;
982
983 if (!intel_sdvo_set_target_output(intel_sdvo,
984 intel_sdvo->attached_output))
985 return false;
986
987 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
988 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
989 return false;
990
991 return true;
992}
993
994static bool
995intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
996 struct drm_display_mode *mode,
997 struct drm_display_mode *adjusted_mode)
998{
999 struct intel_sdvo_dtd input_dtd;
1000
1001 /* Reset the input timing to the screen. Assume always input 0. */
1002 if (!intel_sdvo_set_target_input(intel_sdvo))
1003 return false;
1004
1005 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1006 mode->clock / 10,
1007 mode->hdisplay,
1008 mode->vdisplay))
1009 return false;
1010
1011 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1012 &input_dtd))
1013 return false;
1014
1015 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1016 intel_sdvo->sdvo_flags = input_dtd.part2.sdvo_flags;
1017
1018 drm_mode_set_crtcinfo(adjusted_mode, 0);
1019 mode->clock = adjusted_mode->clock;
1020 return true;
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001021}
1022
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001023static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
1024 struct drm_display_mode *mode,
1025 struct drm_display_mode *adjusted_mode)
1026{
Chris Wilsonea5b2132010-08-04 13:50:23 +01001027 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001028
Chris Wilson32aad862010-08-04 13:50:25 +01001029 /* We need to construct preferred input timings based on our
1030 * output timings. To do that, we have to set the output
1031 * timings, even though this isn't really the right place in
1032 * the sequence to do it. Oh well.
1033 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001034 if (intel_sdvo->is_tv) {
Chris Wilson32aad862010-08-04 13:50:25 +01001035 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001036 return false;
Chris Wilson32aad862010-08-04 13:50:25 +01001037
1038 if (!intel_sdvo_set_input_timings_for_mode(intel_sdvo, mode, adjusted_mode))
1039 return false;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001040 } else if (intel_sdvo->is_lvds) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001041 drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode, 0);
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001042
Chris Wilson32aad862010-08-04 13:50:25 +01001043 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1044 intel_sdvo->sdvo_lvds_fixed_mode))
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001045 return false;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001046
Chris Wilson32aad862010-08-04 13:50:25 +01001047 if (!intel_sdvo_set_input_timings_for_mode(intel_sdvo, mode, adjusted_mode))
1048 return false;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001049 }
Chris Wilson32aad862010-08-04 13:50:25 +01001050
1051 /* Make the CRTC code factor in the SDVO pixel multiplier. The
1052 * SDVO device will be told of the multiplier during mode_set.
1053 */
1054 adjusted_mode->clock *= intel_sdvo_get_pixel_multiplier(mode);
1055
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001056 return true;
1057}
1058
1059static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1060 struct drm_display_mode *mode,
1061 struct drm_display_mode *adjusted_mode)
1062{
1063 struct drm_device *dev = encoder->dev;
1064 struct drm_i915_private *dev_priv = dev->dev_private;
1065 struct drm_crtc *crtc = encoder->crtc;
1066 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001067 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001068 u32 sdvox = 0;
Chris Wilson32aad862010-08-04 13:50:25 +01001069 int sdvo_pixel_multiply, rate;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001070 struct intel_sdvo_in_out_map in_out;
1071 struct intel_sdvo_dtd input_dtd;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001072
1073 if (!mode)
1074 return;
1075
1076 /* First, set the input mapping for the first input to our controlled
1077 * output. This is only correct if we're a single-input device, in
1078 * which case the first input is the output from the appropriate SDVO
1079 * channel on the motherboard. In a two-input device, the first input
1080 * will be SDVOB and the second SDVOC.
1081 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001082 in_out.in0 = intel_sdvo->attached_output;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001083 in_out.in1 = 0;
1084
Chris Wilson32aad862010-08-04 13:50:25 +01001085 if (!intel_sdvo_set_value(intel_sdvo,
1086 SDVO_CMD_SET_IN_OUT_MAP,
1087 &in_out, sizeof(in_out)))
1088 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001089
Chris Wilsonea5b2132010-08-04 13:50:23 +01001090 if (intel_sdvo->is_hdmi) {
Chris Wilson32aad862010-08-04 13:50:25 +01001091 if (!intel_sdvo_set_avi_infoframe(intel_sdvo, mode))
1092 return;
1093
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001094 sdvox |= SDVO_AUDIO_ENABLE;
1095 }
1096
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001097 /* We have tried to get input timing in mode_fixup, and filled into
1098 adjusted_mode */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001099 if (intel_sdvo->is_tv || intel_sdvo->is_lvds) {
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001100 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001101 input_dtd.part2.sdvo_flags = intel_sdvo->sdvo_flags;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001102 } else
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001103 intel_sdvo_get_dtd_from_mode(&input_dtd, mode);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001104
1105 /* If it's a TV, we already set the output timing in mode_fixup.
1106 * Otherwise, the output timing is equal to the input timing.
1107 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001108 if (!intel_sdvo->is_tv && !intel_sdvo->is_lvds) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001109 /* Set the output timing to the screen */
Chris Wilson32aad862010-08-04 13:50:25 +01001110 if (!intel_sdvo_set_target_output(intel_sdvo,
1111 intel_sdvo->attached_output))
1112 return;
1113
1114 if (!intel_sdvo_set_output_timing(intel_sdvo, &input_dtd))
1115 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001116 }
Jesse Barnes79e53942008-11-07 14:24:08 -08001117
1118 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01001119 if (!intel_sdvo_set_target_input(intel_sdvo))
1120 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001121
Chris Wilson32aad862010-08-04 13:50:25 +01001122 if (intel_sdvo->is_tv) {
1123 if (!intel_sdvo_set_tv_format(intel_sdvo))
1124 return;
1125 }
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001126
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001127 /* We would like to use intel_sdvo_create_preferred_input_timing() to
Jesse Barnes79e53942008-11-07 14:24:08 -08001128 * provide the device with a timing it can support, if it supports that
1129 * feature. However, presumably we would need to adjust the CRTC to
1130 * output the preferred timing, and we don't support that currently.
1131 */
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001132#if 0
Eric Anholtc751ce42010-03-25 11:48:48 -07001133 success = intel_sdvo_create_preferred_input_timing(encoder, clock,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001134 width, height);
1135 if (success) {
1136 struct intel_sdvo_dtd *input_dtd;
1137
Eric Anholtc751ce42010-03-25 11:48:48 -07001138 intel_sdvo_get_preferred_input_timing(encoder, &input_dtd);
1139 intel_sdvo_set_input_timing(encoder, &input_dtd);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001140 }
1141#else
Chris Wilson32aad862010-08-04 13:50:25 +01001142 if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1143 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001144#endif
Jesse Barnes79e53942008-11-07 14:24:08 -08001145
Chris Wilson32aad862010-08-04 13:50:25 +01001146 sdvo_pixel_multiply = intel_sdvo_get_pixel_multiplier(mode);
1147 switch (sdvo_pixel_multiply) {
1148 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1149 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1150 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
Jesse Barnes79e53942008-11-07 14:24:08 -08001151 }
Chris Wilson32aad862010-08-04 13:50:25 +01001152 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1153 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001154
1155 /* Set the SDVO control regs. */
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001156 if (IS_I965G(dev)) {
Adam Jackson81a14b42010-07-16 14:46:32 -04001157 sdvox |= SDVO_BORDER_ENABLE;
1158 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
1159 sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
1160 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
1161 sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001162 } else {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001163 sdvox |= I915_READ(intel_sdvo->sdvo_reg);
1164 switch (intel_sdvo->sdvo_reg) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001165 case SDVOB:
1166 sdvox &= SDVOB_PRESERVE_MASK;
1167 break;
1168 case SDVOC:
1169 sdvox &= SDVOC_PRESERVE_MASK;
1170 break;
1171 }
1172 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1173 }
Jesse Barnes79e53942008-11-07 14:24:08 -08001174 if (intel_crtc->pipe == 1)
1175 sdvox |= SDVO_PIPE_B_SELECT;
1176
Jesse Barnes79e53942008-11-07 14:24:08 -08001177 if (IS_I965G(dev)) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001178 /* done in crtc_mode_set as the dpll_md reg must be written early */
1179 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1180 /* done in crtc_mode_set as it lives inside the dpll register */
Jesse Barnes79e53942008-11-07 14:24:08 -08001181 } else {
1182 sdvox |= (sdvo_pixel_multiply - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1183 }
1184
Chris Wilsonea5b2132010-08-04 13:50:23 +01001185 if (intel_sdvo->sdvo_flags & SDVO_NEED_TO_STALL)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001186 sdvox |= SDVO_STALL_SELECT;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001187 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
Jesse Barnes79e53942008-11-07 14:24:08 -08001188}
1189
1190static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1191{
1192 struct drm_device *dev = encoder->dev;
1193 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001194 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -08001195 u32 temp;
1196
1197 if (mode != DRM_MODE_DPMS_ON) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001198 intel_sdvo_set_active_outputs(intel_sdvo, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08001199 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001200 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
Jesse Barnes79e53942008-11-07 14:24:08 -08001201
1202 if (mode == DRM_MODE_DPMS_OFF) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001203 temp = I915_READ(intel_sdvo->sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08001204 if ((temp & SDVO_ENABLE) != 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001205 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
Jesse Barnes79e53942008-11-07 14:24:08 -08001206 }
1207 }
1208 } else {
1209 bool input1, input2;
1210 int i;
1211 u8 status;
1212
Chris Wilsonea5b2132010-08-04 13:50:23 +01001213 temp = I915_READ(intel_sdvo->sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08001214 if ((temp & SDVO_ENABLE) == 0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001215 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
Jesse Barnes79e53942008-11-07 14:24:08 -08001216 for (i = 0; i < 2; i++)
1217 intel_wait_for_vblank(dev);
1218
Chris Wilson32aad862010-08-04 13:50:25 +01001219 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001220 /* Warn if the device reported failure to sync.
1221 * A lot of SDVO devices fail to notify of sync, but it's
1222 * a given it the status is a success, we succeeded.
1223 */
1224 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08001225 DRM_DEBUG_KMS("First %s output reported failure to "
Chris Wilsonea5b2132010-08-04 13:50:23 +01001226 "sync\n", SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -08001227 }
1228
1229 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001230 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1231 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
Jesse Barnes79e53942008-11-07 14:24:08 -08001232 }
1233 return;
1234}
1235
Jesse Barnes79e53942008-11-07 14:24:08 -08001236static int intel_sdvo_mode_valid(struct drm_connector *connector,
1237 struct drm_display_mode *mode)
1238{
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001239 struct drm_encoder *encoder = intel_attached_encoder(connector);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001240 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -08001241
1242 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1243 return MODE_NO_DBLESCAN;
1244
Chris Wilsonea5b2132010-08-04 13:50:23 +01001245 if (intel_sdvo->pixel_clock_min > mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001246 return MODE_CLOCK_LOW;
1247
Chris Wilsonea5b2132010-08-04 13:50:23 +01001248 if (intel_sdvo->pixel_clock_max < mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001249 return MODE_CLOCK_HIGH;
1250
Chris Wilsonea5b2132010-08-04 13:50:23 +01001251 if (intel_sdvo->is_lvds == true) {
1252 if (intel_sdvo->sdvo_lvds_fixed_mode == NULL)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001253 return MODE_PANEL;
1254
Chris Wilsonea5b2132010-08-04 13:50:23 +01001255 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001256 return MODE_PANEL;
1257
Chris Wilsonea5b2132010-08-04 13:50:23 +01001258 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001259 return MODE_PANEL;
1260 }
1261
Jesse Barnes79e53942008-11-07 14:24:08 -08001262 return MODE_OK;
1263}
1264
Chris Wilsonea5b2132010-08-04 13:50:23 +01001265static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
Jesse Barnes79e53942008-11-07 14:24:08 -08001266{
Chris Wilson32aad862010-08-04 13:50:25 +01001267 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DEVICE_CAPS, caps, sizeof(*caps));
Jesse Barnes79e53942008-11-07 14:24:08 -08001268}
1269
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001270/* No use! */
1271#if 0
Jesse Barnes79e53942008-11-07 14:24:08 -08001272struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB)
1273{
1274 struct drm_connector *connector = NULL;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001275 struct intel_sdvo *iout = NULL;
1276 struct intel_sdvo *sdvo;
Jesse Barnes79e53942008-11-07 14:24:08 -08001277
1278 /* find the sdvo connector */
1279 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001280 iout = to_intel_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001281
1282 if (iout->type != INTEL_OUTPUT_SDVO)
1283 continue;
1284
1285 sdvo = iout->dev_priv;
1286
Eric Anholtc751ce42010-03-25 11:48:48 -07001287 if (sdvo->sdvo_reg == SDVOB && sdvoB)
Jesse Barnes79e53942008-11-07 14:24:08 -08001288 return connector;
1289
Eric Anholtc751ce42010-03-25 11:48:48 -07001290 if (sdvo->sdvo_reg == SDVOC && !sdvoB)
Jesse Barnes79e53942008-11-07 14:24:08 -08001291 return connector;
1292
1293 }
1294
1295 return NULL;
1296}
1297
1298int intel_sdvo_supports_hotplug(struct drm_connector *connector)
1299{
1300 u8 response[2];
1301 u8 status;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001302 struct intel_sdvo *intel_sdvo;
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08001303 DRM_DEBUG_KMS("\n");
Jesse Barnes79e53942008-11-07 14:24:08 -08001304
1305 if (!connector)
1306 return 0;
1307
Chris Wilsonea5b2132010-08-04 13:50:23 +01001308 intel_sdvo = to_intel_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001309
Chris Wilson32aad862010-08-04 13:50:25 +01001310 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1311 &response, 2) && response[0];
Jesse Barnes79e53942008-11-07 14:24:08 -08001312}
1313
1314void intel_sdvo_set_hotplug(struct drm_connector *connector, int on)
1315{
1316 u8 response[2];
1317 u8 status;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001318 struct intel_sdvo *intel_sdvo = to_intel_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001319
Chris Wilsonea5b2132010-08-04 13:50:23 +01001320 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1321 intel_sdvo_read_response(intel_sdvo, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001322
1323 if (on) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001324 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0);
1325 status = intel_sdvo_read_response(intel_sdvo, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001326
Chris Wilsonea5b2132010-08-04 13:50:23 +01001327 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001328 } else {
1329 response[0] = 0;
1330 response[1] = 0;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001331 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001332 }
1333
Chris Wilsonea5b2132010-08-04 13:50:23 +01001334 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1335 intel_sdvo_read_response(intel_sdvo, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001336}
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001337#endif
Jesse Barnes79e53942008-11-07 14:24:08 -08001338
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001339static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01001340intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001341{
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001342 int caps = 0;
1343
Chris Wilsonea5b2132010-08-04 13:50:23 +01001344 if (intel_sdvo->caps.output_flags &
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001345 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1))
1346 caps++;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001347 if (intel_sdvo->caps.output_flags &
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001348 (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1))
1349 caps++;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001350 if (intel_sdvo->caps.output_flags &
Roel Kluin19e1f882009-08-09 13:50:53 +02001351 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_SVID1))
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001352 caps++;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001353 if (intel_sdvo->caps.output_flags &
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001354 (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_CVBS1))
1355 caps++;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001356 if (intel_sdvo->caps.output_flags &
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001357 (SDVO_OUTPUT_YPRPB0 | SDVO_OUTPUT_YPRPB1))
1358 caps++;
1359
Chris Wilsonea5b2132010-08-04 13:50:23 +01001360 if (intel_sdvo->caps.output_flags &
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001361 (SDVO_OUTPUT_SCART0 | SDVO_OUTPUT_SCART1))
1362 caps++;
1363
Chris Wilsonea5b2132010-08-04 13:50:23 +01001364 if (intel_sdvo->caps.output_flags &
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001365 (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1))
1366 caps++;
1367
1368 return (caps > 1);
1369}
1370
Keith Packard57cdaf92009-09-04 13:07:54 +08001371static struct drm_connector *
1372intel_find_analog_connector(struct drm_device *dev)
1373{
1374 struct drm_connector *connector;
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001375 struct drm_encoder *encoder;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001376 struct intel_sdvo *intel_sdvo;
Keith Packard57cdaf92009-09-04 13:07:54 +08001377
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001378 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001379 intel_sdvo = enc_to_intel_sdvo(encoder);
1380 if (intel_sdvo->base.type == INTEL_OUTPUT_ANALOG) {
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001381 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
Dan Carpenter90a78e82010-05-07 10:40:09 +02001382 if (encoder == intel_attached_encoder(connector))
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001383 return connector;
1384 }
1385 }
Keith Packard57cdaf92009-09-04 13:07:54 +08001386 }
1387 return NULL;
1388}
1389
1390static int
1391intel_analog_is_connected(struct drm_device *dev)
1392{
1393 struct drm_connector *analog_connector;
Keith Packard57cdaf92009-09-04 13:07:54 +08001394
Chris Wilson32aad862010-08-04 13:50:25 +01001395 analog_connector = intel_find_analog_connector(dev);
Keith Packard57cdaf92009-09-04 13:07:54 +08001396 if (!analog_connector)
1397 return false;
1398
1399 if (analog_connector->funcs->detect(analog_connector) ==
1400 connector_status_disconnected)
1401 return false;
1402
1403 return true;
1404}
1405
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +08001406enum drm_connector_status
Adam Jackson149c36a2010-04-29 14:05:18 -04001407intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
Ma Ling9dff6af2009-04-02 13:13:26 +08001408{
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001409 struct drm_encoder *encoder = intel_attached_encoder(connector);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001410 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
Chris Wilson615fb932010-08-04 13:50:24 +01001411 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +08001412 enum drm_connector_status status = connector_status_connected;
Ma Ling9dff6af2009-04-02 13:13:26 +08001413 struct edid *edid = NULL;
1414
Chris Wilsonea5b2132010-08-04 13:50:23 +01001415 edid = drm_get_edid(connector, intel_sdvo->base.ddc_bus);
Keith Packard57cdaf92009-09-04 13:07:54 +08001416
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001417 /* This is only applied to SDVO cards with multiple outputs */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001418 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001419 uint8_t saved_ddc, temp_ddc;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001420 saved_ddc = intel_sdvo->ddc_bus;
1421 temp_ddc = intel_sdvo->ddc_bus >> 1;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001422 /*
1423 * Don't use the 1 as the argument of DDC bus switch to get
1424 * the EDID. It is used for SDVO SPD ROM.
1425 */
1426 while(temp_ddc > 1) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001427 intel_sdvo->ddc_bus = temp_ddc;
1428 edid = drm_get_edid(connector, intel_sdvo->base.ddc_bus);
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001429 if (edid) {
1430 /*
1431 * When we can get the EDID, maybe it is the
1432 * correct DDC bus. Update it.
1433 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001434 intel_sdvo->ddc_bus = temp_ddc;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001435 break;
1436 }
1437 temp_ddc >>= 1;
1438 }
1439 if (edid == NULL)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001440 intel_sdvo->ddc_bus = saved_ddc;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001441 }
Keith Packard57cdaf92009-09-04 13:07:54 +08001442 /* when there is no edid and no monitor is connected with VGA
1443 * port, try to use the CRT ddc to read the EDID for DVI-connector
1444 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001445 if (edid == NULL && intel_sdvo->analog_ddc_bus &&
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001446 !intel_analog_is_connected(connector->dev))
Chris Wilsonea5b2132010-08-04 13:50:23 +01001447 edid = drm_get_edid(connector, intel_sdvo->analog_ddc_bus);
Adam Jackson149c36a2010-04-29 14:05:18 -04001448
Ma Ling9dff6af2009-04-02 13:13:26 +08001449 if (edid != NULL) {
Adam Jackson149c36a2010-04-29 14:05:18 -04001450 bool is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
Chris Wilson615fb932010-08-04 13:50:24 +01001451 bool need_digital = !!(intel_sdvo_connector->output_flag & SDVO_TMDS_MASK);
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +08001452
Adam Jackson149c36a2010-04-29 14:05:18 -04001453 /* DDC bus is shared, match EDID to connector type */
1454 if (is_digital && need_digital)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001455 intel_sdvo->is_hdmi = drm_detect_hdmi_monitor(edid);
Adam Jackson149c36a2010-04-29 14:05:18 -04001456 else if (is_digital != need_digital)
1457 status = connector_status_disconnected;
1458
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001459 connector->display_info.raw_edid = NULL;
Adam Jackson149c36a2010-04-29 14:05:18 -04001460 } else
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +08001461 status = connector_status_disconnected;
Adam Jackson149c36a2010-04-29 14:05:18 -04001462
1463 kfree(edid);
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +08001464
1465 return status;
Ma Ling9dff6af2009-04-02 13:13:26 +08001466}
1467
Jesse Barnes79e53942008-11-07 14:24:08 -08001468static enum drm_connector_status intel_sdvo_detect(struct drm_connector *connector)
1469{
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001470 uint16_t response;
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001471 struct drm_encoder *encoder = intel_attached_encoder(connector);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001472 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
Chris Wilson615fb932010-08-04 13:50:24 +01001473 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001474 enum drm_connector_status ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001475
Chris Wilson32aad862010-08-04 13:50:25 +01001476 if (!intel_sdvo_write_cmd(intel_sdvo,
1477 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1478 return connector_status_unknown;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001479 if (intel_sdvo->is_tv) {
Zhao Yakuid09c23d2009-11-06 15:39:56 +08001480 /* add 30ms delay when the output type is SDVO-TV */
1481 mdelay(30);
1482 }
Chris Wilson32aad862010-08-04 13:50:25 +01001483 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1484 return connector_status_unknown;
Jesse Barnes79e53942008-11-07 14:24:08 -08001485
Dave Airlie51c8b402009-08-20 13:38:04 +10001486 DRM_DEBUG_KMS("SDVO response %d %d\n", response & 0xff, response >> 8);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001487
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001488 if (response == 0)
Jesse Barnes79e53942008-11-07 14:24:08 -08001489 return connector_status_disconnected;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001490
Chris Wilsonea5b2132010-08-04 13:50:23 +01001491 intel_sdvo->attached_output = response;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001492
Chris Wilson615fb932010-08-04 13:50:24 +01001493 if ((intel_sdvo_connector->output_flag & response) == 0)
Zhenyu Wang14571b42010-03-30 14:06:33 +08001494 ret = connector_status_disconnected;
Adam Jackson149c36a2010-04-29 14:05:18 -04001495 else if (response & SDVO_TMDS_MASK)
1496 ret = intel_sdvo_hdmi_sink_detect(connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001497 else
1498 ret = connector_status_connected;
1499
1500 /* May update encoder flag for like clock for SDVO TV, etc.*/
1501 if (ret == connector_status_connected) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001502 intel_sdvo->is_tv = false;
1503 intel_sdvo->is_lvds = false;
1504 intel_sdvo->base.needs_tv_clock = false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001505
1506 if (response & SDVO_TV_MASK) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001507 intel_sdvo->is_tv = true;
1508 intel_sdvo->base.needs_tv_clock = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001509 }
1510 if (response & SDVO_LVDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001511 intel_sdvo->is_lvds = true;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001512 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001513
1514 return ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001515}
1516
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001517static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -08001518{
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001519 struct drm_encoder *encoder = intel_attached_encoder(connector);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001520 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
Keith Packard57cdaf92009-09-04 13:07:54 +08001521 int num_modes;
Jesse Barnes79e53942008-11-07 14:24:08 -08001522
1523 /* set the bus switch and get the modes */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001524 num_modes = intel_ddc_get_modes(connector, intel_sdvo->base.ddc_bus);
Jesse Barnes79e53942008-11-07 14:24:08 -08001525
Keith Packard57cdaf92009-09-04 13:07:54 +08001526 /*
1527 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1528 * link between analog and digital outputs. So, if the regular SDVO
1529 * DDC fails, check to see if the analog output is disconnected, in
1530 * which case we'll look there for the digital DDC data.
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001531 */
Keith Packard57cdaf92009-09-04 13:07:54 +08001532 if (num_modes == 0 &&
Chris Wilsonea5b2132010-08-04 13:50:23 +01001533 intel_sdvo->analog_ddc_bus &&
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001534 !intel_analog_is_connected(connector->dev)) {
Keith Packard57cdaf92009-09-04 13:07:54 +08001535 /* Switch to the analog ddc bus and try that
1536 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001537 (void) intel_ddc_get_modes(connector, intel_sdvo->analog_ddc_bus);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001538 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001539}
1540
1541/*
1542 * Set of SDVO TV modes.
1543 * Note! This is in reply order (see loop in get_tv_modes).
1544 * XXX: all 60Hz refresh?
1545 */
1546struct drm_display_mode sdvo_tv_modes[] = {
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001547 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1548 416, 0, 200, 201, 232, 233, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001549 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001550 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1551 416, 0, 240, 241, 272, 273, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001552 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001553 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1554 496, 0, 300, 301, 332, 333, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001555 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001556 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1557 736, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001558 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001559 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1560 736, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001561 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001562 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1563 736, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001564 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001565 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1566 800, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001567 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001568 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1569 800, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001570 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001571 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1572 816, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001573 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001574 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1575 816, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001576 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001577 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1578 816, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001579 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001580 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1581 816, 0, 540, 541, 572, 573, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001582 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001583 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1584 816, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001585 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001586 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1587 864, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001588 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001589 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1590 896, 0, 600, 601, 632, 633, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001591 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001592 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1593 928, 0, 624, 625, 656, 657, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001594 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001595 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1596 1016, 0, 766, 767, 798, 799, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001597 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001598 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1599 1120, 0, 768, 769, 800, 801, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001600 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001601 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1602 1376, 0, 1024, 1025, 1056, 1057, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001603 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1604};
1605
1606static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1607{
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001608 struct drm_encoder *encoder = intel_attached_encoder(connector);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001609 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001610 struct intel_sdvo_sdtv_resolution_request tv_res;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001611 uint32_t reply = 0, format_map = 0;
1612 int i;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001613
1614 /* Read the list of supported input resolutions for the selected TV
1615 * format.
1616 */
Zhao Yakuice6feab2009-08-24 13:50:26 +08001617 for (i = 0; i < TV_FORMAT_NUM; i++)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001618 if (tv_format_names[i] == intel_sdvo->tv_format_name)
Zhao Yakuice6feab2009-08-24 13:50:26 +08001619 break;
1620
1621 format_map = (1 << i);
1622 memcpy(&tv_res, &format_map,
Chris Wilson32aad862010-08-04 13:50:25 +01001623 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08001624
Chris Wilson32aad862010-08-04 13:50:25 +01001625 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1626 return;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001627
Chris Wilson32aad862010-08-04 13:50:25 +01001628 BUILD_BUG_ON(sizeof(tv_res) != 3);
1629 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1630 &tv_res, sizeof(tv_res)))
1631 return;
1632 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001633 return;
1634
1635 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001636 if (reply & (1 << i)) {
1637 struct drm_display_mode *nmode;
1638 nmode = drm_mode_duplicate(connector->dev,
Chris Wilson32aad862010-08-04 13:50:25 +01001639 &sdvo_tv_modes[i]);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001640 if (nmode)
1641 drm_mode_probed_add(connector, nmode);
1642 }
Zhao Yakuice6feab2009-08-24 13:50:26 +08001643
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001644}
1645
Ma Ling7086c872009-05-13 11:20:06 +08001646static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1647{
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001648 struct drm_encoder *encoder = intel_attached_encoder(connector);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001649 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
Ma Ling7086c872009-05-13 11:20:06 +08001650 struct drm_i915_private *dev_priv = connector->dev->dev_private;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001651 struct drm_display_mode *newmode;
Ma Ling7086c872009-05-13 11:20:06 +08001652
1653 /*
1654 * Attempt to get the mode list from DDC.
1655 * Assume that the preferred modes are
1656 * arranged in priority order.
1657 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001658 intel_ddc_get_modes(connector, intel_sdvo->base.ddc_bus);
Ma Ling7086c872009-05-13 11:20:06 +08001659 if (list_empty(&connector->probed_modes) == false)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001660 goto end;
Ma Ling7086c872009-05-13 11:20:06 +08001661
1662 /* Fetch modes from VBT */
1663 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
Ma Ling7086c872009-05-13 11:20:06 +08001664 newmode = drm_mode_duplicate(connector->dev,
1665 dev_priv->sdvo_lvds_vbt_mode);
1666 if (newmode != NULL) {
1667 /* Guarantee the mode is preferred */
1668 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1669 DRM_MODE_TYPE_DRIVER);
1670 drm_mode_probed_add(connector, newmode);
1671 }
1672 }
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001673
1674end:
1675 list_for_each_entry(newmode, &connector->probed_modes, head) {
1676 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001677 intel_sdvo->sdvo_lvds_fixed_mode =
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001678 drm_mode_duplicate(connector->dev, newmode);
1679 break;
1680 }
1681 }
1682
Ma Ling7086c872009-05-13 11:20:06 +08001683}
1684
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001685static int intel_sdvo_get_modes(struct drm_connector *connector)
1686{
Chris Wilson615fb932010-08-04 13:50:24 +01001687 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001688
Chris Wilson615fb932010-08-04 13:50:24 +01001689 if (IS_TV(intel_sdvo_connector))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001690 intel_sdvo_get_tv_modes(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001691 else if (IS_LVDS(intel_sdvo_connector))
Ma Ling7086c872009-05-13 11:20:06 +08001692 intel_sdvo_get_lvds_modes(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001693 else
1694 intel_sdvo_get_ddc_modes(connector);
1695
Chris Wilson32aad862010-08-04 13:50:25 +01001696 return !list_empty(&connector->probed_modes);
Jesse Barnes79e53942008-11-07 14:24:08 -08001697}
1698
Zhao Yakuib9219c52009-09-10 15:45:46 +08001699static
1700void intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1701{
Chris Wilson615fb932010-08-04 13:50:24 +01001702 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001703 struct drm_device *dev = connector->dev;
1704
Chris Wilson615fb932010-08-04 13:50:24 +01001705 if (IS_TV(intel_sdvo_connector)) {
1706 if (intel_sdvo_connector->left_property)
1707 drm_property_destroy(dev, intel_sdvo_connector->left_property);
1708 if (intel_sdvo_connector->right_property)
1709 drm_property_destroy(dev, intel_sdvo_connector->right_property);
1710 if (intel_sdvo_connector->top_property)
1711 drm_property_destroy(dev, intel_sdvo_connector->top_property);
1712 if (intel_sdvo_connector->bottom_property)
1713 drm_property_destroy(dev, intel_sdvo_connector->bottom_property);
1714 if (intel_sdvo_connector->hpos_property)
1715 drm_property_destroy(dev, intel_sdvo_connector->hpos_property);
1716 if (intel_sdvo_connector->vpos_property)
1717 drm_property_destroy(dev, intel_sdvo_connector->vpos_property);
1718 if (intel_sdvo_connector->saturation_property)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001719 drm_property_destroy(dev,
Chris Wilson615fb932010-08-04 13:50:24 +01001720 intel_sdvo_connector->saturation_property);
1721 if (intel_sdvo_connector->contrast_property)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001722 drm_property_destroy(dev,
Chris Wilson615fb932010-08-04 13:50:24 +01001723 intel_sdvo_connector->contrast_property);
1724 if (intel_sdvo_connector->hue_property)
1725 drm_property_destroy(dev, intel_sdvo_connector->hue_property);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001726 }
Chris Wilson32aad862010-08-04 13:50:25 +01001727 if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
Chris Wilson615fb932010-08-04 13:50:24 +01001728 if (intel_sdvo_connector->brightness_property)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001729 drm_property_destroy(dev,
Chris Wilson615fb932010-08-04 13:50:24 +01001730 intel_sdvo_connector->brightness_property);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001731 }
1732 return;
1733}
1734
Jesse Barnes79e53942008-11-07 14:24:08 -08001735static void intel_sdvo_destroy(struct drm_connector *connector)
1736{
Chris Wilson615fb932010-08-04 13:50:24 +01001737 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001738
Chris Wilson615fb932010-08-04 13:50:24 +01001739 if (intel_sdvo_connector->tv_format_property)
Zhao Yakuice6feab2009-08-24 13:50:26 +08001740 drm_property_destroy(connector->dev,
Chris Wilson615fb932010-08-04 13:50:24 +01001741 intel_sdvo_connector->tv_format_property);
Zhao Yakuice6feab2009-08-24 13:50:26 +08001742
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001743 intel_sdvo_destroy_enhance_property(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001744 drm_sysfs_connector_remove(connector);
1745 drm_connector_cleanup(connector);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001746 kfree(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001747}
1748
Zhao Yakuice6feab2009-08-24 13:50:26 +08001749static int
1750intel_sdvo_set_property(struct drm_connector *connector,
1751 struct drm_property *property,
1752 uint64_t val)
1753{
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001754 struct drm_encoder *encoder = intel_attached_encoder(connector);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001755 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
Chris Wilson615fb932010-08-04 13:50:24 +01001756 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhao Yakuice6feab2009-08-24 13:50:26 +08001757 struct drm_crtc *crtc = encoder->crtc;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001758 bool changed = false;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001759 uint16_t temp_value;
Chris Wilson32aad862010-08-04 13:50:25 +01001760 uint8_t cmd;
1761 int ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001762
1763 ret = drm_connector_property_set_value(connector, property, val);
Chris Wilson32aad862010-08-04 13:50:25 +01001764 if (ret)
1765 return ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001766
Chris Wilson615fb932010-08-04 13:50:24 +01001767 if (property == intel_sdvo_connector->tv_format_property) {
Chris Wilson32aad862010-08-04 13:50:25 +01001768 if (val >= TV_FORMAT_NUM)
1769 return -EINVAL;
1770
Chris Wilsonea5b2132010-08-04 13:50:23 +01001771 if (intel_sdvo->tv_format_name ==
Chris Wilson615fb932010-08-04 13:50:24 +01001772 intel_sdvo_connector->tv_format_supported[val])
Chris Wilson32aad862010-08-04 13:50:25 +01001773 return 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001774
Chris Wilson615fb932010-08-04 13:50:24 +01001775 intel_sdvo->tv_format_name = intel_sdvo_connector->tv_format_supported[val];
Zhao Yakuice6feab2009-08-24 13:50:26 +08001776 changed = true;
Chris Wilson32aad862010-08-04 13:50:25 +01001777 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001778 cmd = 0;
1779 temp_value = val;
Chris Wilson615fb932010-08-04 13:50:24 +01001780 if (intel_sdvo_connector->left_property == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001781 drm_connector_property_set_value(connector,
Chris Wilson615fb932010-08-04 13:50:24 +01001782 intel_sdvo_connector->right_property, val);
1783 if (intel_sdvo_connector->left_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001784 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001785
Chris Wilson615fb932010-08-04 13:50:24 +01001786 intel_sdvo_connector->left_margin = temp_value;
1787 intel_sdvo_connector->right_margin = temp_value;
1788 temp_value = intel_sdvo_connector->max_hscan -
1789 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001790 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilson615fb932010-08-04 13:50:24 +01001791 } else if (intel_sdvo_connector->right_property == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001792 drm_connector_property_set_value(connector,
Chris Wilson615fb932010-08-04 13:50:24 +01001793 intel_sdvo_connector->left_property, val);
1794 if (intel_sdvo_connector->right_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001795 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001796
Chris Wilson615fb932010-08-04 13:50:24 +01001797 intel_sdvo_connector->left_margin = temp_value;
1798 intel_sdvo_connector->right_margin = temp_value;
1799 temp_value = intel_sdvo_connector->max_hscan -
1800 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001801 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilson615fb932010-08-04 13:50:24 +01001802 } else if (intel_sdvo_connector->top_property == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001803 drm_connector_property_set_value(connector,
Chris Wilson615fb932010-08-04 13:50:24 +01001804 intel_sdvo_connector->bottom_property, val);
1805 if (intel_sdvo_connector->top_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001806 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001807
Chris Wilson615fb932010-08-04 13:50:24 +01001808 intel_sdvo_connector->top_margin = temp_value;
1809 intel_sdvo_connector->bottom_margin = temp_value;
1810 temp_value = intel_sdvo_connector->max_vscan -
1811 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001812 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilson615fb932010-08-04 13:50:24 +01001813 } else if (intel_sdvo_connector->bottom_property == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001814 drm_connector_property_set_value(connector,
Chris Wilson615fb932010-08-04 13:50:24 +01001815 intel_sdvo_connector->top_property, val);
1816 if (intel_sdvo_connector->bottom_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001817 return 0;
1818
Chris Wilson615fb932010-08-04 13:50:24 +01001819 intel_sdvo_connector->top_margin = temp_value;
1820 intel_sdvo_connector->bottom_margin = temp_value;
1821 temp_value = intel_sdvo_connector->max_vscan -
1822 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001823 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilson615fb932010-08-04 13:50:24 +01001824 } else if (intel_sdvo_connector->hpos_property == property) {
1825 if (intel_sdvo_connector->cur_hpos == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001826 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001827
1828 cmd = SDVO_CMD_SET_POSITION_H;
Chris Wilson615fb932010-08-04 13:50:24 +01001829 intel_sdvo_connector->cur_hpos = temp_value;
1830 } else if (intel_sdvo_connector->vpos_property == property) {
1831 if (intel_sdvo_connector->cur_vpos == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001832 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001833
1834 cmd = SDVO_CMD_SET_POSITION_V;
Chris Wilson615fb932010-08-04 13:50:24 +01001835 intel_sdvo_connector->cur_vpos = temp_value;
1836 } else if (intel_sdvo_connector->saturation_property == property) {
1837 if (intel_sdvo_connector->cur_saturation == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001838 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001839
1840 cmd = SDVO_CMD_SET_SATURATION;
Chris Wilson615fb932010-08-04 13:50:24 +01001841 intel_sdvo_connector->cur_saturation = temp_value;
1842 } else if (intel_sdvo_connector->contrast_property == property) {
1843 if (intel_sdvo_connector->cur_contrast == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001844 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001845
1846 cmd = SDVO_CMD_SET_CONTRAST;
Chris Wilson615fb932010-08-04 13:50:24 +01001847 intel_sdvo_connector->cur_contrast = temp_value;
1848 } else if (intel_sdvo_connector->hue_property == property) {
1849 if (intel_sdvo_connector->cur_hue == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001850 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001851
1852 cmd = SDVO_CMD_SET_HUE;
Chris Wilson615fb932010-08-04 13:50:24 +01001853 intel_sdvo_connector->cur_hue = temp_value;
1854 } else if (intel_sdvo_connector->brightness_property == property) {
1855 if (intel_sdvo_connector->cur_brightness == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001856 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001857
1858 cmd = SDVO_CMD_SET_BRIGHTNESS;
Chris Wilson615fb932010-08-04 13:50:24 +01001859 intel_sdvo_connector->cur_brightness = temp_value;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001860 }
1861 if (cmd) {
Chris Wilson32aad862010-08-04 13:50:25 +01001862 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
Zhao Yakuib9219c52009-09-10 15:45:46 +08001863 return -EINVAL;
Chris Wilson32aad862010-08-04 13:50:25 +01001864
Zhao Yakuib9219c52009-09-10 15:45:46 +08001865 changed = true;
1866 }
1867 }
Zhao Yakuice6feab2009-08-24 13:50:26 +08001868 if (changed && crtc)
1869 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1870 crtc->y, crtc->fb);
Chris Wilson32aad862010-08-04 13:50:25 +01001871 return 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001872}
1873
Jesse Barnes79e53942008-11-07 14:24:08 -08001874static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1875 .dpms = intel_sdvo_dpms,
1876 .mode_fixup = intel_sdvo_mode_fixup,
1877 .prepare = intel_encoder_prepare,
1878 .mode_set = intel_sdvo_mode_set,
1879 .commit = intel_encoder_commit,
1880};
1881
1882static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
Keith Packardc9fb15f2009-05-30 20:42:28 -07001883 .dpms = drm_helper_connector_dpms,
Jesse Barnes79e53942008-11-07 14:24:08 -08001884 .detect = intel_sdvo_detect,
1885 .fill_modes = drm_helper_probe_single_connector_modes,
Zhao Yakuice6feab2009-08-24 13:50:26 +08001886 .set_property = intel_sdvo_set_property,
Jesse Barnes79e53942008-11-07 14:24:08 -08001887 .destroy = intel_sdvo_destroy,
1888};
1889
1890static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1891 .get_modes = intel_sdvo_get_modes,
1892 .mode_valid = intel_sdvo_mode_valid,
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001893 .best_encoder = intel_attached_encoder,
Jesse Barnes79e53942008-11-07 14:24:08 -08001894};
1895
Hannes Ederb358d0a2008-12-18 21:18:47 +01001896static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -08001897{
Chris Wilsonea5b2132010-08-04 13:50:23 +01001898 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001899
Chris Wilsonea5b2132010-08-04 13:50:23 +01001900 if (intel_sdvo->analog_ddc_bus)
1901 intel_i2c_destroy(intel_sdvo->analog_ddc_bus);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001902
Chris Wilsonea5b2132010-08-04 13:50:23 +01001903 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001904 drm_mode_destroy(encoder->dev,
Chris Wilsonea5b2132010-08-04 13:50:23 +01001905 intel_sdvo->sdvo_lvds_fixed_mode);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001906
Chris Wilsonea5b2132010-08-04 13:50:23 +01001907 intel_encoder_destroy(encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -08001908}
1909
1910static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1911 .destroy = intel_sdvo_enc_destroy,
1912};
1913
1914
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001915/**
1916 * Choose the appropriate DDC bus for control bus switch command for this
1917 * SDVO output based on the controlled output.
1918 *
1919 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1920 * outputs, then LVDS outputs.
1921 */
1922static void
Adam Jacksonb1083332010-04-23 16:07:40 -04001923intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
Chris Wilsonea5b2132010-08-04 13:50:23 +01001924 struct intel_sdvo *sdvo, u32 reg)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001925{
Adam Jacksonb1083332010-04-23 16:07:40 -04001926 struct sdvo_device_mapping *mapping;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001927
Adam Jacksonb1083332010-04-23 16:07:40 -04001928 if (IS_SDVOB(reg))
1929 mapping = &(dev_priv->sdvo_mappings[0]);
1930 else
1931 mapping = &(dev_priv->sdvo_mappings[1]);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001932
Adam Jacksonb1083332010-04-23 16:07:40 -04001933 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001934}
1935
1936static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01001937intel_sdvo_get_digital_encoding_mode(struct intel_sdvo *intel_sdvo, int device)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001938{
Chris Wilson32aad862010-08-04 13:50:25 +01001939 return intel_sdvo_set_target_output(intel_sdvo,
1940 device == 0 ? SDVO_OUTPUT_TMDS0 : SDVO_OUTPUT_TMDS1) &&
1941 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE,
1942 &intel_sdvo->is_hdmi, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001943}
1944
Chris Wilsonea5b2132010-08-04 13:50:23 +01001945static struct intel_sdvo *
1946intel_sdvo_chan_to_intel_sdvo(struct intel_i2c_chan *chan)
Ma Ling619ac3b2009-05-18 16:12:46 +08001947{
1948 struct drm_device *dev = chan->drm_dev;
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001949 struct drm_encoder *encoder;
Ma Ling619ac3b2009-05-18 16:12:46 +08001950
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001951 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001952 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
1953 if (intel_sdvo->base.ddc_bus == &chan->adapter)
1954 return intel_sdvo;
Ma Ling619ac3b2009-05-18 16:12:46 +08001955 }
Chris Wilsonea5b2132010-08-04 13:50:23 +01001956
Chris Wilson32aad862010-08-04 13:50:25 +01001957 return NULL;
Ma Ling619ac3b2009-05-18 16:12:46 +08001958}
1959
1960static int intel_sdvo_master_xfer(struct i2c_adapter *i2c_adap,
1961 struct i2c_msg msgs[], int num)
1962{
Chris Wilsonea5b2132010-08-04 13:50:23 +01001963 struct intel_sdvo *intel_sdvo;
Ma Ling619ac3b2009-05-18 16:12:46 +08001964 struct i2c_algo_bit_data *algo_data;
Keith Packardf9c10a92009-05-30 12:16:25 -07001965 const struct i2c_algorithm *algo;
Ma Ling619ac3b2009-05-18 16:12:46 +08001966
1967 algo_data = (struct i2c_algo_bit_data *)i2c_adap->algo_data;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001968 intel_sdvo =
1969 intel_sdvo_chan_to_intel_sdvo((struct intel_i2c_chan *)
1970 (algo_data->data));
1971 if (intel_sdvo == NULL)
Ma Ling619ac3b2009-05-18 16:12:46 +08001972 return -EINVAL;
1973
Chris Wilsonea5b2132010-08-04 13:50:23 +01001974 algo = intel_sdvo->base.i2c_bus->algo;
Ma Ling619ac3b2009-05-18 16:12:46 +08001975
Chris Wilsonea5b2132010-08-04 13:50:23 +01001976 intel_sdvo_set_control_bus_switch(intel_sdvo, intel_sdvo->ddc_bus);
Ma Ling619ac3b2009-05-18 16:12:46 +08001977 return algo->master_xfer(i2c_adap, msgs, num);
1978}
1979
1980static struct i2c_algorithm intel_sdvo_i2c_bit_algo = {
1981 .master_xfer = intel_sdvo_master_xfer,
1982};
1983
yakui_zhao714605e2009-05-31 17:18:07 +08001984static u8
Eric Anholtc751ce42010-03-25 11:48:48 -07001985intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
yakui_zhao714605e2009-05-31 17:18:07 +08001986{
1987 struct drm_i915_private *dev_priv = dev->dev_private;
1988 struct sdvo_device_mapping *my_mapping, *other_mapping;
1989
Zhao Yakui461ed3c2010-03-30 15:11:33 +08001990 if (IS_SDVOB(sdvo_reg)) {
yakui_zhao714605e2009-05-31 17:18:07 +08001991 my_mapping = &dev_priv->sdvo_mappings[0];
1992 other_mapping = &dev_priv->sdvo_mappings[1];
1993 } else {
1994 my_mapping = &dev_priv->sdvo_mappings[1];
1995 other_mapping = &dev_priv->sdvo_mappings[0];
1996 }
1997
1998 /* If the BIOS described our SDVO device, take advantage of it. */
1999 if (my_mapping->slave_addr)
2000 return my_mapping->slave_addr;
2001
2002 /* If the BIOS only described a different SDVO device, use the
2003 * address that it isn't using.
2004 */
2005 if (other_mapping->slave_addr) {
2006 if (other_mapping->slave_addr == 0x70)
2007 return 0x72;
2008 else
2009 return 0x70;
2010 }
2011
2012 /* No SDVO device info is found for another DVO port,
2013 * so use mapping assumption we had before BIOS parsing.
2014 */
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002015 if (IS_SDVOB(sdvo_reg))
yakui_zhao714605e2009-05-31 17:18:07 +08002016 return 0x70;
2017 else
2018 return 0x72;
2019}
2020
Zhenyu Wang14571b42010-03-30 14:06:33 +08002021static void
Chris Wilson32aad862010-08-04 13:50:25 +01002022intel_sdvo_connector_init(struct drm_encoder *encoder,
2023 struct drm_connector *connector)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002024{
2025 drm_connector_init(encoder->dev, connector, &intel_sdvo_connector_funcs,
2026 connector->connector_type);
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002027
Zhenyu Wang14571b42010-03-30 14:06:33 +08002028 drm_connector_helper_add(connector, &intel_sdvo_connector_helper_funcs);
2029
2030 connector->interlace_allowed = 0;
2031 connector->doublescan_allowed = 0;
2032 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
2033
2034 drm_mode_connector_attach_encoder(connector, encoder);
2035 drm_sysfs_connector_add(connector);
2036}
2037
2038static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002039intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002040{
Chris Wilsonea5b2132010-08-04 13:50:23 +01002041 struct drm_encoder *encoder = &intel_sdvo->base.enc;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002042 struct drm_connector *connector;
2043 struct intel_connector *intel_connector;
Chris Wilson615fb932010-08-04 13:50:24 +01002044 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002045
Chris Wilson615fb932010-08-04 13:50:24 +01002046 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2047 if (!intel_sdvo_connector)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002048 return false;
2049
Zhenyu Wang14571b42010-03-30 14:06:33 +08002050 if (device == 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002051 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
Chris Wilson615fb932010-08-04 13:50:24 +01002052 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002053 } else if (device == 1) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002054 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
Chris Wilson615fb932010-08-04 13:50:24 +01002055 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002056 }
2057
Chris Wilson615fb932010-08-04 13:50:24 +01002058 intel_connector = &intel_sdvo_connector->base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002059 connector = &intel_connector->base;
Dave Airlieeb1f8e42010-05-07 06:42:51 +00002060 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002061 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2062 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2063
Chris Wilsonea5b2132010-08-04 13:50:23 +01002064 if (intel_sdvo_get_supp_encode(intel_sdvo, &intel_sdvo->encode)
2065 && intel_sdvo_get_digital_encoding_mode(intel_sdvo, device)
2066 && intel_sdvo->is_hdmi) {
Zhenyu Wang14571b42010-03-30 14:06:33 +08002067 /* enable hdmi encoding mode if supported */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002068 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
2069 intel_sdvo_set_colorimetry(intel_sdvo,
Zhenyu Wang14571b42010-03-30 14:06:33 +08002070 SDVO_COLORIMETRY_RGB256);
2071 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2072 }
Chris Wilsonea5b2132010-08-04 13:50:23 +01002073 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2074 (1 << INTEL_ANALOG_CLONE_BIT));
Zhenyu Wang14571b42010-03-30 14:06:33 +08002075
Chris Wilson32aad862010-08-04 13:50:25 +01002076 intel_sdvo_connector_init(encoder, connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002077
2078 return true;
2079}
2080
2081static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002082intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002083{
Chris Wilsonea5b2132010-08-04 13:50:23 +01002084 struct drm_encoder *encoder = &intel_sdvo->base.enc;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002085 struct drm_connector *connector;
2086 struct intel_connector *intel_connector;
Chris Wilson615fb932010-08-04 13:50:24 +01002087 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002088
Chris Wilson615fb932010-08-04 13:50:24 +01002089 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2090 if (!intel_sdvo_connector)
2091 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002092
Chris Wilson615fb932010-08-04 13:50:24 +01002093 intel_connector = &intel_sdvo_connector->base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002094 connector = &intel_connector->base;
2095 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2096 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002097
Chris Wilsonea5b2132010-08-04 13:50:23 +01002098 intel_sdvo->controlled_output |= type;
Chris Wilson615fb932010-08-04 13:50:24 +01002099 intel_sdvo_connector->output_flag = type;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002100
Chris Wilsonea5b2132010-08-04 13:50:23 +01002101 intel_sdvo->is_tv = true;
2102 intel_sdvo->base.needs_tv_clock = true;
2103 intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002104
Chris Wilson32aad862010-08-04 13:50:25 +01002105 intel_sdvo_connector_init(encoder, connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002106
Chris Wilson32aad862010-08-04 13:50:25 +01002107 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2108 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002109
Chris Wilson32aad862010-08-04 13:50:25 +01002110 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2111 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002112
2113 return true;
Chris Wilson32aad862010-08-04 13:50:25 +01002114
2115err:
2116 kfree(intel_sdvo_connector);
2117 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002118}
2119
2120static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002121intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002122{
Chris Wilsonea5b2132010-08-04 13:50:23 +01002123 struct drm_encoder *encoder = &intel_sdvo->base.enc;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002124 struct drm_connector *connector;
2125 struct intel_connector *intel_connector;
Chris Wilson615fb932010-08-04 13:50:24 +01002126 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002127
Chris Wilson615fb932010-08-04 13:50:24 +01002128 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2129 if (!intel_sdvo_connector)
2130 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002131
Chris Wilson615fb932010-08-04 13:50:24 +01002132 intel_connector = &intel_sdvo_connector->base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002133 connector = &intel_connector->base;
Dave Airlieeb1f8e42010-05-07 06:42:51 +00002134 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002135 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2136 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002137
2138 if (device == 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002139 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
Chris Wilson615fb932010-08-04 13:50:24 +01002140 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002141 } else if (device == 1) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002142 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
Chris Wilson615fb932010-08-04 13:50:24 +01002143 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002144 }
2145
Chris Wilsonea5b2132010-08-04 13:50:23 +01002146 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2147 (1 << INTEL_ANALOG_CLONE_BIT));
Zhenyu Wang14571b42010-03-30 14:06:33 +08002148
Chris Wilson32aad862010-08-04 13:50:25 +01002149 intel_sdvo_connector_init(encoder, connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002150 return true;
2151}
2152
2153static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002154intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002155{
Chris Wilsonea5b2132010-08-04 13:50:23 +01002156 struct drm_encoder *encoder = &intel_sdvo->base.enc;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002157 struct drm_connector *connector;
2158 struct intel_connector *intel_connector;
Chris Wilson615fb932010-08-04 13:50:24 +01002159 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002160
Chris Wilson615fb932010-08-04 13:50:24 +01002161 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2162 if (!intel_sdvo_connector)
2163 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002164
Chris Wilson615fb932010-08-04 13:50:24 +01002165 intel_connector = &intel_sdvo_connector->base;
2166 connector = &intel_connector->base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002167 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2168 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002169
Chris Wilsonea5b2132010-08-04 13:50:23 +01002170 intel_sdvo->is_lvds = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002171
2172 if (device == 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002173 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
Chris Wilson615fb932010-08-04 13:50:24 +01002174 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002175 } else if (device == 1) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002176 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
Chris Wilson615fb932010-08-04 13:50:24 +01002177 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002178 }
2179
Chris Wilsonea5b2132010-08-04 13:50:23 +01002180 intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2181 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
Zhenyu Wang14571b42010-03-30 14:06:33 +08002182
Chris Wilson32aad862010-08-04 13:50:25 +01002183 intel_sdvo_connector_init(encoder, connector);
2184 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2185 goto err;
2186
2187 return true;
2188
2189err:
2190 kfree(intel_sdvo_connector);
2191 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002192}
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002193
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002194static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002195intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002196{
Chris Wilsonea5b2132010-08-04 13:50:23 +01002197 intel_sdvo->is_tv = false;
2198 intel_sdvo->base.needs_tv_clock = false;
2199 intel_sdvo->is_lvds = false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002200
Zhenyu Wang14571b42010-03-30 14:06:33 +08002201 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002202
Zhenyu Wang14571b42010-03-30 14:06:33 +08002203 if (flags & SDVO_OUTPUT_TMDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002204 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002205 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002206
Zhenyu Wang14571b42010-03-30 14:06:33 +08002207 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002208 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002209 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002210
Zhenyu Wang14571b42010-03-30 14:06:33 +08002211 /* TV has no XXX1 function block */
Zhenyu Wanga1f4b7ff2010-03-29 23:16:13 +08002212 if (flags & SDVO_OUTPUT_SVID0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002213 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002214 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002215
Zhenyu Wang14571b42010-03-30 14:06:33 +08002216 if (flags & SDVO_OUTPUT_CVBS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002217 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002218 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002219
Zhenyu Wang14571b42010-03-30 14:06:33 +08002220 if (flags & SDVO_OUTPUT_RGB0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002221 if (!intel_sdvo_analog_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002222 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002223
Zhenyu Wang14571b42010-03-30 14:06:33 +08002224 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002225 if (!intel_sdvo_analog_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002226 return false;
Zhao Yakui2dd87382010-01-27 16:32:46 +08002227
Zhenyu Wang14571b42010-03-30 14:06:33 +08002228 if (flags & SDVO_OUTPUT_LVDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002229 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002230 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002231
Zhenyu Wang14571b42010-03-30 14:06:33 +08002232 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002233 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002234 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002235
Zhenyu Wang14571b42010-03-30 14:06:33 +08002236 if ((flags & SDVO_OUTPUT_MASK) == 0) {
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002237 unsigned char bytes[2];
2238
Chris Wilsonea5b2132010-08-04 13:50:23 +01002239 intel_sdvo->controlled_output = 0;
2240 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
Dave Airlie51c8b402009-08-20 13:38:04 +10002241 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002242 SDVO_NAME(intel_sdvo),
Dave Airlie51c8b402009-08-20 13:38:04 +10002243 bytes[0], bytes[1]);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002244 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002245 }
Chris Wilsonea5b2132010-08-04 13:50:23 +01002246 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002247
Zhenyu Wang14571b42010-03-30 14:06:33 +08002248 return true;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002249}
2250
Chris Wilson32aad862010-08-04 13:50:25 +01002251static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2252 struct intel_sdvo_connector *intel_sdvo_connector,
2253 int type)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002254{
Chris Wilson32aad862010-08-04 13:50:25 +01002255 struct drm_device *dev = intel_sdvo->base.enc.dev;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002256 struct intel_sdvo_tv_format format;
2257 uint32_t format_map, i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002258
Chris Wilson32aad862010-08-04 13:50:25 +01002259 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2260 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002261
Chris Wilson32aad862010-08-04 13:50:25 +01002262 if (!intel_sdvo_get_value(intel_sdvo,
2263 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2264 &format, sizeof(format)))
2265 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002266
Chris Wilson32aad862010-08-04 13:50:25 +01002267 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08002268
2269 if (format_map == 0)
Chris Wilson32aad862010-08-04 13:50:25 +01002270 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002271
Chris Wilson615fb932010-08-04 13:50:24 +01002272 intel_sdvo_connector->format_supported_num = 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002273 for (i = 0 ; i < TV_FORMAT_NUM; i++)
2274 if (format_map & (1 << i)) {
Chris Wilson615fb932010-08-04 13:50:24 +01002275 intel_sdvo_connector->tv_format_supported
2276 [intel_sdvo_connector->format_supported_num++] =
Zhao Yakuice6feab2009-08-24 13:50:26 +08002277 tv_format_names[i];
2278 }
2279
2280
Chris Wilson615fb932010-08-04 13:50:24 +01002281 intel_sdvo_connector->tv_format_property =
Chris Wilson32aad862010-08-04 13:50:25 +01002282 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2283 "mode", intel_sdvo_connector->format_supported_num);
Zhao Yakuice6feab2009-08-24 13:50:26 +08002284
Chris Wilson615fb932010-08-04 13:50:24 +01002285 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002286 drm_property_add_enum(
Chris Wilson615fb932010-08-04 13:50:24 +01002287 intel_sdvo_connector->tv_format_property, i,
2288 i, intel_sdvo_connector->tv_format_supported[i]);
Zhao Yakuice6feab2009-08-24 13:50:26 +08002289
Chris Wilson615fb932010-08-04 13:50:24 +01002290 intel_sdvo->tv_format_name = intel_sdvo_connector->tv_format_supported[0];
Chris Wilson32aad862010-08-04 13:50:25 +01002291 drm_connector_attach_property(&intel_sdvo_connector->base.base,
2292 intel_sdvo_connector->tv_format_property, 0);
2293 return true;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002294
2295}
2296
Chris Wilson32aad862010-08-04 13:50:25 +01002297static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2298 struct intel_sdvo_connector *intel_sdvo_connector)
Zhao Yakuib9219c52009-09-10 15:45:46 +08002299{
Chris Wilson32aad862010-08-04 13:50:25 +01002300 struct drm_device *dev = intel_sdvo->base.enc.dev;
2301 struct drm_connector *connector = &intel_sdvo_connector->base.base;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002302 struct intel_sdvo_enhancements_reply sdvo_data;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002303 uint16_t response, data_value[2];
2304
Chris Wilson32aad862010-08-04 13:50:25 +01002305 if (!intel_sdvo_get_value(intel_sdvo,
2306 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2307 &sdvo_data, sizeof(sdvo_data)))
2308 return false;
2309
Zhao Yakuib9219c52009-09-10 15:45:46 +08002310 response = *((uint16_t *)&sdvo_data);
2311 if (!response) {
2312 DRM_DEBUG_KMS("No enhancement is supported\n");
Chris Wilson32aad862010-08-04 13:50:25 +01002313 return true;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002314 }
Chris Wilsonea5b2132010-08-04 13:50:23 +01002315 if (IS_TV(intel_sdvo_connector)) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08002316 /* when horizontal overscan is supported, Add the left/right
2317 * property
2318 */
2319 if (sdvo_data.overscan_h) {
Chris Wilson32aad862010-08-04 13:50:25 +01002320 if (!intel_sdvo_get_value(intel_sdvo,
2321 SDVO_CMD_GET_MAX_OVERSCAN_H,
2322 &data_value, 4))
2323 return false;
2324
2325 if (!intel_sdvo_get_value(intel_sdvo,
2326 SDVO_CMD_GET_OVERSCAN_H,
2327 &response, 2))
2328 return false;
2329
Chris Wilsonea5b2132010-08-04 13:50:23 +01002330 intel_sdvo_connector->max_hscan = data_value[0];
2331 intel_sdvo_connector->left_margin = data_value[0] - response;
2332 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2333 intel_sdvo_connector->left_property =
Zhao Yakuib9219c52009-09-10 15:45:46 +08002334 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2335 "left_margin", 2);
Chris Wilsonea5b2132010-08-04 13:50:23 +01002336 intel_sdvo_connector->left_property->values[0] = 0;
2337 intel_sdvo_connector->left_property->values[1] = data_value[0];
Zhao Yakuib9219c52009-09-10 15:45:46 +08002338 drm_connector_attach_property(connector,
Chris Wilsonea5b2132010-08-04 13:50:23 +01002339 intel_sdvo_connector->left_property,
2340 intel_sdvo_connector->left_margin);
2341 intel_sdvo_connector->right_property =
Zhao Yakuib9219c52009-09-10 15:45:46 +08002342 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2343 "right_margin", 2);
Chris Wilsonea5b2132010-08-04 13:50:23 +01002344 intel_sdvo_connector->right_property->values[0] = 0;
2345 intel_sdvo_connector->right_property->values[1] = data_value[0];
Zhao Yakuib9219c52009-09-10 15:45:46 +08002346 drm_connector_attach_property(connector,
Chris Wilsonea5b2132010-08-04 13:50:23 +01002347 intel_sdvo_connector->right_property,
2348 intel_sdvo_connector->right_margin);
Zhao Yakuib9219c52009-09-10 15:45:46 +08002349 DRM_DEBUG_KMS("h_overscan: max %d, "
2350 "default %d, current %d\n",
2351 data_value[0], data_value[1], response);
2352 }
2353 if (sdvo_data.overscan_v) {
Chris Wilson32aad862010-08-04 13:50:25 +01002354 if (!intel_sdvo_get_value(intel_sdvo,
2355 SDVO_CMD_GET_MAX_OVERSCAN_V,
2356 &data_value, 4))
2357 return false;
2358
2359 if (!intel_sdvo_get_value(intel_sdvo,
2360 SDVO_CMD_GET_OVERSCAN_V,
2361 &response, 2))
2362 return false;
2363
Chris Wilsonea5b2132010-08-04 13:50:23 +01002364 intel_sdvo_connector->max_vscan = data_value[0];
2365 intel_sdvo_connector->top_margin = data_value[0] - response;
2366 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2367 intel_sdvo_connector->top_property =
Zhao Yakuib9219c52009-09-10 15:45:46 +08002368 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2369 "top_margin", 2);
Chris Wilsonea5b2132010-08-04 13:50:23 +01002370 intel_sdvo_connector->top_property->values[0] = 0;
2371 intel_sdvo_connector->top_property->values[1] = data_value[0];
Zhao Yakuib9219c52009-09-10 15:45:46 +08002372 drm_connector_attach_property(connector,
Chris Wilsonea5b2132010-08-04 13:50:23 +01002373 intel_sdvo_connector->top_property,
2374 intel_sdvo_connector->top_margin);
2375 intel_sdvo_connector->bottom_property =
Zhao Yakuib9219c52009-09-10 15:45:46 +08002376 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2377 "bottom_margin", 2);
Chris Wilsonea5b2132010-08-04 13:50:23 +01002378 intel_sdvo_connector->bottom_property->values[0] = 0;
2379 intel_sdvo_connector->bottom_property->values[1] = data_value[0];
Zhao Yakuib9219c52009-09-10 15:45:46 +08002380 drm_connector_attach_property(connector,
Chris Wilsonea5b2132010-08-04 13:50:23 +01002381 intel_sdvo_connector->bottom_property,
2382 intel_sdvo_connector->bottom_margin);
Zhao Yakuib9219c52009-09-10 15:45:46 +08002383 DRM_DEBUG_KMS("v_overscan: max %d, "
2384 "default %d, current %d\n",
2385 data_value[0], data_value[1], response);
2386 }
2387 if (sdvo_data.position_h) {
Chris Wilson32aad862010-08-04 13:50:25 +01002388 if (!intel_sdvo_get_value(intel_sdvo,
2389 SDVO_CMD_GET_MAX_POSITION_H,
2390 &data_value, 4))
2391 return false;
2392
2393 if (!intel_sdvo_get_value(intel_sdvo,
2394 SDVO_CMD_GET_POSITION_H,
2395 &response, 2))
2396 return false;
2397
Chris Wilsonea5b2132010-08-04 13:50:23 +01002398 intel_sdvo_connector->max_hpos = data_value[0];
2399 intel_sdvo_connector->cur_hpos = response;
2400 intel_sdvo_connector->hpos_property =
Zhao Yakuib9219c52009-09-10 15:45:46 +08002401 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2402 "hpos", 2);
Chris Wilsonea5b2132010-08-04 13:50:23 +01002403 intel_sdvo_connector->hpos_property->values[0] = 0;
2404 intel_sdvo_connector->hpos_property->values[1] = data_value[0];
Zhao Yakuib9219c52009-09-10 15:45:46 +08002405 drm_connector_attach_property(connector,
Chris Wilsonea5b2132010-08-04 13:50:23 +01002406 intel_sdvo_connector->hpos_property,
2407 intel_sdvo_connector->cur_hpos);
Zhao Yakuib9219c52009-09-10 15:45:46 +08002408 DRM_DEBUG_KMS("h_position: max %d, "
2409 "default %d, current %d\n",
2410 data_value[0], data_value[1], response);
2411 }
2412 if (sdvo_data.position_v) {
Chris Wilson32aad862010-08-04 13:50:25 +01002413 if (!intel_sdvo_get_value(intel_sdvo,
2414 SDVO_CMD_GET_MAX_POSITION_V,
2415 &data_value, 4))
2416 return false;
2417
2418 if (!intel_sdvo_get_value(intel_sdvo,
2419 SDVO_CMD_GET_POSITION_V,
2420 &response, 2))
2421 return false;
2422
Chris Wilsonea5b2132010-08-04 13:50:23 +01002423 intel_sdvo_connector->max_vpos = data_value[0];
2424 intel_sdvo_connector->cur_vpos = response;
2425 intel_sdvo_connector->vpos_property =
Zhao Yakuib9219c52009-09-10 15:45:46 +08002426 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2427 "vpos", 2);
Chris Wilsonea5b2132010-08-04 13:50:23 +01002428 intel_sdvo_connector->vpos_property->values[0] = 0;
2429 intel_sdvo_connector->vpos_property->values[1] = data_value[0];
Zhao Yakuib9219c52009-09-10 15:45:46 +08002430 drm_connector_attach_property(connector,
Chris Wilsonea5b2132010-08-04 13:50:23 +01002431 intel_sdvo_connector->vpos_property,
2432 intel_sdvo_connector->cur_vpos);
Zhao Yakuib9219c52009-09-10 15:45:46 +08002433 DRM_DEBUG_KMS("v_position: max %d, "
2434 "default %d, current %d\n",
2435 data_value[0], data_value[1], response);
2436 }
Zhao Yakuib9219c52009-09-10 15:45:46 +08002437 if (sdvo_data.saturation) {
Chris Wilson32aad862010-08-04 13:50:25 +01002438 if (!intel_sdvo_get_value(intel_sdvo,
2439 SDVO_CMD_GET_MAX_SATURATION,
2440 &data_value, 4))
2441 return false;
2442
2443 if (!intel_sdvo_get_value(intel_sdvo,
2444 SDVO_CMD_GET_SATURATION,
2445 &response, 2))
2446 return false;
2447
Chris Wilsonea5b2132010-08-04 13:50:23 +01002448 intel_sdvo_connector->max_saturation = data_value[0];
2449 intel_sdvo_connector->cur_saturation = response;
2450 intel_sdvo_connector->saturation_property =
Zhao Yakuib9219c52009-09-10 15:45:46 +08002451 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2452 "saturation", 2);
Chris Wilsonea5b2132010-08-04 13:50:23 +01002453 intel_sdvo_connector->saturation_property->values[0] = 0;
2454 intel_sdvo_connector->saturation_property->values[1] =
Zhao Yakuib9219c52009-09-10 15:45:46 +08002455 data_value[0];
2456 drm_connector_attach_property(connector,
Chris Wilsonea5b2132010-08-04 13:50:23 +01002457 intel_sdvo_connector->saturation_property,
2458 intel_sdvo_connector->cur_saturation);
Zhao Yakuib9219c52009-09-10 15:45:46 +08002459 DRM_DEBUG_KMS("saturation: max %d, "
2460 "default %d, current %d\n",
2461 data_value[0], data_value[1], response);
2462 }
2463 if (sdvo_data.contrast) {
Chris Wilson32aad862010-08-04 13:50:25 +01002464 if (!intel_sdvo_get_value(intel_sdvo,
2465 SDVO_CMD_GET_MAX_CONTRAST, &data_value, 4))
2466 return false;
2467
2468 if (!intel_sdvo_get_value(intel_sdvo,
2469 SDVO_CMD_GET_CONTRAST, &response, 2))
2470 return false;
2471
Chris Wilsonea5b2132010-08-04 13:50:23 +01002472 intel_sdvo_connector->max_contrast = data_value[0];
2473 intel_sdvo_connector->cur_contrast = response;
2474 intel_sdvo_connector->contrast_property =
Zhao Yakuib9219c52009-09-10 15:45:46 +08002475 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2476 "contrast", 2);
Chris Wilsonea5b2132010-08-04 13:50:23 +01002477 intel_sdvo_connector->contrast_property->values[0] = 0;
2478 intel_sdvo_connector->contrast_property->values[1] = data_value[0];
Zhao Yakuib9219c52009-09-10 15:45:46 +08002479 drm_connector_attach_property(connector,
Chris Wilsonea5b2132010-08-04 13:50:23 +01002480 intel_sdvo_connector->contrast_property,
2481 intel_sdvo_connector->cur_contrast);
Zhao Yakuib9219c52009-09-10 15:45:46 +08002482 DRM_DEBUG_KMS("contrast: max %d, "
2483 "default %d, current %d\n",
2484 data_value[0], data_value[1], response);
2485 }
2486 if (sdvo_data.hue) {
Chris Wilson32aad862010-08-04 13:50:25 +01002487 if (!intel_sdvo_get_value(intel_sdvo,
2488 SDVO_CMD_GET_MAX_HUE, &data_value, 4))
2489 return false;
2490
2491 if (!intel_sdvo_get_value(intel_sdvo,
2492 SDVO_CMD_GET_HUE, &response, 2))
2493 return false;
2494
Chris Wilsonea5b2132010-08-04 13:50:23 +01002495 intel_sdvo_connector->max_hue = data_value[0];
2496 intel_sdvo_connector->cur_hue = response;
2497 intel_sdvo_connector->hue_property =
Zhao Yakuib9219c52009-09-10 15:45:46 +08002498 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2499 "hue", 2);
Chris Wilsonea5b2132010-08-04 13:50:23 +01002500 intel_sdvo_connector->hue_property->values[0] = 0;
2501 intel_sdvo_connector->hue_property->values[1] =
Zhao Yakuib9219c52009-09-10 15:45:46 +08002502 data_value[0];
2503 drm_connector_attach_property(connector,
Chris Wilsonea5b2132010-08-04 13:50:23 +01002504 intel_sdvo_connector->hue_property,
2505 intel_sdvo_connector->cur_hue);
Zhao Yakuib9219c52009-09-10 15:45:46 +08002506 DRM_DEBUG_KMS("hue: max %d, default %d, current %d\n",
2507 data_value[0], data_value[1], response);
2508 }
2509 }
Chris Wilson32aad862010-08-04 13:50:25 +01002510 if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08002511 if (sdvo_data.brightness) {
Chris Wilson32aad862010-08-04 13:50:25 +01002512 if (!intel_sdvo_get_value(intel_sdvo,
2513 SDVO_CMD_GET_MAX_BRIGHTNESS, &data_value, 4))
2514 return false;
2515
2516 if (!intel_sdvo_get_value(intel_sdvo,
2517 SDVO_CMD_GET_BRIGHTNESS, &response, 2))
2518 return false;
2519
Chris Wilsonea5b2132010-08-04 13:50:23 +01002520 intel_sdvo_connector->max_brightness = data_value[0];
2521 intel_sdvo_connector->cur_brightness = response;
2522 intel_sdvo_connector->brightness_property =
Zhao Yakuib9219c52009-09-10 15:45:46 +08002523 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2524 "brightness", 2);
Chris Wilsonea5b2132010-08-04 13:50:23 +01002525 intel_sdvo_connector->brightness_property->values[0] = 0;
2526 intel_sdvo_connector->brightness_property->values[1] =
Zhao Yakuib9219c52009-09-10 15:45:46 +08002527 data_value[0];
2528 drm_connector_attach_property(connector,
Chris Wilsonea5b2132010-08-04 13:50:23 +01002529 intel_sdvo_connector->brightness_property,
2530 intel_sdvo_connector->cur_brightness);
Zhao Yakuib9219c52009-09-10 15:45:46 +08002531 DRM_DEBUG_KMS("brightness: max %d, "
2532 "default %d, current %d\n",
2533 data_value[0], data_value[1], response);
2534 }
2535 }
Chris Wilson32aad862010-08-04 13:50:25 +01002536 return true;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002537}
2538
Eric Anholtc751ce42010-03-25 11:48:48 -07002539bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
Jesse Barnes79e53942008-11-07 14:24:08 -08002540{
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002541 struct drm_i915_private *dev_priv = dev->dev_private;
Eric Anholt21d40d32010-03-25 11:11:14 -07002542 struct intel_encoder *intel_encoder;
Chris Wilsonea5b2132010-08-04 13:50:23 +01002543 struct intel_sdvo *intel_sdvo;
Jesse Barnes79e53942008-11-07 14:24:08 -08002544 u8 ch[0x40];
2545 int i;
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002546 u32 i2c_reg, ddc_reg, analog_ddc_reg;
Jesse Barnes79e53942008-11-07 14:24:08 -08002547
Chris Wilsonea5b2132010-08-04 13:50:23 +01002548 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2549 if (!intel_sdvo)
Eric Anholt7d573822009-01-02 13:33:00 -08002550 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002551
Chris Wilsonea5b2132010-08-04 13:50:23 +01002552 intel_sdvo->sdvo_reg = sdvo_reg;
Keith Packard308cd3a2009-06-14 11:56:18 -07002553
Chris Wilsonea5b2132010-08-04 13:50:23 +01002554 intel_encoder = &intel_sdvo->base;
Eric Anholt21d40d32010-03-25 11:11:14 -07002555 intel_encoder->type = INTEL_OUTPUT_SDVO;
Jesse Barnes79e53942008-11-07 14:24:08 -08002556
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002557 if (HAS_PCH_SPLIT(dev)) {
2558 i2c_reg = PCH_GPIOE;
2559 ddc_reg = PCH_GPIOE;
2560 analog_ddc_reg = PCH_GPIOA;
2561 } else {
2562 i2c_reg = GPIOE;
2563 ddc_reg = GPIOE;
2564 analog_ddc_reg = GPIOA;
2565 }
2566
Jesse Barnes79e53942008-11-07 14:24:08 -08002567 /* setup the DDC bus. */
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002568 if (IS_SDVOB(sdvo_reg))
2569 intel_encoder->i2c_bus = intel_i2c_create(dev, i2c_reg, "SDVOCTRL_E for SDVOB");
Keith Packard308cd3a2009-06-14 11:56:18 -07002570 else
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002571 intel_encoder->i2c_bus = intel_i2c_create(dev, i2c_reg, "SDVOCTRL_E for SDVOC");
Keith Packard308cd3a2009-06-14 11:56:18 -07002572
Eric Anholt21d40d32010-03-25 11:11:14 -07002573 if (!intel_encoder->i2c_bus)
Jonas Bonnad5b2a62009-05-15 09:10:41 +02002574 goto err_inteloutput;
Jesse Barnes79e53942008-11-07 14:24:08 -08002575
Chris Wilsonea5b2132010-08-04 13:50:23 +01002576 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08002577
Keith Packard308cd3a2009-06-14 11:56:18 -07002578 /* Save the bit-banging i2c functionality for use by the DDC wrapper */
Eric Anholt21d40d32010-03-25 11:11:14 -07002579 intel_sdvo_i2c_bit_algo.functionality = intel_encoder->i2c_bus->algo->functionality;
Jesse Barnes79e53942008-11-07 14:24:08 -08002580
Jesse Barnes79e53942008-11-07 14:24:08 -08002581 /* Read the regs to test if we can talk to the device */
2582 for (i = 0; i < 0x40; i++) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002583 if (!intel_sdvo_read_byte(intel_sdvo, i, &ch[i])) {
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08002584 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002585 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
Jesse Barnes79e53942008-11-07 14:24:08 -08002586 goto err_i2c;
2587 }
2588 }
2589
Ma Ling619ac3b2009-05-18 16:12:46 +08002590 /* setup the DDC bus. */
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002591 if (IS_SDVOB(sdvo_reg)) {
2592 intel_encoder->ddc_bus = intel_i2c_create(dev, ddc_reg, "SDVOB DDC BUS");
Chris Wilsonea5b2132010-08-04 13:50:23 +01002593 intel_sdvo->analog_ddc_bus = intel_i2c_create(dev, analog_ddc_reg,
Keith Packard57cdaf92009-09-04 13:07:54 +08002594 "SDVOB/VGA DDC BUS");
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002595 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
Keith Packard57cdaf92009-09-04 13:07:54 +08002596 } else {
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002597 intel_encoder->ddc_bus = intel_i2c_create(dev, ddc_reg, "SDVOC DDC BUS");
Chris Wilsonea5b2132010-08-04 13:50:23 +01002598 intel_sdvo->analog_ddc_bus = intel_i2c_create(dev, analog_ddc_reg,
Keith Packard57cdaf92009-09-04 13:07:54 +08002599 "SDVOC/VGA DDC BUS");
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002600 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
Keith Packard57cdaf92009-09-04 13:07:54 +08002601 }
Chris Wilson32aad862010-08-04 13:50:25 +01002602 if (intel_encoder->ddc_bus == NULL || intel_sdvo->analog_ddc_bus == NULL)
Ma Ling619ac3b2009-05-18 16:12:46 +08002603 goto err_i2c;
2604
Keith Packard308cd3a2009-06-14 11:56:18 -07002605 /* Wrap with our custom algo which switches to DDC mode */
Eric Anholt21d40d32010-03-25 11:11:14 -07002606 intel_encoder->ddc_bus->algo = &intel_sdvo_i2c_bit_algo;
Ma Ling619ac3b2009-05-18 16:12:46 +08002607
Zhenyu Wang14571b42010-03-30 14:06:33 +08002608 /* encoder type will be decided later */
2609 drm_encoder_init(dev, &intel_encoder->enc, &intel_sdvo_enc_funcs, 0);
2610 drm_encoder_helper_add(&intel_encoder->enc, &intel_sdvo_helper_funcs);
2611
André Goddard Rosaaf901ca2009-11-14 13:09:05 -02002612 /* In default case sdvo lvds is false */
Chris Wilson32aad862010-08-04 13:50:25 +01002613 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2614 goto err_enc;
Jesse Barnes79e53942008-11-07 14:24:08 -08002615
Chris Wilsonea5b2132010-08-04 13:50:23 +01002616 if (intel_sdvo_output_setup(intel_sdvo,
2617 intel_sdvo->caps.output_flags) != true) {
Dave Airlie51c8b402009-08-20 13:38:04 +10002618 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002619 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
Chris Wilson32aad862010-08-04 13:50:25 +01002620 goto err_enc;
Jesse Barnes79e53942008-11-07 14:24:08 -08002621 }
2622
Chris Wilsonea5b2132010-08-04 13:50:23 +01002623 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002624
Jesse Barnes79e53942008-11-07 14:24:08 -08002625 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01002626 if (!intel_sdvo_set_target_input(intel_sdvo))
2627 goto err_enc;
Jesse Barnes79e53942008-11-07 14:24:08 -08002628
Chris Wilson32aad862010-08-04 13:50:25 +01002629 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2630 &intel_sdvo->pixel_clock_min,
2631 &intel_sdvo->pixel_clock_max))
2632 goto err_enc;
Jesse Barnes79e53942008-11-07 14:24:08 -08002633
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08002634 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
yakui_zhao342dc382009-06-02 14:12:00 +08002635 "clock range %dMHz - %dMHz, "
2636 "input 1: %c, input 2: %c, "
2637 "output 1: %c, output 2: %c\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002638 SDVO_NAME(intel_sdvo),
2639 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2640 intel_sdvo->caps.device_rev_id,
2641 intel_sdvo->pixel_clock_min / 1000,
2642 intel_sdvo->pixel_clock_max / 1000,
2643 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2644 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
yakui_zhao342dc382009-06-02 14:12:00 +08002645 /* check currently supported outputs */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002646 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002647 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
Chris Wilsonea5b2132010-08-04 13:50:23 +01002648 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002649 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
Eric Anholt7d573822009-01-02 13:33:00 -08002650 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08002651
Chris Wilson32aad862010-08-04 13:50:25 +01002652err_enc:
2653 drm_encoder_cleanup(&intel_encoder->enc);
Jesse Barnes79e53942008-11-07 14:24:08 -08002654err_i2c:
Chris Wilsonea5b2132010-08-04 13:50:23 +01002655 if (intel_sdvo->analog_ddc_bus != NULL)
2656 intel_i2c_destroy(intel_sdvo->analog_ddc_bus);
Eric Anholt21d40d32010-03-25 11:11:14 -07002657 if (intel_encoder->ddc_bus != NULL)
2658 intel_i2c_destroy(intel_encoder->ddc_bus);
2659 if (intel_encoder->i2c_bus != NULL)
2660 intel_i2c_destroy(intel_encoder->i2c_bus);
Jonas Bonnad5b2a62009-05-15 09:10:41 +02002661err_inteloutput:
Chris Wilsonea5b2132010-08-04 13:50:23 +01002662 kfree(intel_sdvo);
Jesse Barnes79e53942008-11-07 14:24:08 -08002663
Eric Anholt7d573822009-01-02 13:33:00 -08002664 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002665}