| Pawel Moll | 8deed17 | 2012-02-23 13:04:51 +0000 | [diff] [blame] | 1 | /* |
| 2 | * ARM Ltd. Versatile Express |
| 3 | * |
| 4 | * Motherboard Express uATX |
| 5 | * V2M-P1 |
| 6 | * |
| 7 | * HBI-0190D |
| 8 | * |
| 9 | * Original memory map ("Legacy memory map" in the board's |
| 10 | * Technical Reference Manual) |
| 11 | * |
| 12 | * WARNING! The hardware described in this file is independent from the |
| 13 | * RS1 variant (vexpress-v2m-rs1.dtsi), but there is a strong |
| 14 | * correspondence between the two configurations. |
| 15 | * |
| 16 | * TAKE CARE WHEN MAINTAINING THIS FILE TO PROPAGATE ANY RELEVANT |
| 17 | * CHANGES TO vexpress-v2m-rs1.dtsi! |
| 18 | */ |
| 19 | |
| 20 | / { |
| 21 | aliases { |
| 22 | arm,v2m_timer = &v2m_timer01; |
| 23 | }; |
| 24 | |
| 25 | motherboard { |
| 26 | compatible = "simple-bus"; |
| 27 | #address-cells = <2>; /* SMB chipselect number and offset */ |
| 28 | #size-cells = <1>; |
| 29 | #interrupt-cells = <1>; |
| 30 | |
| 31 | flash@0,00000000 { |
| 32 | compatible = "arm,vexpress-flash", "cfi-flash"; |
| 33 | reg = <0 0x00000000 0x04000000>, |
| 34 | <1 0x00000000 0x04000000>; |
| 35 | bank-width = <4>; |
| 36 | }; |
| 37 | |
| 38 | psram@2,00000000 { |
| 39 | compatible = "arm,vexpress-psram", "mtd-ram"; |
| 40 | reg = <2 0x00000000 0x02000000>; |
| 41 | bank-width = <4>; |
| 42 | }; |
| 43 | |
| 44 | vram@3,00000000 { |
| 45 | compatible = "arm,vexpress-vram"; |
| 46 | reg = <3 0x00000000 0x00800000>; |
| 47 | }; |
| 48 | |
| 49 | ethernet@3,02000000 { |
| 50 | compatible = "smsc,lan9118", "smsc,lan9115"; |
| 51 | reg = <3 0x02000000 0x10000>; |
| 52 | interrupts = <15>; |
| 53 | phy-mode = "mii"; |
| 54 | reg-io-width = <4>; |
| 55 | smsc,irq-active-high; |
| 56 | smsc,irq-push-pull; |
| 57 | }; |
| 58 | |
| 59 | usb@3,03000000 { |
| 60 | compatible = "nxp,usb-isp1761"; |
| 61 | reg = <3 0x03000000 0x20000>; |
| 62 | interrupts = <16>; |
| 63 | port1-otg; |
| 64 | }; |
| 65 | |
| 66 | iofpga@7,00000000 { |
| 67 | compatible = "arm,amba-bus", "simple-bus"; |
| 68 | #address-cells = <1>; |
| 69 | #size-cells = <1>; |
| 70 | ranges = <0 7 0 0x20000>; |
| 71 | |
| 72 | sysreg@00000 { |
| 73 | compatible = "arm,vexpress-sysreg"; |
| 74 | reg = <0x00000 0x1000>; |
| 75 | }; |
| 76 | |
| 77 | sysctl@01000 { |
| 78 | compatible = "arm,sp810", "arm,primecell"; |
| 79 | reg = <0x01000 0x1000>; |
| 80 | }; |
| 81 | |
| 82 | /* PCI-E I2C bus */ |
| 83 | v2m_i2c_pcie: i2c@02000 { |
| 84 | compatible = "arm,versatile-i2c"; |
| 85 | reg = <0x02000 0x1000>; |
| 86 | |
| 87 | #address-cells = <1>; |
| 88 | #size-cells = <0>; |
| 89 | |
| 90 | pcie-switch@60 { |
| 91 | compatible = "idt,89hpes32h8"; |
| 92 | reg = <0x60>; |
| 93 | }; |
| 94 | }; |
| 95 | |
| 96 | aaci@04000 { |
| 97 | compatible = "arm,pl041", "arm,primecell"; |
| 98 | reg = <0x04000 0x1000>; |
| 99 | interrupts = <11>; |
| 100 | }; |
| 101 | |
| 102 | mmci@05000 { |
| 103 | compatible = "arm,pl180", "arm,primecell"; |
| 104 | reg = <0x05000 0x1000>; |
| 105 | interrupts = <9 10>; |
| 106 | }; |
| 107 | |
| 108 | kmi@06000 { |
| 109 | compatible = "arm,pl050", "arm,primecell"; |
| 110 | reg = <0x06000 0x1000>; |
| 111 | interrupts = <12>; |
| 112 | }; |
| 113 | |
| 114 | kmi@07000 { |
| 115 | compatible = "arm,pl050", "arm,primecell"; |
| 116 | reg = <0x07000 0x1000>; |
| 117 | interrupts = <13>; |
| 118 | }; |
| 119 | |
| 120 | v2m_serial0: uart@09000 { |
| 121 | compatible = "arm,pl011", "arm,primecell"; |
| 122 | reg = <0x09000 0x1000>; |
| 123 | interrupts = <5>; |
| 124 | }; |
| 125 | |
| 126 | v2m_serial1: uart@0a000 { |
| 127 | compatible = "arm,pl011", "arm,primecell"; |
| 128 | reg = <0x0a000 0x1000>; |
| 129 | interrupts = <6>; |
| 130 | }; |
| 131 | |
| 132 | v2m_serial2: uart@0b000 { |
| 133 | compatible = "arm,pl011", "arm,primecell"; |
| 134 | reg = <0x0b000 0x1000>; |
| 135 | interrupts = <7>; |
| 136 | }; |
| 137 | |
| 138 | v2m_serial3: uart@0c000 { |
| 139 | compatible = "arm,pl011", "arm,primecell"; |
| 140 | reg = <0x0c000 0x1000>; |
| 141 | interrupts = <8>; |
| 142 | }; |
| 143 | |
| 144 | wdt@0f000 { |
| 145 | compatible = "arm,sp805", "arm,primecell"; |
| 146 | reg = <0x0f000 0x1000>; |
| 147 | interrupts = <0>; |
| 148 | }; |
| 149 | |
| 150 | v2m_timer01: timer@11000 { |
| 151 | compatible = "arm,sp804", "arm,primecell"; |
| 152 | reg = <0x11000 0x1000>; |
| 153 | interrupts = <2>; |
| 154 | }; |
| 155 | |
| 156 | v2m_timer23: timer@12000 { |
| 157 | compatible = "arm,sp804", "arm,primecell"; |
| 158 | reg = <0x12000 0x1000>; |
| 159 | }; |
| 160 | |
| 161 | /* DVI I2C bus */ |
| 162 | v2m_i2c_dvi: i2c@16000 { |
| 163 | compatible = "arm,versatile-i2c"; |
| 164 | reg = <0x16000 0x1000>; |
| 165 | |
| 166 | #address-cells = <1>; |
| 167 | #size-cells = <0>; |
| 168 | |
| 169 | dvi-transmitter@39 { |
| 170 | compatible = "sil,sii9022-tpi", "sil,sii9022"; |
| 171 | reg = <0x39>; |
| 172 | }; |
| 173 | |
| 174 | dvi-transmitter@60 { |
| 175 | compatible = "sil,sii9022-cpi", "sil,sii9022"; |
| 176 | reg = <0x60>; |
| 177 | }; |
| 178 | }; |
| 179 | |
| 180 | rtc@17000 { |
| 181 | compatible = "arm,pl031", "arm,primecell"; |
| 182 | reg = <0x17000 0x1000>; |
| 183 | interrupts = <4>; |
| 184 | }; |
| 185 | |
| 186 | compact-flash@1a000 { |
| 187 | compatible = "arm,vexpress-cf", "ata-generic"; |
| 188 | reg = <0x1a000 0x100 |
| 189 | 0x1a100 0xf00>; |
| 190 | reg-shift = <2>; |
| 191 | }; |
| 192 | |
| 193 | clcd@1f000 { |
| 194 | compatible = "arm,pl111", "arm,primecell"; |
| 195 | reg = <0x1f000 0x1000>; |
| 196 | interrupts = <14>; |
| 197 | }; |
| 198 | }; |
| 199 | }; |
| 200 | }; |