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Thierry Redingd8f4a9e2012-11-15 21:28:22 +00001/*
2 * Copyright (C) 2012 Avionic Design GmbH
Terje Bergstromd43f81c2013-03-22 16:34:09 +02003 * Copyright (C) 2012-2013 NVIDIA CORPORATION. All rights reserved.
Thierry Redingd8f4a9e2012-11-15 21:28:22 +00004 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
Thierry Reding776dc382013-10-14 14:43:22 +020010#include <linux/host1x.h>
Thierry Redingdf06b752014-06-26 21:41:53 +020011#include <linux/iommu.h>
Thierry Reding776dc382013-10-14 14:43:22 +020012
Thierry Reding1503ca42014-11-24 17:41:23 +010013#include <drm/drm_atomic.h>
Thierry Reding07866962014-11-24 17:08:06 +010014#include <drm/drm_atomic_helper.h>
15
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000016#include "drm.h"
Arto Merilainende2ba662013-03-22 16:34:08 +020017#include "gem.h"
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000018
19#define DRIVER_NAME "tegra"
20#define DRIVER_DESC "NVIDIA Tegra graphics"
21#define DRIVER_DATE "20120330"
22#define DRIVER_MAJOR 0
23#define DRIVER_MINOR 0
24#define DRIVER_PATCHLEVEL 0
25
Thierry Reding08943e62013-09-26 16:08:18 +020026struct tegra_drm_file {
27 struct list_head contexts;
28};
29
Thierry Reding1503ca42014-11-24 17:41:23 +010030static void tegra_atomic_schedule(struct tegra_drm *tegra,
31 struct drm_atomic_state *state)
32{
33 tegra->commit.state = state;
34 schedule_work(&tegra->commit.work);
35}
36
37static void tegra_atomic_complete(struct tegra_drm *tegra,
38 struct drm_atomic_state *state)
39{
40 struct drm_device *drm = tegra->drm;
41
42 /*
43 * Everything below can be run asynchronously without the need to grab
44 * any modeset locks at all under one condition: It must be guaranteed
45 * that the asynchronous work has either been cancelled (if the driver
46 * supports it, which at least requires that the framebuffers get
47 * cleaned up with drm_atomic_helper_cleanup_planes()) or completed
48 * before the new state gets committed on the software side with
49 * drm_atomic_helper_swap_state().
50 *
51 * This scheme allows new atomic state updates to be prepared and
52 * checked in parallel to the asynchronous completion of the previous
53 * update. Which is important since compositors need to figure out the
54 * composition of the next frame right after having submitted the
55 * current layout.
56 */
57
58 drm_atomic_helper_commit_pre_planes(drm, state);
59 drm_atomic_helper_commit_planes(drm, state);
60 drm_atomic_helper_commit_post_planes(drm, state);
61
62 drm_atomic_helper_wait_for_vblanks(drm, state);
63
64 drm_atomic_helper_cleanup_planes(drm, state);
65 drm_atomic_state_free(state);
66}
67
68static void tegra_atomic_work(struct work_struct *work)
69{
70 struct tegra_drm *tegra = container_of(work, struct tegra_drm,
71 commit.work);
72
73 tegra_atomic_complete(tegra, tegra->commit.state);
74}
75
76static int tegra_atomic_commit(struct drm_device *drm,
77 struct drm_atomic_state *state, bool async)
78{
79 struct tegra_drm *tegra = drm->dev_private;
80 int err;
81
82 err = drm_atomic_helper_prepare_planes(drm, state);
83 if (err)
84 return err;
85
86 /* serialize outstanding asynchronous commits */
87 mutex_lock(&tegra->commit.lock);
88 flush_work(&tegra->commit.work);
89
90 /*
91 * This is the point of no return - everything below never fails except
92 * when the hw goes bonghits. Which means we can commit the new state on
93 * the software side now.
94 */
95
96 drm_atomic_helper_swap_state(drm, state);
97
98 if (async)
99 tegra_atomic_schedule(tegra, state);
100 else
101 tegra_atomic_complete(tegra, state);
102
103 mutex_unlock(&tegra->commit.lock);
104 return 0;
105}
106
Thierry Redingf9914212014-11-26 13:03:57 +0100107static const struct drm_mode_config_funcs tegra_drm_mode_funcs = {
108 .fb_create = tegra_fb_create,
109#ifdef CONFIG_DRM_TEGRA_FBDEV
110 .output_poll_changed = tegra_fb_output_poll_changed,
111#endif
Thierry Reding07866962014-11-24 17:08:06 +0100112 .atomic_check = drm_atomic_helper_check,
Thierry Reding1503ca42014-11-24 17:41:23 +0100113 .atomic_commit = tegra_atomic_commit,
Thierry Redingf9914212014-11-26 13:03:57 +0100114};
115
Thierry Reding776dc382013-10-14 14:43:22 +0200116static int tegra_drm_load(struct drm_device *drm, unsigned long flags)
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000117{
Thierry Reding776dc382013-10-14 14:43:22 +0200118 struct host1x_device *device = to_host1x_device(drm->dev);
Thierry Reding386a2a72013-09-24 13:22:17 +0200119 struct tegra_drm *tegra;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000120 int err;
121
Thierry Reding776dc382013-10-14 14:43:22 +0200122 tegra = kzalloc(sizeof(*tegra), GFP_KERNEL);
Thierry Reding386a2a72013-09-24 13:22:17 +0200123 if (!tegra)
Terje Bergstrom692e6d72013-03-22 16:34:07 +0200124 return -ENOMEM;
125
Thierry Redingdf06b752014-06-26 21:41:53 +0200126 if (iommu_present(&platform_bus_type)) {
127 tegra->domain = iommu_domain_alloc(&platform_bus_type);
Dan Carpenterbf19b882014-12-04 14:00:35 +0300128 if (!tegra->domain) {
129 err = -ENOMEM;
Thierry Redingdf06b752014-06-26 21:41:53 +0200130 goto free;
131 }
132
133 DRM_DEBUG("IOMMU context initialized\n");
134 drm_mm_init(&tegra->mm, 0, SZ_2G);
135 }
136
Thierry Reding386a2a72013-09-24 13:22:17 +0200137 mutex_init(&tegra->clients_lock);
138 INIT_LIST_HEAD(&tegra->clients);
Thierry Reding1503ca42014-11-24 17:41:23 +0100139
140 mutex_init(&tegra->commit.lock);
141 INIT_WORK(&tegra->commit.work, tegra_atomic_work);
142
Thierry Reding386a2a72013-09-24 13:22:17 +0200143 drm->dev_private = tegra;
144 tegra->drm = drm;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000145
146 drm_mode_config_init(drm);
147
Thierry Redingf9914212014-11-26 13:03:57 +0100148 drm->mode_config.min_width = 0;
149 drm->mode_config.min_height = 0;
150
151 drm->mode_config.max_width = 4096;
152 drm->mode_config.max_height = 4096;
153
154 drm->mode_config.funcs = &tegra_drm_mode_funcs;
155
Thierry Redinge2215322014-06-27 17:19:25 +0200156 err = tegra_drm_fb_prepare(drm);
157 if (err < 0)
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100158 goto config;
Thierry Redinge2215322014-06-27 17:19:25 +0200159
160 drm_kms_helper_poll_init(drm);
161
Thierry Reding776dc382013-10-14 14:43:22 +0200162 err = host1x_device_init(device);
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000163 if (err < 0)
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100164 goto fbdev;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000165
Thierry Reding9d441892014-11-24 17:02:53 +0100166 drm_mode_config_reset(drm);
167
Thierry Reding603f0cc2013-04-22 21:22:14 +0200168 /*
169 * We don't use the drm_irq_install() helpers provided by the DRM
170 * core, so we need to set this manually in order to allow the
171 * DRM_IOCTL_WAIT_VBLANK to operate correctly.
172 */
Ville Syrjälä44238432013-10-04 14:53:37 +0300173 drm->irq_enabled = true;
Thierry Reding603f0cc2013-04-22 21:22:14 +0200174
Thierry Reding6e5ff992012-11-28 11:45:47 +0100175 err = drm_vblank_init(drm, drm->mode_config.num_crtc);
176 if (err < 0)
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100177 goto device;
Thierry Reding6e5ff992012-11-28 11:45:47 +0100178
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000179 err = tegra_drm_fb_init(drm);
180 if (err < 0)
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100181 goto vblank;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000182
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000183 return 0;
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100184
185vblank:
186 drm_vblank_cleanup(drm);
187device:
188 host1x_device_exit(device);
189fbdev:
190 drm_kms_helper_poll_fini(drm);
191 tegra_drm_fb_free(drm);
192config:
193 drm_mode_config_cleanup(drm);
Thierry Redingdf06b752014-06-26 21:41:53 +0200194
195 if (tegra->domain) {
196 iommu_domain_free(tegra->domain);
197 drm_mm_takedown(&tegra->mm);
198 }
199free:
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100200 kfree(tegra);
201 return err;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000202}
203
204static int tegra_drm_unload(struct drm_device *drm)
205{
Thierry Reding776dc382013-10-14 14:43:22 +0200206 struct host1x_device *device = to_host1x_device(drm->dev);
Thierry Redingdf06b752014-06-26 21:41:53 +0200207 struct tegra_drm *tegra = drm->dev_private;
Thierry Reding776dc382013-10-14 14:43:22 +0200208 int err;
209
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000210 drm_kms_helper_poll_fini(drm);
211 tegra_drm_fb_exit(drm);
Thierry Redingf002abc2013-10-14 14:06:02 +0200212 drm_mode_config_cleanup(drm);
Thierry Reding4aa3df72014-11-24 16:27:13 +0100213 drm_vblank_cleanup(drm);
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000214
Thierry Reding776dc382013-10-14 14:43:22 +0200215 err = host1x_device_exit(device);
216 if (err < 0)
217 return err;
218
Thierry Redingdf06b752014-06-26 21:41:53 +0200219 if (tegra->domain) {
220 iommu_domain_free(tegra->domain);
221 drm_mm_takedown(&tegra->mm);
222 }
223
Thierry Reding1053f4dd2014-11-04 16:17:55 +0100224 kfree(tegra);
225
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000226 return 0;
227}
228
229static int tegra_drm_open(struct drm_device *drm, struct drm_file *filp)
230{
Thierry Reding08943e62013-09-26 16:08:18 +0200231 struct tegra_drm_file *fpriv;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200232
233 fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
234 if (!fpriv)
235 return -ENOMEM;
236
237 INIT_LIST_HEAD(&fpriv->contexts);
238 filp->driver_priv = fpriv;
239
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000240 return 0;
241}
242
Thierry Redingc88c3632013-09-26 16:08:22 +0200243static void tegra_drm_context_free(struct tegra_drm_context *context)
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200244{
245 context->client->ops->close_channel(context);
246 kfree(context);
247}
248
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000249static void tegra_drm_lastclose(struct drm_device *drm)
250{
Paul Bolle6e601632014-02-09 14:01:33 +0100251#ifdef CONFIG_DRM_TEGRA_FBDEV
Thierry Reding386a2a72013-09-24 13:22:17 +0200252 struct tegra_drm *tegra = drm->dev_private;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000253
Thierry Reding386a2a72013-09-24 13:22:17 +0200254 tegra_fbdev_restore_mode(tegra->fbdev);
Thierry Reding60c2f702013-10-31 13:28:50 +0100255#endif
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000256}
257
Thierry Redingc40f0f12013-10-10 11:00:33 +0200258static struct host1x_bo *
259host1x_bo_lookup(struct drm_device *drm, struct drm_file *file, u32 handle)
260{
261 struct drm_gem_object *gem;
262 struct tegra_bo *bo;
263
264 gem = drm_gem_object_lookup(drm, file, handle);
265 if (!gem)
266 return NULL;
267
268 mutex_lock(&drm->struct_mutex);
269 drm_gem_object_unreference(gem);
270 mutex_unlock(&drm->struct_mutex);
271
272 bo = to_tegra_bo(gem);
273 return &bo->base;
274}
275
Thierry Reding961e3be2014-06-10 10:25:00 +0200276static int host1x_reloc_copy_from_user(struct host1x_reloc *dest,
277 struct drm_tegra_reloc __user *src,
278 struct drm_device *drm,
279 struct drm_file *file)
280{
281 u32 cmdbuf, target;
282 int err;
283
284 err = get_user(cmdbuf, &src->cmdbuf.handle);
285 if (err < 0)
286 return err;
287
288 err = get_user(dest->cmdbuf.offset, &src->cmdbuf.offset);
289 if (err < 0)
290 return err;
291
292 err = get_user(target, &src->target.handle);
293 if (err < 0)
294 return err;
295
296 err = get_user(dest->target.offset, &src->cmdbuf.offset);
297 if (err < 0)
298 return err;
299
300 err = get_user(dest->shift, &src->shift);
301 if (err < 0)
302 return err;
303
304 dest->cmdbuf.bo = host1x_bo_lookup(drm, file, cmdbuf);
305 if (!dest->cmdbuf.bo)
306 return -ENOENT;
307
308 dest->target.bo = host1x_bo_lookup(drm, file, target);
309 if (!dest->target.bo)
310 return -ENOENT;
311
312 return 0;
313}
314
Thierry Redingc40f0f12013-10-10 11:00:33 +0200315int tegra_drm_submit(struct tegra_drm_context *context,
316 struct drm_tegra_submit *args, struct drm_device *drm,
317 struct drm_file *file)
318{
319 unsigned int num_cmdbufs = args->num_cmdbufs;
320 unsigned int num_relocs = args->num_relocs;
321 unsigned int num_waitchks = args->num_waitchks;
322 struct drm_tegra_cmdbuf __user *cmdbufs =
Thierry Redinga7ed68f2013-11-08 13:15:43 +0100323 (void __user *)(uintptr_t)args->cmdbufs;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200324 struct drm_tegra_reloc __user *relocs =
Thierry Redinga7ed68f2013-11-08 13:15:43 +0100325 (void __user *)(uintptr_t)args->relocs;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200326 struct drm_tegra_waitchk __user *waitchks =
Thierry Redinga7ed68f2013-11-08 13:15:43 +0100327 (void __user *)(uintptr_t)args->waitchks;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200328 struct drm_tegra_syncpt syncpt;
329 struct host1x_job *job;
330 int err;
331
332 /* We don't yet support other than one syncpt_incr struct per submit */
333 if (args->num_syncpts != 1)
334 return -EINVAL;
335
336 job = host1x_job_alloc(context->channel, args->num_cmdbufs,
337 args->num_relocs, args->num_waitchks);
338 if (!job)
339 return -ENOMEM;
340
341 job->num_relocs = args->num_relocs;
342 job->num_waitchk = args->num_waitchks;
343 job->client = (u32)args->context;
344 job->class = context->client->base.class;
345 job->serialize = true;
346
347 while (num_cmdbufs) {
348 struct drm_tegra_cmdbuf cmdbuf;
349 struct host1x_bo *bo;
350
Dan Carpenter9a991602013-11-08 13:07:37 +0300351 if (copy_from_user(&cmdbuf, cmdbufs, sizeof(cmdbuf))) {
352 err = -EFAULT;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200353 goto fail;
Dan Carpenter9a991602013-11-08 13:07:37 +0300354 }
Thierry Redingc40f0f12013-10-10 11:00:33 +0200355
356 bo = host1x_bo_lookup(drm, file, cmdbuf.handle);
357 if (!bo) {
358 err = -ENOENT;
359 goto fail;
360 }
361
362 host1x_job_add_gather(job, bo, cmdbuf.words, cmdbuf.offset);
363 num_cmdbufs--;
364 cmdbufs++;
365 }
366
Thierry Reding961e3be2014-06-10 10:25:00 +0200367 /* copy and resolve relocations from submit */
Thierry Redingc40f0f12013-10-10 11:00:33 +0200368 while (num_relocs--) {
Thierry Reding961e3be2014-06-10 10:25:00 +0200369 err = host1x_reloc_copy_from_user(&job->relocarray[num_relocs],
370 &relocs[num_relocs], drm,
371 file);
372 if (err < 0)
Thierry Redingc40f0f12013-10-10 11:00:33 +0200373 goto fail;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200374 }
375
Dan Carpenter9a991602013-11-08 13:07:37 +0300376 if (copy_from_user(job->waitchk, waitchks,
377 sizeof(*waitchks) * num_waitchks)) {
378 err = -EFAULT;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200379 goto fail;
Dan Carpenter9a991602013-11-08 13:07:37 +0300380 }
Thierry Redingc40f0f12013-10-10 11:00:33 +0200381
Dan Carpenter9a991602013-11-08 13:07:37 +0300382 if (copy_from_user(&syncpt, (void __user *)(uintptr_t)args->syncpts,
383 sizeof(syncpt))) {
384 err = -EFAULT;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200385 goto fail;
Dan Carpenter9a991602013-11-08 13:07:37 +0300386 }
Thierry Redingc40f0f12013-10-10 11:00:33 +0200387
388 job->is_addr_reg = context->client->ops->is_addr_reg;
389 job->syncpt_incrs = syncpt.incrs;
390 job->syncpt_id = syncpt.id;
391 job->timeout = 10000;
392
393 if (args->timeout && args->timeout < 10000)
394 job->timeout = args->timeout;
395
396 err = host1x_job_pin(job, context->client->base.dev);
397 if (err)
398 goto fail;
399
400 err = host1x_job_submit(job);
401 if (err)
402 goto fail_submit;
403
404 args->fence = job->syncpt_end;
405
406 host1x_job_put(job);
407 return 0;
408
409fail_submit:
410 host1x_job_unpin(job);
411fail:
412 host1x_job_put(job);
413 return err;
414}
415
416
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200417#ifdef CONFIG_DRM_TEGRA_STAGING
Thierry Redingc88c3632013-09-26 16:08:22 +0200418static struct tegra_drm_context *tegra_drm_get_context(__u64 context)
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200419{
Thierry Redingc88c3632013-09-26 16:08:22 +0200420 return (struct tegra_drm_context *)(uintptr_t)context;
421}
422
423static bool tegra_drm_file_owns_context(struct tegra_drm_file *file,
424 struct tegra_drm_context *context)
425{
426 struct tegra_drm_context *ctx;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200427
428 list_for_each_entry(ctx, &file->contexts, list)
429 if (ctx == context)
430 return true;
431
432 return false;
433}
434
435static int tegra_gem_create(struct drm_device *drm, void *data,
436 struct drm_file *file)
437{
438 struct drm_tegra_gem_create *args = data;
439 struct tegra_bo *bo;
440
Thierry Reding773af772013-10-04 22:34:01 +0200441 bo = tegra_bo_create_with_handle(file, drm, args->size, args->flags,
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200442 &args->handle);
443 if (IS_ERR(bo))
444 return PTR_ERR(bo);
445
446 return 0;
447}
448
449static int tegra_gem_mmap(struct drm_device *drm, void *data,
450 struct drm_file *file)
451{
452 struct drm_tegra_gem_mmap *args = data;
453 struct drm_gem_object *gem;
454 struct tegra_bo *bo;
455
456 gem = drm_gem_object_lookup(drm, file, args->handle);
457 if (!gem)
458 return -EINVAL;
459
460 bo = to_tegra_bo(gem);
461
David Herrmann2bc7b0c2013-08-13 14:19:58 +0200462 args->offset = drm_vma_node_offset_addr(&bo->gem.vma_node);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200463
464 drm_gem_object_unreference(gem);
465
466 return 0;
467}
468
469static int tegra_syncpt_read(struct drm_device *drm, void *data,
470 struct drm_file *file)
471{
Thierry Reding776dc382013-10-14 14:43:22 +0200472 struct host1x *host = dev_get_drvdata(drm->dev->parent);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200473 struct drm_tegra_syncpt_read *args = data;
Thierry Reding776dc382013-10-14 14:43:22 +0200474 struct host1x_syncpt *sp;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200475
Thierry Reding776dc382013-10-14 14:43:22 +0200476 sp = host1x_syncpt_get(host, args->id);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200477 if (!sp)
478 return -EINVAL;
479
480 args->value = host1x_syncpt_read_min(sp);
481 return 0;
482}
483
484static int tegra_syncpt_incr(struct drm_device *drm, void *data,
485 struct drm_file *file)
486{
Thierry Reding776dc382013-10-14 14:43:22 +0200487 struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200488 struct drm_tegra_syncpt_incr *args = data;
Thierry Reding776dc382013-10-14 14:43:22 +0200489 struct host1x_syncpt *sp;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200490
Thierry Reding776dc382013-10-14 14:43:22 +0200491 sp = host1x_syncpt_get(host1x, args->id);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200492 if (!sp)
493 return -EINVAL;
494
Arto Merilainenebae30b2013-05-29 13:26:08 +0300495 return host1x_syncpt_incr(sp);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200496}
497
498static int tegra_syncpt_wait(struct drm_device *drm, void *data,
499 struct drm_file *file)
500{
Thierry Reding776dc382013-10-14 14:43:22 +0200501 struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200502 struct drm_tegra_syncpt_wait *args = data;
Thierry Reding776dc382013-10-14 14:43:22 +0200503 struct host1x_syncpt *sp;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200504
Thierry Reding776dc382013-10-14 14:43:22 +0200505 sp = host1x_syncpt_get(host1x, args->id);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200506 if (!sp)
507 return -EINVAL;
508
509 return host1x_syncpt_wait(sp, args->thresh, args->timeout,
510 &args->value);
511}
512
513static int tegra_open_channel(struct drm_device *drm, void *data,
514 struct drm_file *file)
515{
Thierry Reding08943e62013-09-26 16:08:18 +0200516 struct tegra_drm_file *fpriv = file->driver_priv;
Thierry Reding386a2a72013-09-24 13:22:17 +0200517 struct tegra_drm *tegra = drm->dev_private;
518 struct drm_tegra_open_channel *args = data;
Thierry Redingc88c3632013-09-26 16:08:22 +0200519 struct tegra_drm_context *context;
Thierry Reding53fa7f72013-09-24 15:35:40 +0200520 struct tegra_drm_client *client;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200521 int err = -ENODEV;
522
523 context = kzalloc(sizeof(*context), GFP_KERNEL);
524 if (!context)
525 return -ENOMEM;
526
Thierry Reding776dc382013-10-14 14:43:22 +0200527 list_for_each_entry(client, &tegra->clients, list)
Thierry Reding53fa7f72013-09-24 15:35:40 +0200528 if (client->base.class == args->client) {
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200529 err = client->ops->open_channel(client, context);
530 if (err)
531 break;
532
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200533 list_add(&context->list, &fpriv->contexts);
534 args->context = (uintptr_t)context;
Thierry Reding53fa7f72013-09-24 15:35:40 +0200535 context->client = client;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200536 return 0;
537 }
538
539 kfree(context);
540 return err;
541}
542
543static int tegra_close_channel(struct drm_device *drm, void *data,
544 struct drm_file *file)
545{
Thierry Reding08943e62013-09-26 16:08:18 +0200546 struct tegra_drm_file *fpriv = file->driver_priv;
Thierry Reding776dc382013-10-14 14:43:22 +0200547 struct drm_tegra_close_channel *args = data;
Thierry Redingc88c3632013-09-26 16:08:22 +0200548 struct tegra_drm_context *context;
549
550 context = tegra_drm_get_context(args->context);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200551
Thierry Reding08943e62013-09-26 16:08:18 +0200552 if (!tegra_drm_file_owns_context(fpriv, context))
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200553 return -EINVAL;
554
555 list_del(&context->list);
Thierry Redingc88c3632013-09-26 16:08:22 +0200556 tegra_drm_context_free(context);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200557
558 return 0;
559}
560
561static int tegra_get_syncpt(struct drm_device *drm, void *data,
562 struct drm_file *file)
563{
Thierry Reding08943e62013-09-26 16:08:18 +0200564 struct tegra_drm_file *fpriv = file->driver_priv;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200565 struct drm_tegra_get_syncpt *args = data;
Thierry Redingc88c3632013-09-26 16:08:22 +0200566 struct tegra_drm_context *context;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200567 struct host1x_syncpt *syncpt;
568
Thierry Redingc88c3632013-09-26 16:08:22 +0200569 context = tegra_drm_get_context(args->context);
570
Thierry Reding08943e62013-09-26 16:08:18 +0200571 if (!tegra_drm_file_owns_context(fpriv, context))
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200572 return -ENODEV;
573
Thierry Reding53fa7f72013-09-24 15:35:40 +0200574 if (args->index >= context->client->base.num_syncpts)
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200575 return -EINVAL;
576
Thierry Reding53fa7f72013-09-24 15:35:40 +0200577 syncpt = context->client->base.syncpts[args->index];
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200578 args->id = host1x_syncpt_id(syncpt);
579
580 return 0;
581}
582
583static int tegra_submit(struct drm_device *drm, void *data,
584 struct drm_file *file)
585{
Thierry Reding08943e62013-09-26 16:08:18 +0200586 struct tegra_drm_file *fpriv = file->driver_priv;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200587 struct drm_tegra_submit *args = data;
Thierry Redingc88c3632013-09-26 16:08:22 +0200588 struct tegra_drm_context *context;
589
590 context = tegra_drm_get_context(args->context);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200591
Thierry Reding08943e62013-09-26 16:08:18 +0200592 if (!tegra_drm_file_owns_context(fpriv, context))
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200593 return -ENODEV;
594
595 return context->client->ops->submit(context, args, drm, file);
596}
Arto Merilainenc54a1692013-10-14 15:21:54 +0300597
598static int tegra_get_syncpt_base(struct drm_device *drm, void *data,
599 struct drm_file *file)
600{
601 struct tegra_drm_file *fpriv = file->driver_priv;
602 struct drm_tegra_get_syncpt_base *args = data;
603 struct tegra_drm_context *context;
604 struct host1x_syncpt_base *base;
605 struct host1x_syncpt *syncpt;
606
607 context = tegra_drm_get_context(args->context);
608
609 if (!tegra_drm_file_owns_context(fpriv, context))
610 return -ENODEV;
611
612 if (args->syncpt >= context->client->base.num_syncpts)
613 return -EINVAL;
614
615 syncpt = context->client->base.syncpts[args->syncpt];
616
617 base = host1x_syncpt_get_base(syncpt);
618 if (!base)
619 return -ENXIO;
620
621 args->id = host1x_syncpt_base_id(base);
622
623 return 0;
624}
Thierry Reding7678d712014-06-03 14:56:57 +0200625
626static int tegra_gem_set_tiling(struct drm_device *drm, void *data,
627 struct drm_file *file)
628{
629 struct drm_tegra_gem_set_tiling *args = data;
630 enum tegra_bo_tiling_mode mode;
631 struct drm_gem_object *gem;
632 unsigned long value = 0;
633 struct tegra_bo *bo;
634
635 switch (args->mode) {
636 case DRM_TEGRA_GEM_TILING_MODE_PITCH:
637 mode = TEGRA_BO_TILING_MODE_PITCH;
638
639 if (args->value != 0)
640 return -EINVAL;
641
642 break;
643
644 case DRM_TEGRA_GEM_TILING_MODE_TILED:
645 mode = TEGRA_BO_TILING_MODE_TILED;
646
647 if (args->value != 0)
648 return -EINVAL;
649
650 break;
651
652 case DRM_TEGRA_GEM_TILING_MODE_BLOCK:
653 mode = TEGRA_BO_TILING_MODE_BLOCK;
654
655 if (args->value > 5)
656 return -EINVAL;
657
658 value = args->value;
659 break;
660
661 default:
662 return -EINVAL;
663 }
664
665 gem = drm_gem_object_lookup(drm, file, args->handle);
666 if (!gem)
667 return -ENOENT;
668
669 bo = to_tegra_bo(gem);
670
671 bo->tiling.mode = mode;
672 bo->tiling.value = value;
673
674 drm_gem_object_unreference(gem);
675
676 return 0;
677}
678
679static int tegra_gem_get_tiling(struct drm_device *drm, void *data,
680 struct drm_file *file)
681{
682 struct drm_tegra_gem_get_tiling *args = data;
683 struct drm_gem_object *gem;
684 struct tegra_bo *bo;
685 int err = 0;
686
687 gem = drm_gem_object_lookup(drm, file, args->handle);
688 if (!gem)
689 return -ENOENT;
690
691 bo = to_tegra_bo(gem);
692
693 switch (bo->tiling.mode) {
694 case TEGRA_BO_TILING_MODE_PITCH:
695 args->mode = DRM_TEGRA_GEM_TILING_MODE_PITCH;
696 args->value = 0;
697 break;
698
699 case TEGRA_BO_TILING_MODE_TILED:
700 args->mode = DRM_TEGRA_GEM_TILING_MODE_TILED;
701 args->value = 0;
702 break;
703
704 case TEGRA_BO_TILING_MODE_BLOCK:
705 args->mode = DRM_TEGRA_GEM_TILING_MODE_BLOCK;
706 args->value = bo->tiling.value;
707 break;
708
709 default:
710 err = -EINVAL;
711 break;
712 }
713
714 drm_gem_object_unreference(gem);
715
716 return err;
717}
Thierry Reding7b129082014-06-10 12:04:03 +0200718
719static int tegra_gem_set_flags(struct drm_device *drm, void *data,
720 struct drm_file *file)
721{
722 struct drm_tegra_gem_set_flags *args = data;
723 struct drm_gem_object *gem;
724 struct tegra_bo *bo;
725
726 if (args->flags & ~DRM_TEGRA_GEM_FLAGS)
727 return -EINVAL;
728
729 gem = drm_gem_object_lookup(drm, file, args->handle);
730 if (!gem)
731 return -ENOENT;
732
733 bo = to_tegra_bo(gem);
734 bo->flags = 0;
735
736 if (args->flags & DRM_TEGRA_GEM_BOTTOM_UP)
737 bo->flags |= TEGRA_BO_BOTTOM_UP;
738
739 drm_gem_object_unreference(gem);
740
741 return 0;
742}
743
744static int tegra_gem_get_flags(struct drm_device *drm, void *data,
745 struct drm_file *file)
746{
747 struct drm_tegra_gem_get_flags *args = data;
748 struct drm_gem_object *gem;
749 struct tegra_bo *bo;
750
751 gem = drm_gem_object_lookup(drm, file, args->handle);
752 if (!gem)
753 return -ENOENT;
754
755 bo = to_tegra_bo(gem);
756 args->flags = 0;
757
758 if (bo->flags & TEGRA_BO_BOTTOM_UP)
759 args->flags |= DRM_TEGRA_GEM_BOTTOM_UP;
760
761 drm_gem_object_unreference(gem);
762
763 return 0;
764}
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200765#endif
766
Rob Clarkbaa70942013-08-02 13:27:49 -0400767static const struct drm_ioctl_desc tegra_drm_ioctls[] = {
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200768#ifdef CONFIG_DRM_TEGRA_STAGING
Thierry Redingbd4f2362014-06-03 14:59:29 +0200769 DRM_IOCTL_DEF_DRV(TEGRA_GEM_CREATE, tegra_gem_create, DRM_UNLOCKED),
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200770 DRM_IOCTL_DEF_DRV(TEGRA_GEM_MMAP, tegra_gem_mmap, DRM_UNLOCKED),
771 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_READ, tegra_syncpt_read, DRM_UNLOCKED),
772 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_INCR, tegra_syncpt_incr, DRM_UNLOCKED),
773 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_WAIT, tegra_syncpt_wait, DRM_UNLOCKED),
774 DRM_IOCTL_DEF_DRV(TEGRA_OPEN_CHANNEL, tegra_open_channel, DRM_UNLOCKED),
775 DRM_IOCTL_DEF_DRV(TEGRA_CLOSE_CHANNEL, tegra_close_channel, DRM_UNLOCKED),
776 DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT, tegra_get_syncpt, DRM_UNLOCKED),
777 DRM_IOCTL_DEF_DRV(TEGRA_SUBMIT, tegra_submit, DRM_UNLOCKED),
Arto Merilainenc54a1692013-10-14 15:21:54 +0300778 DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT_BASE, tegra_get_syncpt_base, DRM_UNLOCKED),
Thierry Reding7678d712014-06-03 14:56:57 +0200779 DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_TILING, tegra_gem_set_tiling, DRM_UNLOCKED),
780 DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_TILING, tegra_gem_get_tiling, DRM_UNLOCKED),
Thierry Reding7b129082014-06-10 12:04:03 +0200781 DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_FLAGS, tegra_gem_set_flags, DRM_UNLOCKED),
782 DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_FLAGS, tegra_gem_get_flags, DRM_UNLOCKED),
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200783#endif
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000784};
785
786static const struct file_operations tegra_drm_fops = {
787 .owner = THIS_MODULE,
788 .open = drm_open,
789 .release = drm_release,
790 .unlocked_ioctl = drm_ioctl,
Arto Merilainende2ba662013-03-22 16:34:08 +0200791 .mmap = tegra_drm_mmap,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000792 .poll = drm_poll,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000793 .read = drm_read,
794#ifdef CONFIG_COMPAT
795 .compat_ioctl = drm_compat_ioctl,
796#endif
797 .llseek = noop_llseek,
798};
799
Thierry Redinged7dae52014-12-16 16:03:13 +0100800static struct drm_crtc *tegra_crtc_from_pipe(struct drm_device *drm,
801 unsigned int pipe)
Thierry Reding6e5ff992012-11-28 11:45:47 +0100802{
803 struct drm_crtc *crtc;
804
805 list_for_each_entry(crtc, &drm->mode_config.crtc_list, head) {
Thierry Redinged7dae52014-12-16 16:03:13 +0100806 if (pipe == drm_crtc_index(crtc))
Thierry Reding6e5ff992012-11-28 11:45:47 +0100807 return crtc;
808 }
809
810 return NULL;
811}
812
Thierry Redinged7dae52014-12-16 16:03:13 +0100813static u32 tegra_drm_get_vblank_counter(struct drm_device *drm, int pipe)
Thierry Reding6e5ff992012-11-28 11:45:47 +0100814{
Thierry Redinged7dae52014-12-16 16:03:13 +0100815 struct drm_crtc *crtc = tegra_crtc_from_pipe(drm, pipe);
816
817 if (!crtc)
818 return 0;
819
Thierry Reding6e5ff992012-11-28 11:45:47 +0100820 /* TODO: implement real hardware counter using syncpoints */
Thierry Redinged7dae52014-12-16 16:03:13 +0100821 return drm_crtc_vblank_count(crtc);
Thierry Reding6e5ff992012-11-28 11:45:47 +0100822}
823
824static int tegra_drm_enable_vblank(struct drm_device *drm, int pipe)
825{
826 struct drm_crtc *crtc = tegra_crtc_from_pipe(drm, pipe);
827 struct tegra_dc *dc = to_tegra_dc(crtc);
828
829 if (!crtc)
830 return -ENODEV;
831
832 tegra_dc_enable_vblank(dc);
833
834 return 0;
835}
836
837static void tegra_drm_disable_vblank(struct drm_device *drm, int pipe)
838{
839 struct drm_crtc *crtc = tegra_crtc_from_pipe(drm, pipe);
840 struct tegra_dc *dc = to_tegra_dc(crtc);
841
842 if (crtc)
843 tegra_dc_disable_vblank(dc);
844}
845
Thierry Reding3c03c462012-11-28 12:00:18 +0100846static void tegra_drm_preclose(struct drm_device *drm, struct drm_file *file)
847{
Thierry Reding08943e62013-09-26 16:08:18 +0200848 struct tegra_drm_file *fpriv = file->driver_priv;
Thierry Redingc88c3632013-09-26 16:08:22 +0200849 struct tegra_drm_context *context, *tmp;
Thierry Reding3c03c462012-11-28 12:00:18 +0100850 struct drm_crtc *crtc;
851
852 list_for_each_entry(crtc, &drm->mode_config.crtc_list, head)
853 tegra_dc_cancel_page_flip(crtc, file);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200854
855 list_for_each_entry_safe(context, tmp, &fpriv->contexts, list)
Thierry Redingc88c3632013-09-26 16:08:22 +0200856 tegra_drm_context_free(context);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200857
858 kfree(fpriv);
Thierry Reding3c03c462012-11-28 12:00:18 +0100859}
860
Thierry Redinge450fcc2013-02-13 16:13:16 +0100861#ifdef CONFIG_DEBUG_FS
862static int tegra_debugfs_framebuffers(struct seq_file *s, void *data)
863{
864 struct drm_info_node *node = (struct drm_info_node *)s->private;
865 struct drm_device *drm = node->minor->dev;
866 struct drm_framebuffer *fb;
867
868 mutex_lock(&drm->mode_config.fb_lock);
869
870 list_for_each_entry(fb, &drm->mode_config.fb_list, head) {
871 seq_printf(s, "%3d: user size: %d x %d, depth %d, %d bpp, refcount %d\n",
872 fb->base.id, fb->width, fb->height, fb->depth,
873 fb->bits_per_pixel,
874 atomic_read(&fb->refcount.refcount));
875 }
876
877 mutex_unlock(&drm->mode_config.fb_lock);
878
879 return 0;
880}
881
882static struct drm_info_list tegra_debugfs_list[] = {
883 { "framebuffers", tegra_debugfs_framebuffers, 0 },
884};
885
886static int tegra_debugfs_init(struct drm_minor *minor)
887{
888 return drm_debugfs_create_files(tegra_debugfs_list,
889 ARRAY_SIZE(tegra_debugfs_list),
890 minor->debugfs_root, minor);
891}
892
893static void tegra_debugfs_cleanup(struct drm_minor *minor)
894{
895 drm_debugfs_remove_files(tegra_debugfs_list,
896 ARRAY_SIZE(tegra_debugfs_list), minor);
897}
898#endif
899
Thierry Reding9b57f5f2013-11-08 13:17:14 +0100900static struct drm_driver tegra_drm_driver = {
Thierry Reding38003912013-12-12 10:00:43 +0100901 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000902 .load = tegra_drm_load,
903 .unload = tegra_drm_unload,
904 .open = tegra_drm_open,
Thierry Reding3c03c462012-11-28 12:00:18 +0100905 .preclose = tegra_drm_preclose,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000906 .lastclose = tegra_drm_lastclose,
907
Thierry Reding6e5ff992012-11-28 11:45:47 +0100908 .get_vblank_counter = tegra_drm_get_vblank_counter,
909 .enable_vblank = tegra_drm_enable_vblank,
910 .disable_vblank = tegra_drm_disable_vblank,
911
Thierry Redinge450fcc2013-02-13 16:13:16 +0100912#if defined(CONFIG_DEBUG_FS)
913 .debugfs_init = tegra_debugfs_init,
914 .debugfs_cleanup = tegra_debugfs_cleanup,
915#endif
916
Arto Merilainende2ba662013-03-22 16:34:08 +0200917 .gem_free_object = tegra_bo_free_object,
918 .gem_vm_ops = &tegra_bo_vm_ops,
Thierry Reding38003912013-12-12 10:00:43 +0100919
920 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
921 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
922 .gem_prime_export = tegra_gem_prime_export,
923 .gem_prime_import = tegra_gem_prime_import,
924
Arto Merilainende2ba662013-03-22 16:34:08 +0200925 .dumb_create = tegra_bo_dumb_create,
926 .dumb_map_offset = tegra_bo_dumb_map_offset,
Daniel Vetter43387b32013-07-16 09:12:04 +0200927 .dumb_destroy = drm_gem_dumb_destroy,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000928
929 .ioctls = tegra_drm_ioctls,
930 .num_ioctls = ARRAY_SIZE(tegra_drm_ioctls),
931 .fops = &tegra_drm_fops,
932
933 .name = DRIVER_NAME,
934 .desc = DRIVER_DESC,
935 .date = DRIVER_DATE,
936 .major = DRIVER_MAJOR,
937 .minor = DRIVER_MINOR,
938 .patchlevel = DRIVER_PATCHLEVEL,
939};
Thierry Reding776dc382013-10-14 14:43:22 +0200940
941int tegra_drm_register_client(struct tegra_drm *tegra,
942 struct tegra_drm_client *client)
943{
944 mutex_lock(&tegra->clients_lock);
945 list_add_tail(&client->list, &tegra->clients);
946 mutex_unlock(&tegra->clients_lock);
947
948 return 0;
949}
950
951int tegra_drm_unregister_client(struct tegra_drm *tegra,
952 struct tegra_drm_client *client)
953{
954 mutex_lock(&tegra->clients_lock);
955 list_del_init(&client->list);
956 mutex_unlock(&tegra->clients_lock);
957
958 return 0;
959}
960
Thierry Reding9910f5c2014-05-22 09:57:15 +0200961static int host1x_drm_probe(struct host1x_device *dev)
Thierry Reding776dc382013-10-14 14:43:22 +0200962{
Thierry Reding9910f5c2014-05-22 09:57:15 +0200963 struct drm_driver *driver = &tegra_drm_driver;
964 struct drm_device *drm;
965 int err;
966
967 drm = drm_dev_alloc(driver, &dev->dev);
968 if (!drm)
969 return -ENOMEM;
970
971 drm_dev_set_unique(drm, dev_name(&dev->dev));
972 dev_set_drvdata(&dev->dev, drm);
973
974 err = drm_dev_register(drm, 0);
975 if (err < 0)
976 goto unref;
977
978 DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n", driver->name,
979 driver->major, driver->minor, driver->patchlevel,
980 driver->date, drm->primary->index);
981
982 return 0;
983
984unref:
985 drm_dev_unref(drm);
986 return err;
Thierry Reding776dc382013-10-14 14:43:22 +0200987}
988
Thierry Reding9910f5c2014-05-22 09:57:15 +0200989static int host1x_drm_remove(struct host1x_device *dev)
Thierry Reding776dc382013-10-14 14:43:22 +0200990{
Thierry Reding9910f5c2014-05-22 09:57:15 +0200991 struct drm_device *drm = dev_get_drvdata(&dev->dev);
992
993 drm_dev_unregister(drm);
994 drm_dev_unref(drm);
Thierry Reding776dc382013-10-14 14:43:22 +0200995
996 return 0;
997}
998
Thierry Reding359ae682014-12-18 17:15:25 +0100999#ifdef CONFIG_PM_SLEEP
1000static int host1x_drm_suspend(struct device *dev)
1001{
1002 struct drm_device *drm = dev_get_drvdata(dev);
1003
1004 drm_kms_helper_poll_disable(drm);
1005
1006 return 0;
1007}
1008
1009static int host1x_drm_resume(struct device *dev)
1010{
1011 struct drm_device *drm = dev_get_drvdata(dev);
1012
1013 drm_kms_helper_poll_enable(drm);
1014
1015 return 0;
1016}
1017#endif
1018
1019static const struct dev_pm_ops host1x_drm_pm_ops = {
1020 SET_SYSTEM_SLEEP_PM_OPS(host1x_drm_suspend, host1x_drm_resume)
1021};
1022
Thierry Reding776dc382013-10-14 14:43:22 +02001023static const struct of_device_id host1x_drm_subdevs[] = {
1024 { .compatible = "nvidia,tegra20-dc", },
1025 { .compatible = "nvidia,tegra20-hdmi", },
1026 { .compatible = "nvidia,tegra20-gr2d", },
Thierry Reding5f60ed02013-02-28 08:08:01 +01001027 { .compatible = "nvidia,tegra20-gr3d", },
Thierry Reding776dc382013-10-14 14:43:22 +02001028 { .compatible = "nvidia,tegra30-dc", },
1029 { .compatible = "nvidia,tegra30-hdmi", },
1030 { .compatible = "nvidia,tegra30-gr2d", },
Thierry Reding5f60ed02013-02-28 08:08:01 +01001031 { .compatible = "nvidia,tegra30-gr3d", },
Thierry Redingdec72732013-09-03 08:45:46 +02001032 { .compatible = "nvidia,tegra114-dsi", },
Mikko Perttunen7d1d28a2013-09-30 16:54:47 +02001033 { .compatible = "nvidia,tegra114-hdmi", },
Thierry Reding5f60ed02013-02-28 08:08:01 +01001034 { .compatible = "nvidia,tegra114-gr3d", },
Thierry Reding8620fc62013-12-12 11:03:59 +01001035 { .compatible = "nvidia,tegra124-dc", },
Thierry Reding6b6b6042013-11-15 16:06:05 +01001036 { .compatible = "nvidia,tegra124-sor", },
Thierry Redingfb7be702013-11-15 16:07:32 +01001037 { .compatible = "nvidia,tegra124-hdmi", },
Thierry Reding776dc382013-10-14 14:43:22 +02001038 { /* sentinel */ }
1039};
1040
1041static struct host1x_driver host1x_drm_driver = {
Thierry Redingf4c5cf82014-12-18 15:29:14 +01001042 .driver = {
1043 .name = "drm",
Thierry Reding359ae682014-12-18 17:15:25 +01001044 .pm = &host1x_drm_pm_ops,
Thierry Redingf4c5cf82014-12-18 15:29:14 +01001045 },
Thierry Reding776dc382013-10-14 14:43:22 +02001046 .probe = host1x_drm_probe,
1047 .remove = host1x_drm_remove,
1048 .subdevs = host1x_drm_subdevs,
1049};
1050
1051static int __init host1x_drm_init(void)
1052{
1053 int err;
1054
1055 err = host1x_driver_register(&host1x_drm_driver);
1056 if (err < 0)
1057 return err;
1058
1059 err = platform_driver_register(&tegra_dc_driver);
1060 if (err < 0)
1061 goto unregister_host1x;
1062
Thierry Redingdec72732013-09-03 08:45:46 +02001063 err = platform_driver_register(&tegra_dsi_driver);
Thierry Reding776dc382013-10-14 14:43:22 +02001064 if (err < 0)
1065 goto unregister_dc;
1066
Thierry Reding6b6b6042013-11-15 16:06:05 +01001067 err = platform_driver_register(&tegra_sor_driver);
Thierry Redingdec72732013-09-03 08:45:46 +02001068 if (err < 0)
1069 goto unregister_dsi;
1070
Thierry Reding6b6b6042013-11-15 16:06:05 +01001071 err = platform_driver_register(&tegra_hdmi_driver);
1072 if (err < 0)
1073 goto unregister_sor;
1074
1075 err = platform_driver_register(&tegra_dpaux_driver);
Thierry Reding776dc382013-10-14 14:43:22 +02001076 if (err < 0)
1077 goto unregister_hdmi;
1078
Thierry Reding6b6b6042013-11-15 16:06:05 +01001079 err = platform_driver_register(&tegra_gr2d_driver);
1080 if (err < 0)
1081 goto unregister_dpaux;
1082
Thierry Reding5f60ed02013-02-28 08:08:01 +01001083 err = platform_driver_register(&tegra_gr3d_driver);
1084 if (err < 0)
1085 goto unregister_gr2d;
1086
Thierry Reding776dc382013-10-14 14:43:22 +02001087 return 0;
1088
Thierry Reding5f60ed02013-02-28 08:08:01 +01001089unregister_gr2d:
1090 platform_driver_unregister(&tegra_gr2d_driver);
Thierry Reding6b6b6042013-11-15 16:06:05 +01001091unregister_dpaux:
1092 platform_driver_unregister(&tegra_dpaux_driver);
Thierry Reding776dc382013-10-14 14:43:22 +02001093unregister_hdmi:
1094 platform_driver_unregister(&tegra_hdmi_driver);
Thierry Reding6b6b6042013-11-15 16:06:05 +01001095unregister_sor:
1096 platform_driver_unregister(&tegra_sor_driver);
Thierry Redingdec72732013-09-03 08:45:46 +02001097unregister_dsi:
1098 platform_driver_unregister(&tegra_dsi_driver);
Thierry Reding776dc382013-10-14 14:43:22 +02001099unregister_dc:
1100 platform_driver_unregister(&tegra_dc_driver);
1101unregister_host1x:
1102 host1x_driver_unregister(&host1x_drm_driver);
1103 return err;
1104}
1105module_init(host1x_drm_init);
1106
1107static void __exit host1x_drm_exit(void)
1108{
Thierry Reding5f60ed02013-02-28 08:08:01 +01001109 platform_driver_unregister(&tegra_gr3d_driver);
Thierry Reding776dc382013-10-14 14:43:22 +02001110 platform_driver_unregister(&tegra_gr2d_driver);
Thierry Reding6b6b6042013-11-15 16:06:05 +01001111 platform_driver_unregister(&tegra_dpaux_driver);
Thierry Reding776dc382013-10-14 14:43:22 +02001112 platform_driver_unregister(&tegra_hdmi_driver);
Thierry Reding6b6b6042013-11-15 16:06:05 +01001113 platform_driver_unregister(&tegra_sor_driver);
Thierry Redingdec72732013-09-03 08:45:46 +02001114 platform_driver_unregister(&tegra_dsi_driver);
Thierry Reding776dc382013-10-14 14:43:22 +02001115 platform_driver_unregister(&tegra_dc_driver);
1116 host1x_driver_unregister(&host1x_drm_driver);
1117}
1118module_exit(host1x_drm_exit);
1119
1120MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
1121MODULE_DESCRIPTION("NVIDIA Tegra DRM driver");
1122MODULE_LICENSE("GPL v2");