blob: 179f7e09e20d0ceb40774130e891427931b6970c [file] [log] [blame]
Jongpill Leec9347102012-02-17 09:49:54 +09001/*
2 * Copyright (c) 2011-2012 Samsung Electronics Co., Ltd.
Jaecheol Lee16638952011-03-10 13:33:59 +09003 * http://www.samsung.com
4 *
Jongpill Leec9347102012-02-17 09:49:54 +09005 * EXYNOS - Power Management support
Jaecheol Lee16638952011-03-10 13:33:59 +09006 *
7 * Based on arch/arm/mach-s3c2410/pm.c
8 * Copyright (c) 2006 Simtec Electronics
9 * Ben Dooks <ben@simtec.co.uk>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14*/
15
16#include <linux/init.h>
17#include <linux/suspend.h>
Rafael J. Wysockibb072c32011-04-22 22:03:21 +020018#include <linux/syscore_ops.h>
Daniel Lezcano85f9f902014-05-09 06:43:27 +090019#include <linux/cpu_pm.h>
Jaecheol Lee16638952011-03-10 13:33:59 +090020#include <linux/io.h>
Tomasz Figadd8ac6962014-03-18 07:28:30 +090021#include <linux/irqchip/arm-gic.h>
Jaecheol Lee56c03d92011-07-18 19:25:13 +090022#include <linux/err.h>
23#include <linux/clk.h>
Jaecheol Lee16638952011-03-10 13:33:59 +090024
25#include <asm/cacheflush.h>
26#include <asm/hardware/cache-l2x0.h>
Shawn Guo63b870f2011-11-17 01:19:11 +090027#include <asm/smp_scu.h>
Tomasz Figad710aa32014-03-18 07:28:27 +090028#include <asm/suspend.h>
Jaecheol Lee16638952011-03-10 13:33:59 +090029
30#include <plat/cpu.h>
Tomasz Figad710aa32014-03-18 07:28:27 +090031#include <plat/pm-common.h>
Jaecheol Lee56c03d92011-07-18 19:25:13 +090032#include <plat/pll.h>
MyungJoo Hamb93cb912011-07-21 11:25:23 +090033#include <plat/regs-srom.h>
Jaecheol Lee16638952011-03-10 13:33:59 +090034
Kukjin Kim9c9239a2013-12-19 04:19:59 +090035#include <mach/map.h>
Kukjin Kimccd458c2012-12-31 10:06:48 -080036
37#include "common.h"
Kukjin Kim65c9a852013-12-19 04:06:56 +090038#include "regs-pmu.h"
Jaecheol Lee16638952011-03-10 13:33:59 +090039
Tomasz Figadd8ac6962014-03-18 07:28:30 +090040/**
41 * struct exynos_wkup_irq - Exynos GIC to PMU IRQ mapping
42 * @hwirq: Hardware IRQ signal of the GIC
43 * @mask: Mask in PMU wake-up mask register
44 */
45struct exynos_wkup_irq {
46 unsigned int hwirq;
47 u32 mask;
48};
49
Abhilash Kesavan86ffb0e2012-11-20 18:20:45 +090050static struct sleep_save exynos5_sys_save[] = {
51 SAVE_ITEM(EXYNOS5_SYS_I2C_CFG),
52};
53
Jongpill Leec9347102012-02-17 09:49:54 +090054static struct sleep_save exynos_core_save[] = {
MyungJoo Hamb93cb912011-07-21 11:25:23 +090055 /* SROM side */
56 SAVE_ITEM(S5P_SROM_BW),
57 SAVE_ITEM(S5P_SROM_BC0),
58 SAVE_ITEM(S5P_SROM_BC1),
59 SAVE_ITEM(S5P_SROM_BC2),
60 SAVE_ITEM(S5P_SROM_BC3),
Jaecheol Lee16638952011-03-10 13:33:59 +090061};
62
Tomasz Figadd8ac6962014-03-18 07:28:30 +090063/*
64 * GIC wake-up support
65 */
66
Tomasz Figad710aa32014-03-18 07:28:27 +090067static u32 exynos_irqwake_intmask = 0xffffffff;
Jaecheol Lee16638952011-03-10 13:33:59 +090068
Tomasz Figadd8ac6962014-03-18 07:28:30 +090069static const struct exynos_wkup_irq exynos4_wkup_irq[] = {
70 { 76, BIT(1) }, /* RTC alarm */
71 { 77, BIT(2) }, /* RTC tick */
72 { /* sentinel */ },
73};
74
75static const struct exynos_wkup_irq exynos5250_wkup_irq[] = {
76 { 75, BIT(1) }, /* RTC alarm */
77 { 76, BIT(2) }, /* RTC tick */
78 { /* sentinel */ },
79};
80
81static int exynos_irq_set_wake(struct irq_data *data, unsigned int state)
82{
83 const struct exynos_wkup_irq *wkup_irq;
84
85 if (soc_is_exynos5250())
86 wkup_irq = exynos5250_wkup_irq;
87 else
88 wkup_irq = exynos4_wkup_irq;
89
90 while (wkup_irq->mask) {
91 if (wkup_irq->hwirq == data->hwirq) {
92 if (!state)
93 exynos_irqwake_intmask |= wkup_irq->mask;
94 else
95 exynos_irqwake_intmask &= ~wkup_irq->mask;
96 return 0;
97 }
98 ++wkup_irq;
99 }
100
101 return -ENOENT;
102}
103
Leela Krishna Amudalad3af6972014-05-16 04:23:24 +0900104/**
105 * exynos_core_power_down : power down the specified cpu
106 * @cpu : the cpu to power down
107 *
108 * Power down the specified cpu. The sequence must be finished by a
109 * call to cpu_do_idle()
110 *
111 */
112void exynos_cpu_power_down(int cpu)
113{
114 __raw_writel(0, EXYNOS_ARM_CORE_CONFIGURATION(cpu));
115}
116
117/**
118 * exynos_cpu_power_up : power up the specified cpu
119 * @cpu : the cpu to power up
120 *
121 * Power up the specified cpu
122 */
123void exynos_cpu_power_up(int cpu)
124{
125 __raw_writel(S5P_CORE_LOCAL_PWR_EN,
126 EXYNOS_ARM_CORE_CONFIGURATION(cpu));
127}
128
129/**
130 * exynos_cpu_power_state : returns the power state of the cpu
131 * @cpu : the cpu to retrieve the power state from
132 *
133 */
134int exynos_cpu_power_state(int cpu)
135{
136 return (__raw_readl(EXYNOS_ARM_CORE_STATUS(cpu)) &
137 S5P_CORE_LOCAL_PWR_EN);
138}
139
Abhilash Kesavan096d21c2014-05-16 04:23:26 +0900140/**
141 * exynos_cluster_power_down : power down the specified cluster
142 * @cluster : the cluster to power down
143 */
144void exynos_cluster_power_down(int cluster)
145{
146 __raw_writel(0, EXYNOS_COMMON_CONFIGURATION(cluster));
147}
148
149/**
150 * exynos_cluster_power_up : power up the specified cluster
151 * @cluster : the cluster to power up
152 */
153void exynos_cluster_power_up(int cluster)
154{
155 __raw_writel(S5P_CORE_LOCAL_PWR_EN,
156 EXYNOS_COMMON_CONFIGURATION(cluster));
157}
158
159/**
160 * exynos_cluster_power_state : returns the power state of the cluster
161 * @cluster : the cluster to retrieve the power state from
162 *
163 */
164int exynos_cluster_power_state(int cluster)
165{
166 return (__raw_readl(EXYNOS_COMMON_STATUS(cluster)) &
167 S5P_CORE_LOCAL_PWR_EN);
168}
169
Daniel Lezcano3681baf2014-05-09 06:53:00 +0900170#define EXYNOS_BOOT_VECTOR_ADDR (samsung_rev() == EXYNOS4210_REV_1_1 ? \
171 S5P_INFORM7 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \
172 (S5P_VA_SYSRAM + 0x24) : S5P_INFORM0))
173#define EXYNOS_BOOT_VECTOR_FLAG (samsung_rev() == EXYNOS4210_REV_1_1 ? \
174 S5P_INFORM6 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \
175 (S5P_VA_SYSRAM + 0x20) : S5P_INFORM1))
176
177#define S5P_CHECK_AFTR 0xFCBA0D10
178
179/* Ext-GIC nIRQ/nFIQ is the only wakeup source in AFTR */
180static void exynos_set_wakeupmask(long mask)
181{
182 __raw_writel(mask, S5P_WAKEUP_MASK);
183}
184
185static void exynos_cpu_set_boot_vector(long flags)
186{
187 __raw_writel(virt_to_phys(exynos_cpu_resume), EXYNOS_BOOT_VECTOR_ADDR);
188 __raw_writel(flags, EXYNOS_BOOT_VECTOR_FLAG);
189}
190
191void exynos_enter_aftr(void)
192{
193 exynos_set_wakeupmask(0x0000ff3e);
194 exynos_cpu_set_boot_vector(S5P_CHECK_AFTR);
195 /* Set value of power down register for aftr mode */
196 exynos_sys_powerdown_conf(SYS_AFTR);
197}
198
Jaecheol Leef4ba4b02011-07-18 19:25:03 +0900199/* For Cortex-A9 Diagnostic and Power control register */
200static unsigned int save_arm_register[2];
201
Daniel Lezcano309e08c2014-05-09 06:43:27 +0900202static void exynos_cpu_save_register(void)
203{
204 unsigned long tmp;
205
206 /* Save Power control register */
207 asm ("mrc p15, 0, %0, c15, c0, 0"
208 : "=r" (tmp) : : "cc");
209
210 save_arm_register[0] = tmp;
211
212 /* Save Diagnostic register */
213 asm ("mrc p15, 0, %0, c15, c0, 1"
214 : "=r" (tmp) : : "cc");
215
216 save_arm_register[1] = tmp;
217}
218
219static void exynos_cpu_restore_register(void)
220{
221 unsigned long tmp;
222
223 /* Restore Power control register */
224 tmp = save_arm_register[0];
225
226 asm volatile ("mcr p15, 0, %0, c15, c0, 0"
227 : : "r" (tmp)
228 : "cc");
229
230 /* Restore Diagnostic register */
231 tmp = save_arm_register[1];
232
233 asm volatile ("mcr p15, 0, %0, c15, c0, 1"
234 : : "r" (tmp)
235 : "cc");
236}
237
Jongpill Leec9347102012-02-17 09:49:54 +0900238static int exynos_cpu_suspend(unsigned long arg)
Jaecheol Lee16638952011-03-10 13:33:59 +0900239{
Jongpill Lee60e49ca2012-02-17 12:23:51 +0900240#ifdef CONFIG_CACHE_L2X0
Jaecheol Lee16638952011-03-10 13:33:59 +0900241 outer_flush_all();
Jongpill Lee60e49ca2012-02-17 12:23:51 +0900242#endif
Jaecheol Lee16638952011-03-10 13:33:59 +0900243
Abhilash Kesavan573e5bb2012-11-22 14:46:40 +0900244 if (soc_is_exynos5250())
245 flush_cache_all();
246
Jaecheol Lee16638952011-03-10 13:33:59 +0900247 /* issue the standby signal into the pm unit. */
248 cpu_do_idle();
249
Abhilash Kesavand3fcacf2013-01-25 10:40:19 -0800250 pr_info("Failed to suspend the system\n");
251 return 1; /* Aborting suspend */
Jaecheol Lee16638952011-03-10 13:33:59 +0900252}
253
Jongpill Leec9347102012-02-17 09:49:54 +0900254static void exynos_pm_prepare(void)
Jaecheol Lee16638952011-03-10 13:33:59 +0900255{
Jongpill Lee60e49ca2012-02-17 12:23:51 +0900256 unsigned int tmp;
Jaecheol Lee16638952011-03-10 13:33:59 +0900257
Tomasz Figad710aa32014-03-18 07:28:27 +0900258 /* Set wake-up mask registers */
259 __raw_writel(exynos_get_eint_wake_mask(), S5P_EINT_WAKEUP_MASK);
260 __raw_writel(exynos_irqwake_intmask & ~(1 << 31), S5P_WAKEUP_MASK);
261
Jongpill Leec9347102012-02-17 09:49:54 +0900262 s3c_pm_do_save(exynos_core_save, ARRAY_SIZE(exynos_core_save));
Jaecheol Lee16638952011-03-10 13:33:59 +0900263
Tomasz Figae11d9192014-02-14 08:16:01 +0900264 if (soc_is_exynos5250()) {
Abhilash Kesavan86ffb0e2012-11-20 18:20:45 +0900265 s3c_pm_do_save(exynos5_sys_save, ARRAY_SIZE(exynos5_sys_save));
Jongpill Lee60e49ca2012-02-17 12:23:51 +0900266 /* Disable USE_RETENTION of JPEG_MEM_OPTION */
267 tmp = __raw_readl(EXYNOS5_JPEG_MEM_OPTION);
268 tmp &= ~EXYNOS5_OPTION_USE_RETENTION;
269 __raw_writel(tmp, EXYNOS5_JPEG_MEM_OPTION);
270 }
Jaecheol Lee16638952011-03-10 13:33:59 +0900271
272 /* Set value of power down register for sleep mode */
273
Jongpill Lee7d44d2b2012-02-17 09:51:31 +0900274 exynos_sys_powerdown_conf(SYS_SLEEP);
Jaecheol Lee16638952011-03-10 13:33:59 +0900275 __raw_writel(S5P_CHECK_SLEEP, S5P_INFORM1);
276
277 /* ensure at least INFORM0 has the resume address */
278
Tomasz Figad710aa32014-03-18 07:28:27 +0900279 __raw_writel(virt_to_phys(exynos_cpu_resume), S5P_INFORM0);
Jaecheol Lee16638952011-03-10 13:33:59 +0900280}
281
Jongpill Leec9347102012-02-17 09:49:54 +0900282static int exynos_pm_suspend(void)
Jaecheol Lee12974e92011-07-18 19:21:41 +0900283{
284 unsigned long tmp;
285
286 /* Setting Central Sequence Register for power down mode */
287
288 tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
289 tmp &= ~S5P_CENTRAL_LOWPWR_CFG;
290 __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
291
Jongpill Lee60e49ca2012-02-17 12:23:51 +0900292 /* Setting SEQ_OPTION register */
293
294 tmp = (S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0);
295 __raw_writel(tmp, S5P_CENTRAL_SEQ_OPTION);
296
Daniel Lezcano309e08c2014-05-09 06:43:27 +0900297 if (!soc_is_exynos5250())
298 exynos_cpu_save_register();
Jongpill Lee00a351f2011-09-27 07:26:04 +0900299
Jaecheol Lee12974e92011-07-18 19:21:41 +0900300 return 0;
301}
302
Jongpill Leec9347102012-02-17 09:49:54 +0900303static void exynos_pm_resume(void)
Jaecheol Lee16638952011-03-10 13:33:59 +0900304{
Jaecheol Leee240ab1c2011-07-18 19:21:34 +0900305 unsigned long tmp;
306
307 /*
308 * If PMU failed while entering sleep mode, WFI will be
309 * ignored by PMU and then exiting cpu_do_idle().
310 * S5P_CENTRAL_LOWPWR_CFG bit will not be set automatically
311 * in this situation.
312 */
313 tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
314 if (!(tmp & S5P_CENTRAL_LOWPWR_CFG)) {
315 tmp |= S5P_CENTRAL_LOWPWR_CFG;
316 __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
Abhilash Kesavand3fcacf2013-01-25 10:40:19 -0800317 /* clear the wakeup state register */
318 __raw_writel(0x0, S5P_WAKEUP_STAT);
Jaecheol Leee240ab1c2011-07-18 19:21:34 +0900319 /* No need to perform below restore code */
320 goto early_wakeup;
321 }
Jaecheol Leef4ba4b02011-07-18 19:25:03 +0900322
Daniel Lezcano309e08c2014-05-09 06:43:27 +0900323 if (!soc_is_exynos5250())
324 exynos_cpu_restore_register();
Jaecheol Leee240ab1c2011-07-18 19:21:34 +0900325
Jaecheol Lee16638952011-03-10 13:33:59 +0900326 /* For release retention */
327
328 __raw_writel((1 << 28), S5P_PAD_RET_MAUDIO_OPTION);
329 __raw_writel((1 << 28), S5P_PAD_RET_GPIO_OPTION);
330 __raw_writel((1 << 28), S5P_PAD_RET_UART_OPTION);
331 __raw_writel((1 << 28), S5P_PAD_RET_MMCA_OPTION);
332 __raw_writel((1 << 28), S5P_PAD_RET_MMCB_OPTION);
333 __raw_writel((1 << 28), S5P_PAD_RET_EBIA_OPTION);
334 __raw_writel((1 << 28), S5P_PAD_RET_EBIB_OPTION);
335
Abhilash Kesavan86ffb0e2012-11-20 18:20:45 +0900336 if (soc_is_exynos5250())
337 s3c_pm_do_restore(exynos5_sys_save,
338 ARRAY_SIZE(exynos5_sys_save));
339
Jongpill Leec9347102012-02-17 09:49:54 +0900340 s3c_pm_do_restore_core(exynos_core_save, ARRAY_SIZE(exynos_core_save));
Jaecheol Lee16638952011-03-10 13:33:59 +0900341
Daniel Lezcano58afbc62014-05-09 06:53:26 +0900342 if (!soc_is_exynos5250())
Jongpill Lee60e49ca2012-02-17 12:23:51 +0900343 scu_enable(S5P_VA_SCU);
Jaecheol Lee16638952011-03-10 13:33:59 +0900344
Jaecheol Leee240ab1c2011-07-18 19:21:34 +0900345early_wakeup:
Inderpal Singhebee8542012-11-22 14:46:27 +0900346
347 /* Clear SLEEP mode set in INFORM1 */
348 __raw_writel(0x0, S5P_INFORM1);
349
Jaecheol Leee240ab1c2011-07-18 19:21:34 +0900350 return;
Jaecheol Lee16638952011-03-10 13:33:59 +0900351}
352
Jongpill Leec9347102012-02-17 09:49:54 +0900353static struct syscore_ops exynos_pm_syscore_ops = {
354 .suspend = exynos_pm_suspend,
355 .resume = exynos_pm_resume,
Jaecheol Lee16638952011-03-10 13:33:59 +0900356};
357
Tomasz Figad710aa32014-03-18 07:28:27 +0900358/*
359 * Suspend Ops
360 */
361
362static int exynos_suspend_enter(suspend_state_t state)
363{
364 int ret;
365
366 s3c_pm_debug_init();
367
368 S3C_PMDBG("%s: suspending the system...\n", __func__);
369
370 S3C_PMDBG("%s: wakeup masks: %08x,%08x\n", __func__,
371 exynos_irqwake_intmask, exynos_get_eint_wake_mask());
372
373 if (exynos_irqwake_intmask == -1U
374 && exynos_get_eint_wake_mask() == -1U) {
375 pr_err("%s: No wake-up sources!\n", __func__);
376 pr_err("%s: Aborting sleep\n", __func__);
377 return -EINVAL;
378 }
379
380 s3c_pm_save_uarts();
381 exynos_pm_prepare();
382 flush_cache_all();
383 s3c_pm_check_store();
384
385 ret = cpu_suspend(0, exynos_cpu_suspend);
386 if (ret)
387 return ret;
388
389 s3c_pm_restore_uarts();
390
391 S3C_PMDBG("%s: wakeup stat: %08x\n", __func__,
392 __raw_readl(S5P_WAKEUP_STAT));
393
394 s3c_pm_check_restore();
395
396 S3C_PMDBG("%s: resuming the system...\n", __func__);
397
398 return 0;
399}
400
401static int exynos_suspend_prepare(void)
402{
403 s3c_pm_check_prepare();
404
405 return 0;
406}
407
408static void exynos_suspend_finish(void)
409{
410 s3c_pm_check_cleanup();
411}
412
413static const struct platform_suspend_ops exynos_suspend_ops = {
414 .enter = exynos_suspend_enter,
415 .prepare = exynos_suspend_prepare,
416 .finish = exynos_suspend_finish,
417 .valid = suspend_valid_only_mem,
418};
419
Daniel Lezcano85f9f902014-05-09 06:43:27 +0900420static int exynos_cpu_pm_notifier(struct notifier_block *self,
421 unsigned long cmd, void *v)
422{
423 int cpu = smp_processor_id();
424
425 switch (cmd) {
426 case CPU_PM_ENTER:
427 if (cpu == 0)
428 exynos_cpu_save_register();
429 break;
430
431 case CPU_PM_EXIT:
Daniel Lezcano795537d2014-05-09 06:50:16 +0900432 if (cpu == 0) {
Daniel Lezcano795537d2014-05-09 06:50:16 +0900433 if (!soc_is_exynos5250())
434 scu_enable(S5P_VA_SCU);
Daniel Lezcano85f9f902014-05-09 06:43:27 +0900435 exynos_cpu_restore_register();
Daniel Lezcano795537d2014-05-09 06:50:16 +0900436 }
Daniel Lezcano85f9f902014-05-09 06:43:27 +0900437 break;
438 }
439
440 return NOTIFY_OK;
441}
442
443static struct notifier_block exynos_cpu_pm_notifier_block = {
444 .notifier_call = exynos_cpu_pm_notifier,
445};
446
Tomasz Figa559ba232014-03-18 07:28:22 +0900447void __init exynos_pm_init(void)
Jaecheol Lee16638952011-03-10 13:33:59 +0900448{
Tomasz Figa559ba232014-03-18 07:28:22 +0900449 u32 tmp;
450
Daniel Lezcano85f9f902014-05-09 06:43:27 +0900451 cpu_pm_register_notifier(&exynos_cpu_pm_notifier_block);
452
Tomasz Figadd8ac6962014-03-18 07:28:30 +0900453 /* Platform-specific GIC callback */
454 gic_arch_extn.irq_set_wake = exynos_irq_set_wake;
455
Tomasz Figa559ba232014-03-18 07:28:22 +0900456 /* All wakeup disable */
457 tmp = __raw_readl(S5P_WAKEUP_MASK);
458 tmp |= ((0xFF << 8) | (0x1F << 1));
459 __raw_writel(tmp, S5P_WAKEUP_MASK);
Kukjin Kime085cad2013-06-26 22:29:44 +0900460
Jongpill Leec9347102012-02-17 09:49:54 +0900461 register_syscore_ops(&exynos_pm_syscore_ops);
Tomasz Figad710aa32014-03-18 07:28:27 +0900462 suspend_set_ops(&exynos_suspend_ops);
Jaecheol Lee16638952011-03-10 13:33:59 +0900463}