blob: ca4621033ca048598c5fb9e114f2a3449dec57fa [file] [log] [blame]
Ard Biesheuvel3be1a5c2014-03-04 01:10:04 +00001/*
2 * Copyright (C) 2014 Linaro Ltd. <ard.biesheuvel@linaro.org>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#ifndef __ASM_CPUFEATURE_H
10#define __ASM_CPUFEATURE_H
11
12#include <asm/hwcap.h>
Suzuki K. Poulosecdcf8172015-10-19 14:24:42 +010013#include <asm/sysreg.h>
Ard Biesheuvel3be1a5c2014-03-04 01:10:04 +000014
15/*
16 * In the arm64 world (as in the ARM world), elf_hwcap is used both internally
17 * in the kernel and for user space to keep track of which optional features
18 * are supported by the current system. So let's map feature 'x' to HWCAP_x.
19 * Note that HWCAP_x constants are bit fields so we need to take the log.
20 */
21
22#define MAX_CPU_FEATURES (8 * sizeof(elf_hwcap))
23#define cpu_feature(x) ilog2(HWCAP_ ## x)
24
Andre Przywara5afaa1f2014-11-14 15:54:11 +000025#define ARM64_WORKAROUND_CLEAN_CACHE 0
26#define ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE 1
Will Deacon905e8c52015-03-23 19:07:02 +000027#define ARM64_WORKAROUND_845719 2
Marc Zyngier94a9e042015-06-12 12:06:36 +010028#define ARM64_HAS_SYSREG_GIC_CPUIF 3
James Morse338d4f42015-07-22 19:05:54 +010029#define ARM64_HAS_PAN 4
Will Deaconc739dc82015-07-27 14:11:55 +010030#define ARM64_HAS_LSE_ATOMICS 5
Andre Przywara301bcfa2014-11-14 15:54:10 +000031
Will Deacond964b722015-02-04 12:17:55 +000032#define ARM64_NCAPS 6
Andre Przywara301bcfa2014-11-14 15:54:10 +000033
34#ifndef __ASSEMBLY__
Andre Przywara930da092014-11-14 15:54:07 +000035
Will Deacon144e9692015-04-30 18:55:50 +010036#include <linux/kernel.h>
37
Suzuki K. Poulose3c739b52015-10-19 14:24:45 +010038/* CPU feature register tracking */
39enum ftr_type {
40 FTR_EXACT, /* Use a predefined safe value */
41 FTR_LOWER_SAFE, /* Smaller value is safe */
42 FTR_HIGHER_SAFE,/* Bigger value is safe */
43};
44
45#define FTR_STRICT true /* SANITY check strict matching required */
46#define FTR_NONSTRICT false /* SANITY check ignored */
47
48struct arm64_ftr_bits {
49 bool strict; /* CPU Sanity check: strict matching required ? */
50 enum ftr_type type;
51 u8 shift;
52 u8 width;
53 s64 safe_val; /* safe value for discrete features */
54};
55
56/*
57 * @arm64_ftr_reg - Feature register
58 * @strict_mask Bits which should match across all CPUs for sanity.
59 * @sys_val Safe value across the CPUs (system view)
60 */
61struct arm64_ftr_reg {
62 u32 sys_id;
63 const char *name;
64 u64 strict_mask;
65 u64 sys_val;
66 struct arm64_ftr_bits *ftr_bits;
67};
68
Marc Zyngier359b7062015-03-27 13:09:23 +000069struct arm64_cpu_capabilities {
70 const char *desc;
71 u16 capability;
72 bool (*matches)(const struct arm64_cpu_capabilities *);
Suzuki K. Poulosedbb4e152015-10-19 14:24:50 +010073 void (*enable)(void *); /* Called on all active CPUs */
Marc Zyngier359b7062015-03-27 13:09:23 +000074 union {
75 struct { /* To be used for erratum handling only */
76 u32 midr_model;
77 u32 midr_range_min, midr_range_max;
78 };
Marc Zyngier94a9e042015-06-12 12:06:36 +010079
80 struct { /* Feature register checking */
Suzuki K. Pouloseda8d02d2015-10-19 14:24:51 +010081 u32 sys_reg;
James Morse18ffa042015-07-21 13:23:29 +010082 int field_pos;
83 int min_field_value;
Suzuki K. Poulose37b01d532015-10-19 14:24:52 +010084 int hwcap_type;
85 unsigned long hwcap;
Marc Zyngier94a9e042015-06-12 12:06:36 +010086 };
Marc Zyngier359b7062015-03-27 13:09:23 +000087 };
88};
89
Fabio Estevam06f9eb82014-12-04 01:17:01 +000090extern DECLARE_BITMAP(cpu_hwcaps, ARM64_NCAPS);
Andre Przywara930da092014-11-14 15:54:07 +000091
Ard Biesheuvel3be1a5c2014-03-04 01:10:04 +000092static inline bool cpu_have_feature(unsigned int num)
93{
94 return elf_hwcap & (1UL << num);
95}
96
Andre Przywara930da092014-11-14 15:54:07 +000097static inline bool cpus_have_cap(unsigned int num)
98{
Fabio Estevam06f9eb82014-12-04 01:17:01 +000099 if (num >= ARM64_NCAPS)
Andre Przywara930da092014-11-14 15:54:07 +0000100 return false;
101 return test_bit(num, cpu_hwcaps);
102}
103
104static inline void cpus_set_cap(unsigned int num)
105{
Fabio Estevam06f9eb82014-12-04 01:17:01 +0000106 if (num >= ARM64_NCAPS)
Andre Przywara930da092014-11-14 15:54:07 +0000107 pr_warn("Attempt to set an illegal CPU capability (%d >= %d)\n",
Fabio Estevam06f9eb82014-12-04 01:17:01 +0000108 num, ARM64_NCAPS);
Andre Przywara930da092014-11-14 15:54:07 +0000109 else
110 __set_bit(num, cpu_hwcaps);
111}
112
Suzuki K. Poulosece98a672015-10-19 14:24:44 +0100113static inline int __attribute_const__
114cpuid_feature_extract_field_width(u64 features, int field, int width)
James Morse79b0e092015-07-21 13:23:26 +0100115{
Suzuki K. Poulosece98a672015-10-19 14:24:44 +0100116 return (s64)(features << (64 - width - field)) >> (64 - width);
117}
118
119static inline int __attribute_const__
120cpuid_feature_extract_field(u64 features, int field)
121{
122 return cpuid_feature_extract_field_width(features, field, 4);
James Morse79b0e092015-07-21 13:23:26 +0100123}
124
Suzuki K. Poulose3c739b52015-10-19 14:24:45 +0100125static inline u64 arm64_ftr_mask(struct arm64_ftr_bits *ftrp)
126{
127 return (u64)GENMASK(ftrp->shift + ftrp->width - 1, ftrp->shift);
128}
129
130static inline s64 arm64_ftr_value(struct arm64_ftr_bits *ftrp, u64 val)
131{
132 return cpuid_feature_extract_field_width(val, ftrp->shift, ftrp->width);
133}
134
Suzuki K. Poulosecdcf8172015-10-19 14:24:42 +0100135static inline bool id_aa64mmfr0_mixed_endian_el0(u64 mmfr0)
136{
137 return cpuid_feature_extract_field(mmfr0, ID_AA64MMFR0_BIGENDEL_SHIFT) == 0x1 ||
138 cpuid_feature_extract_field(mmfr0, ID_AA64MMFR0_BIGENDEL0_SHIFT) == 0x1;
139}
140
Suzuki K. Poulose3a755782015-10-19 14:24:39 +0100141void __init setup_cpu_features(void);
James Morse79b0e092015-07-21 13:23:26 +0100142
Suzuki K. Poulosece8b6022015-10-19 14:24:49 +0100143void update_cpu_capabilities(const struct arm64_cpu_capabilities *caps,
Marc Zyngier359b7062015-03-27 13:09:23 +0000144 const char *info);
Andre Przywarae116a372014-11-14 15:54:09 +0000145void check_local_cpu_errata(void);
Suzuki K. Poulosedbb4e152015-10-19 14:24:50 +0100146
147#ifdef CONFIG_HOTPLUG_CPU
148void verify_local_cpu_capabilities(void);
149#else
150static inline void verify_local_cpu_capabilities(void)
151{
152}
153#endif
Andre Przywarae116a372014-11-14 15:54:09 +0000154
Suzuki K. Pouloseb3f15372015-10-19 14:24:47 +0100155u64 read_system_reg(u32 id);
156
Suzuki K. Poulosec1e86562015-10-19 14:24:48 +0100157static inline bool cpu_supports_mixed_endian_el0(void)
158{
159 return id_aa64mmfr0_mixed_endian_el0(read_cpuid(ID_AA64MMFR0_EL1));
160}
161
162static inline bool system_supports_mixed_endian_el0(void)
163{
164 return id_aa64mmfr0_mixed_endian_el0(read_system_reg(SYS_ID_AA64MMFR0_EL1));
165}
166
Andre Przywara301bcfa2014-11-14 15:54:10 +0000167#endif /* __ASSEMBLY__ */
168
Ard Biesheuvel3be1a5c2014-03-04 01:10:04 +0000169#endif